Magnetic Probabilistic Computing

• Magnetic Probabilistic Computing is a paradigm that exploits intrinsic magnetic stochasticity from devices like sMTJs and low-barrier nanomagnets to perform probabilistic computations.
• It integrates diverse magnetic primitives—such as p-bits, skyrmion devices, and domain-wall fluctuations—to facilitate sampling, optimization, and Bayesian inference in hardware.
• Advances in CMOS integration and energy barrier tuning have enhanced performance, reliability, and scalability, enabling applications in optimization, machine learning, and probabilistic logic.

Searching arXiv for papers on magnetic probabilistic computing and related hardware primitives. to=arxiv_search 天天中彩票被json {"query":"all:(\"magnetic probabilistic computing\" OR p-bit OR probabilistic spin logic OR stochastic magnetic tunnel junction OR skyrmion probabilistic computing)", "max_results": 10, "sort_by": "submittedDate", "sort_order": "descending"}【อ่านข้อความเต็มjson [{"arxiv_id":"(Yoon et al., 15 Apr 2026)","title":"CMOS-integrated superparamagnetic tunnel junction-based p-bit","authors":["R. Venkatesh","G. C. Adam"],"published":"2026-04-15","abstract":"Probabilistic computers offer promising solutions for computationally hard problems in domains such as combinatorial optimization and machine learning. A key building block in these systems is the probabilistic bit (p-bit), which relies on superparamagnetic tunnel junctions (sMTJs) as its source of randomness. A challenging threshold to cross for scaling sMTJ-based p-bit systems is integration of sMTJs with CMOS technology. In this work, we present experimental results of a p-bit unit cell using sMTJs integrated with 130 nm CMOS technology and demonstrate that the sMTJ's resistance fluctuations can generate a corresponding fluctuating digital output voltage which is tunable via the input voltage. These findings establish the feasibility of CMOS-compatible, sMTJ-based probabilistic circuits and mark a key step toward scalable hardware for real-world probabilistic computing applications."},{"arxiv_id":"(Nallan et al., 19 Jan 2026)","title":"A functionally reversible probabilistic computing architecture enabled by interactions of current-controlled magnetic devices","authors":["J. H. Bauer","A. Alhomsi","A. C. Schellekens","A. Berger"],"published":"2026-01-19","abstract":"Probabilistic computers replace logic gates with networks of interacting random variables, creating bidirectional systems that can back-derive inputs from outputs. Such architectures enable efficient generation of random samples, implementations of novel algorithms, and natural solutions to classically hard problems such as prime factorization. We present a new physical implementation for these networks: ferromagnetic disks whose magnetization switching process is triggered by current pulses, skewed by external magnetic fields, and randomized by ambient thermal noise. We show that geometry-dependent magnetostatic interactions between these magnetic cells lead to system behavior that emulates deterministic logic gates. Furthermore, by chaining multiple \"gates,\" we achieve a highly accurate bidirectional one-bit full-adder, a proof of concept for complex multi-gate logic functions with reversible information flow. This analog magnetic probabilistic computer methodology improves on other implementations in speed, tunability, and energy efficiency, thereby enabling a powerful new pathway towards practical solution of classically hard problems."},{"arxiv_id":"(Hasselgren et al., 27 Oct 2025)","title":"Probabilistic Computing Optimization of Complex Spin-Glass Topologies","authors":["S. R. P. Silva","E. C. Beck","S. C. Smith","E. V. David","F. J. Ponce","J. M. Mendez","D. Campos","H. Arjona","A. Alsharif","M. H. Szymanski","N. C. Cady"],"published":"2025-10-27","abstract":"Spin glass systems as lattices of disordered magnets with random interactions have important implications within the theory of magnetization and applications to a wide-range of hard combinatorial optimization problems. Nevertheless, despite sustained efforts, algorithms that attain both high accuracy and efficiency remain elusive. Due to their topologies being low-$k$-partite such systems are well suited to a probabilistic computing (PC) approach using probabilistic bits (P-bits). Here we present complex spin glass topologies solved on a simulated PC realization of an Ising machine. First, we considered a number of three dimensional Edwards-Anderson cubic spin-glasses randomly generated as well as found in the literature as a benchmark. Second, biclique topologies were identified as a likely candidate for a comparative advantage compared to other state-of-the-art techniques, with a range of sizes simulated. We find that the number of iterations necessary to find solutions of a given quality has constant scaling with system size past a saturation point if one assumes perfect parallelization of the hardware. Therefore a PC architecture can trade the computational depth of other methods for parallelized width by connecting a number of P-bits that scales linearly in system size. This constant scaling is shown to persist across a number of solution qualities, up to a certain limit beyond which resource constraints limited further investigation. The saturation point varies between topologies and qualities and becomes exponentially hard in the limit of finding the ground truth. Furthermore we demonstrate that our PC architecture can solve spin-glass topologies to the same quality as the most advanced quantum annealer in minutes, making modest assumptions about their implementation on hardware."},{"arxiv_id":"(Winkler et al., 27 Aug 2025)","title":"Multi-value Probabilistic Computing with current-controlled Skyrmion Diffusion","authors":["S. A. D. M. de Goes","R. A. Gallardo","K. Karube","A. K. Suszka","T. Strache","S. Yokoyama","M. Kläui"],"published":"2025-08-27","abstract":"Magnetic systems are highly promising for implementing probabilistic computing paradigms because of the fitting energy scales and conspicuous non-linearities. While conventional binary probabilistic computing has been realized, implementing more advantageous multi-value probabilistic computing (MPC) remains a challenge. Here, we report the realization of MPC by leveraging the thermally activated diffusion of magnetic skyrmions through an effectively non-flat energy landscape defined by a discrete number of pinning sites. The time-averaged spatial distribution of the diffusing skyrmions directly realizes a discrete probability distribution, which is tunable by current-generated spin-orbit torques, and can be quantified by non-perturbative electrical measurements. Even a very straightforward implementation with global tuning, already allows us to demonstrate the softmax computation - a core function in artificial intelligence. As a key advance, we demonstrate invertible logic without the need to create a network of probabilistic devices, offering major scalability advantages. Our proof of concept can be generalized to multiple skyrmions and can accommodate multiple locally tunable inputs and outputs using magnetic tunnel junctions, potentially enabling the representation of highly complex distribution functions."},{"arxiv_id":"(Wang et al., 23 Jul 2025)","title":"Spintronic Bayesian Hardware Driven by Stochastic Magnetic Domain Wall Dynamics","authors":["X. Zhang","M. Zheng","Z. Wang","Y. Miao","L. Liu","S. Xie","S. Yin","P. J. Wang","Y. Zhang"],"published":"2025-07-23","abstract":"As AI advances into diverse applications, ensuring reliability of AI models is increasingly critical. Conventional neural networks offer strong predictive capabilities but produce deterministic outputs without inherent uncertainty estimation, limiting their reliability in safety-critical domains. Probabilistic neural networks (PNNs), which introduce randomness, have emerged as a powerful approach for enabling intrinsic uncertainty quantification. However, traditional CMOS architectures are inherently designed for deterministic operation and actively suppress intrinsic randomness. This poses a fundamental challenge for implementing PNNs, as probabilistic processing introduces significant computational overhead. To address this challenge, we introduce a Magnetic Probabilistic Computing (MPC) platform-an energy-efficient, scalable hardware accelerator that leverages intrinsic magnetic stochasticity for uncertainty-aware computing. This physics-driven strategy utilizes spintronic systems based on magnetic domain walls (DWs) and their dynamics to establish a new paradigm of physical probabilistic computing for AI. The MPC platform integrates three key mechanisms: thermally induced DW stochasticity, voltage controlled magnetic anisotropy (VCMA), and tunneling magnetoresistance (TMR), enabling fully electrical and tunable probabilistic functionality at the device level. As a representative demonstration, we implement a Bayesian Neural Network (BNN) inference structure and validate its functionality on CIFAR-10 classification tasks. Compared to standard 28nm CMOS implementations, our approach achieves a seven orders of magnitude improvement in the overall figure of merit, with substantial gains in area efficiency, energy consumption, and speed. These results underscore the MPC platform's potential to enable reliable and trustworthy physical AI systems."},{"arxiv_id":"(Kinoshita et al., 8 May 2025)","title":"Size dependence of the properties of synthetic-antiferromagnet-based stochastic magnetic tunnel junctions for probabilistic computing","authors":["S. Miwa","Y. Nakatani","A. Fukushima","S. Yuasa"],"published":"2025-05-08","abstract":"Stochastic magnetic tunnel junctions (s-MTJs) are core components for spintronics-based probabilistic computing (p-computing), a promising candidate for energy-efficient unconventional computing. To achieve reliable performance under practical conditions, the use of a synthetic antiferromagnetic (SAF) free-layer configuration was proposed due to its enhanced tolerance to magnetic field perturbations. For engineering the SAF s-MTJs, we systematically investigate the properties of the SAF s-MTJs as a function of the junction size. We observe that decreasing junction size leads to shorter relaxation times, enhanced magnetic field robustness, and enhanced insensitivity to bias voltage. These findings provide key insights toward high-performance p-computers with reliable operation."},{"arxiv_id":"(Duffee et al., 2024)","title":"Integrated probabilistic computer using voltage-controlled magnetic tunnel junctions as its entropy source","authors":["H. Kwon","S. Chatterjee","M. H. Sharifi","R. Kumar","P. Debashis","N. Cady","A. Chattopadhyay"],"published":"2024-12-11","abstract":"Probabilistic Ising machines (PIMs) provide a path to solving many computationally hard problems more efficiently than deterministic algorithms on von Neumann computers. Stochastic magnetic tunnel junctions (S-MTJs), which are engineered to be thermally unstable, show promise as entropy sources in PIMs. However, scaling up S-MTJ-PIMs is challenging, as it requires fine control of a small magnetic energy barrier across large numbers of devices. In addition, non-spintronic components of S-MTJ-PIMs to date have been primarily realized using general-purpose processors or field-programmable gate arrays. Reaching the ultimate performance of spintronic PIMs, however, requires co-designed application-specific integrated circuits (ASICs), combining CMOS with spintronic entropy sources. Here we demonstrate an ASIC in 130 nm foundry CMOS, which implements integer factorization as a representative hard optimization problem, using PIM-based invertible logic gates realized with 1143 probabilistic bits. The ASIC uses stochastic bit sequences read from an adjacent voltage-controlled (V-) MTJ chip. The V-MTJs are designed to be thermally stable in the absence of voltage, and generate random bits on-demand in response to 10 ns pulses using the voltage-controlled magnetic anisotropy effect. We experimentally demonstrate the chip's functionality and provide projections for designs in advanced nodes, illustrating a path to millions of probabilistic bits on a single CMOS+V-MTJ chip."},{"arxiv_id":"(Chowdhury et al., 2023)","title":"Machine Learning Quantum Systems with Magnetic p-bits","authors":["S. Singh","R. Chattopadhyay","A. F. Vincent","A. Sengupta","A. Raychowdhury"],"published":"2023-10-10","abstract":"The slowing down of Moore's Law has led to a crisis as the computing workloads of AI algorithms continue skyrocketing. There is an urgent need for scalable and energy-efficient hardware catering to the unique requirements of AI algorithms and applications. In this environment, probabilistic computing with p-bits emerged as a scalable, domain-specific, and energy-efficient computing paradigm, particularly useful for probabilistic applications and algorithms. In particular, spintronic devices such as stochastic magnetic tunnel junctions (sMTJ) show great promise in designing integrated p-computers. Here, we examine how a scalable probabilistic computer with such magnetic p-bits can be useful for an emerging field combining machine learning and quantum physics."},{"arxiv_id":"(Gan et al., 2023)","title":"In-plane dominant anisotropy stochastic magnetic tunnel junction for probabilistic computing: A Fokker-Planck study","authors":["J. T. Lü","M. Brandbyge"],"published":"2023-09-06","abstract":"Recently there is considerable interest to realize efficient and low-cost true random number generators (RNGs) for practical applications. One important way is through the use of bistable magnetic tunnel junctions (MTJs). Here we study the magnetization dynamics of an MTJ, with a focus to realize efficient random bit generation under the assumption that the orientation dependence of the energy of the nanomagnet is described by two perpendicular in-plane anisotropies. We find that a high rate of random bit generation is achievable away from the pure easy-axis situation by tuning a single parameter H_z so that it is either (a) toward a barrierless-like single easy plane situation when H_z reduces to zero, or (b) toward a stronger easy plane situation when H_z becomes increasingly negative where transitions between low energy states are confined in the stronger easy plane that contains the saddle points. We find that the MTJs maintain their fast magnetization dynamical characteristics even in the presence of a magnetic field. Our findings provide a valuable guide to achieving efficient generation of probabilistic bits for applications in probabilistic computing."},{"arxiv_id":"(Daniel et al., 2023)","title":"Experimental demonstration of an integrated on-chip p-bit core utilizing stochastic Magnetic Tunnel Junctions and 2D-MoS2 FETs","authors":["D. L. M. Guerra","N. Rangarajan","A. M. Ionescu","S. Datta","A. Raychowdhury"],"published":"2023-08-21","abstract":"Probabilistic computing is a novel computing scheme that offers a more efficient approach than conventional CMOS-based logic in a variety of applications ranging from optimization to Bayesian inference, and invertible Boolean logic. The probabilistic-bit (or p-bit, the base unit of probabilistic computing) is a naturally fluctuating entity that requires tunable stochasticity; by coupling low-barrier stochastic Magnetic Tunnel Junctions (MTJs) with a transistor circuit, a compact implementation is achieved. In this work, through integrating stochastic MTJs with 2D-MoS2 FETs, the first on-chip realization of a key p-bit building block displaying voltage-controllable stochasticity is demonstrated. In addition, supported by circuit simulations, this work provides a careful analysis of the three transistor-one magnetic tunnel junction (3T-1MTJ) p-bit design, evaluating how the characteristics of each component influence the overall p-bit output. This understanding of the interplay between the characteristics of the transistors and the MTJ is vital for the construction of a fully functioning p-bit, making the design rules presented in this article key for future experimental implementations of scaled on-chip p-bit networks."}] Magnetic Probabilistic Computing (MPC) is a computing paradigm in which intrinsic magnetic stochasticity is used as a computational resource rather than suppressed as noise. Across the literature, MPC includes p-bit and p-computer architectures based on low-barrier nanomagnets and stochastic magnetic tunnel junctions (sMTJs), probabilistic spin logic, magneto-electric probability arithmetic, skyrmion-based reshuffling and multi-state computation, and magnetic devices for Bayesian and neuromorphic inference. The unifying idea is that magnetic devices can generate tunable random variables, probability distributions, or stochastic update schedules directly in hardware, enabling optimization, sampling, invertible logic, Bayesian inference, stochastic computing, and learning with a closer correspondence between device physics and probabilistic algorithms than conventional CMOS-only implementations (Khasanvis et al., 2015, Lv et al., 2019, Singh et al., 2023).

1. Conceptual basis and computational formalism

In the p-bit literature, the central abstraction is the binary stochastic neuron (BSN), with the p-bit as its hardware realization. One explicit formulation states that a BSN is the algorithmic abstraction, a p-bit is its stochastic hardware realization, and a low- or zero-energy-barrier magnet (LBM) provides the fluctuating physical state needed to implement that p-bit (Rahman et al., 2023). In a commonly used dynamical model, the p-bit state and local field are written as

$$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$

$I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$

with corresponding network energy and Boltzmann distribution

$$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$

For symmetric networks, the asynchronous dynamics sample from the desired distribution, which is why update-order invariance is repeatedly emphasized in hardware demonstrations of Gibbs sampling and Boltzmann machines (Singh et al., 2023).

This binary formulation is not the only meaning assigned to MPC in the literature. One 2025 skyrmion work uses the same acronym for multi-value probabilistic computing and defines an element whose accessible states correspond to more than two discrete probability outcomes, with the time-averaged spatial distribution of a single thermally diffusing skyrmion directly realizing a discrete probability distribution (Winkler et al., 27 Aug 2025). That usage does not replace the broader meaning of Magnetic Probabilistic Computing, but it shows that the field has expanded from binary p-bits toward direct hardware representations of richer distributions.

Another important conceptual distinction concerns reversibility. Recent magnetic probabilistic architectures are described as functionally reversible because they can back-derive inputs from outputs by conditioning a joint stochastic state space; this is logically or inferentially reversible, not thermodynamically reversible in the strict sense (Nallan et al., 19 Jan 2026). Earlier work on Bayesian-network inference makes a related point from a different direction: probabilistic inference can be organized around direct computations on probabilities rather than Boolean emulation, using in-memory magnetic state variables as the arithmetic substrate (Khasanvis et al., 2015). Together, these lines of work define MPC less as a single circuit template than as a family of magnetic hardware formalisms for representing and transforming uncertainty.

2. Magnetic stochastic primitives

The device landscape of MPC is diverse, but most implementations rely on one of a few recurring physical mechanisms: thermally activated magnetization fluctuations, stochastic current- or voltage-triggered switching, stochastic motion of magnetic textures, or magnetically encoded analog probability arithmetic.

Primitive	Stochastic mechanism	Reported role
LBM / sMTJ p-bit	Thermal magnetization fluctuations	BSN / p-bit
MBM SMART MTJ	Short-pulse ballistic STT switching	TRNG, probabilistic unit
V-MTJ	VCMA-triggered random relaxation	On-demand entropy source
SAF s-MTJ	Random telegraph switching in compensated free layer	Robust p-computing element
Domain-wall MTJ	Thermally induced DW stochasticity + VCMA + TMR	Tunable Gaussian random variable
Skyrmion device	Thermally activated diffusion	Reshuffler, softmax, invertible logic

The most established primitive is the stochastic MTJ or low-barrier nanomagnet. In one widely cited proposal, a p-bit is realized by a low-energy-barrier nanomagnet whose magnetization fluctuates spontaneously due to thermal noise, making the MTJ resistance toggle randomly while remaining biasable by an input signal (Chowdhury et al., 2023). A symmetric alternative replaces the usual fixed layer with a second low-barrier free layer, producing approximately bias-independent randomness over a broad voltage range and avoiding the need for a specially engineered fixed reference layer (Camsari et al., 2020).

A different branch uses medium-barrier magnets rather than superparamagnetic ones. The SMART MTJ is a pinned-layer / barrier / free-layer device whose perpendicular magnetic anisotropy medium-barrier magnet is driven with short voltage pulses to induce ballistic, yet stochastic, spin-transfer-torque switching. The reported target regime is a barrier of about $35\,k_B T$, chosen as a compromise between the thermal domination of LBMs and the stability of HBMs (Shukla et al., 2023). Voltage-controlled MTJs push this compromise further by keeping the free layer thermally stable in standby and using VCMA pulses to lower the anisotropy barrier only during bit generation; the reported device maintains $>30\,kT$ in standby and generates random bits on demand with about 10 ns pulses (Duffee et al., 2024).

Robustness against perturbations motivates synthetic-antiferromagnet free layers. In SAF s-MTJs, two CoFeB layers above the MgO barrier are coupled antiferromagnetically through a Ru spacer via RKKY interaction, nearly cancelling the net magnetic moment and suppressing Zeeman sensitivity. The reported uncompensated moment is only about 5% of the total moment, and decreasing electrically active diameter shortens relaxation time while improving magnetic-field robustness and insensitivity to bias voltage (Kinoshita et al., 8 May 2025).

Beyond tunnel junctions, MPC also uses mobile magnetic textures. Thermal skyrmion diffusion has been used to implement a reshuffler that decorrelates a bitstream while preserving its $p$-value, and later to realize a multi-state element in which occupation probabilities of discrete pinning sites encode a probability distribution directly (Zázvorka et al., 2018, Winkler et al., 27 Aug 2025). Domain-wall devices form another class: in one recent platform, thermally induced domain-wall stochasticity, VCMA, and tunneling magnetoresistance are combined so that domain-wall position sets the mean of a Gaussian-like output, VCMA tunes its variance, and TMR converts the fluctuating magnetic state into an electrical sample (Wang et al., 23 Jul 2025). A separate line of work uses magnetization patterns in a hard magnetic bias layer and thermally activated nanodot switching to turn deterministic spin-wave computations into probabilistic ones (Rivkin, 2023).

3. Speed, energy barriers, and robustness engineering

A central engineering problem in MPC is how to obtain large numbers of uncorrelated stochastic samples per second without sacrificing readout, compactness, or robustness. In low-barrier p-bit hardware, this is often summarized by flips per second (fps). For an in-plane nanomagnet with no magnetocrystalline anisotropy, the internal energy barrier is

$A = \mu_0 M_s^2 \Omega (N_{\min}-N_{\maj}),$

and the hopping rate is described in Arrhenius-like form by

$\frac{1}{\tau} = \frac{1}{\tau_0} e^{-A/kT}.$

Since $A\propto M_s^2$, lowering saturation magnetization strongly lowers the barrier and increases stochastic switching (Rahman et al., 2023).

This material lever is is explored explicitly by replacing Co with GaMnAs in slightly elliptical in-plane LBMs. Co is reported to have $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$0, whereas GaMnAs has $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$1 at room temperature, implying a barrier roughly $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$2 of the Co case. In the simulated geometry, Co LBMs yield $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$3, while GaMnAs LBMs yield $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$4. Because dipolar interaction also scales as $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$5, the same substitution reduces unwanted coupling by more than four orders of magnitude, which the authors connect to tighter packing, increased parallelization, and reduced device-to-device variation (Rahman et al., 2023).

Other works optimize the energy landscape rather than the material itself. A Fokker–Planck study of an in-plane-dominant anisotropy MTJ shows that a high rate of random bit generation can be achieved away from the pure easy-axis situation by tuning $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$6 either toward a barrierless-like single easy-plane regime as $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$7 or toward a stronger easy-plane regime for increasingly negative $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$8, while preserving fast dynamical characteristics even in the presence of a magnetic field (Gan et al., 2023). The SMART MTJ line makes a complementary argument: the short-pulse ballistic regime reduces temperature sensitivity relative to thermally diffusive switching and delivers about 500 MHz operation with 92 fJ/bit total circuit energy and about 9 fJ minimum switching energy at optimal pulse conditions (Shukla et al., 2023).

Robustness results are especially explicit in SAF devices. As the junction diameter decreases, the average relaxation time $$m_i (t+\tau_N)=\text{sgn}\{\text{rand}(-1,1)+\text{tanh}[\beta I_i (t)]\},$$9 drops from seconds to tens of microseconds, $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$0 decreases so that for $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$1 the device can operate stably up to roughly 10 mT, and voltage sensitivity falls to about $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$2 at $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$3. For $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$4, the reported probability variation is about 1.3%, versus about 140% for an earlier perpendicular-type device (Kinoshita et al., 8 May 2025). Voltage-controlled entropy sources address a different robustness bottleneck by using thermally stable V-MTJs and on-demand switching instead of arrays of always-unstable superparamagnets, a strategy proposed as more scalable for large p-bit systems (Duffee et al., 2024).

4. Circuit realizations and system architectures

MPC has progressed from isolated stochastic elements to coupled gates, heterogeneous accelerators, and monolithic CMOS integration. An early experimental milestone was the MTJ-based realization of probabilistic spin logic. The basic p-block used a thermally stable in-plane CoFeB/MgO MTJ plus sensing, filtering, attenuate-and-shift circuitry, and a comparator to generate a random digital waveform whose time average depended on input. Three such p-blocks were then coupled into an invertible AND gate that favored the legal states $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$5, $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$6, $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$7, and $I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$8, demonstrating forward, backward, mixed-clamp, and free-run probabilistic logic in hardware (Lv et al., 2019).

Subsequent on-chip work focused on compact p-bit cores. A stochastic MTJ integrated with a monolayer MoS$I_i(t+\tau_S)=\sum{J_{ij}m_j(t)}+h_i,$9 transistor and inverter provided the first on-chip realization of a key p-bit building block displaying voltage-controllable stochasticity. That study also formulated several design rules: resistance matching between transistor and MTJ is essential, a large TMR is not necessarily best for p-bits, too little TMR narrows the stochastic range, faster MTJs produce a smoother sigmoid because their resistance distribution is more continuous, and an excessively ideal inverter can worsen plateauing (Daniel et al., 2023). A later 130 nm CMOS-integrated p-bit unit cell pushed integration further by monolithically embedding sMTJs above CMOS and showing that the sMTJ’s resistance fluctuations could generate a fluctuating digital output voltage tunable via the input voltage; the full-stage circuit used an sMTJ, NMOS, cascode stage, variable threshold controller, and inverter (Yoon et al., 15 Apr 2026).

Heterogeneous architectures combine magnetic entropy sources with CMOS arithmetic and control. A CMOS + stochastic nanomagnets prototype used five discrete perpendicular sMTJs to generate truly random asynchronous clocks for FPGA p-bits. In transistor-level comparisons, a 32-bit LFSR-based p-bit required about 5150 transistors, a 32-bit Xoshiro-based p-bit about 11,000 transistors, whereas a compact 3T/1MTJ p-bit was estimated as only 3 transistors plus the sMTJ counted as about 4 transistor-equivalents. The authors therefore state that an sMTJ-based p-bit can replace up to roughly 10,000 CMOS transistors while dissipating two orders of magnitude less energy (Singh et al., 2023).

At the architecture scale, a 130 nm foundry CMOS ASIC implementing integer factorization used 1143 probabilistic bits and stochastic bit sequences read from an adjacent V-MTJ chip. The ASIC was synchronous, used a probabilistic logic unit to implement p-bit updates, and experimentally solved 6-bit integer factorization with invertible logic gates while projecting a path to millions of probabilistic bits on a single CMOS+V-MTJ chip (Duffee et al., 2024). Another recent platform uses current-controlled ferromagnetic disks with magnetostatic interactions to realize functionally reversible gates and a one-bit full adder, with gate-to-gate communication implemented either magnetically or by CMOS-assisted copying (Nallan et al., 19 Jan 2026). Taken together, these systems show that MPC is no longer confined to device-level proofs of randomness; it now includes complete update pipelines, communication mechanisms, and application-specific integrated control.

5. Computational modes and demonstrated applications

The application space of MPC is broad because the same magnetic stochastic primitives can serve as entropy sources, tunable probabilistic neurons, stochastic clocks, or direct physical encodings of distributions. One early example is a magneto-electric probabilistic technology framework for Bayesian networks, in which straintronic MTJs represent multi-valued probability digits and mixed-signal composer circuits implement probability sum, product, and sum-of-products directly in hardware. For Bayesian likelihood estimation, the reported initial evaluations indicate up to 127x lower area, 214x lower active power, and 70x lower latency compared to an equivalent 45 nm CMOS Boolean implementation when memory-access overhead is included (Khasanvis et al., 2015).

Probabilistic neuromorphic systems use magnetic stochasticity differently. In a deep spiking neural system enabled by MTJ stochastic switching, the switching probability approximated a sigmoid-like neuron nonlinearity, enabling ANN-to-SNN conversion for MNIST. The reported test accuracy reached 97.6% with $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$0 and 96.4% with $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$1, while the full network consumed 19.5 nJ per image versus 391 nJ per image for a 45 nm CMOS baseline, corresponding to about $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$2 lower energy (Sengupta et al., 2016). A more recent AI-oriented line uses stochastic domain-wall dynamics to generate tunable Gaussian-distributed outputs for Bayesian neural network inference. After training in TensorFlow Probability and mapping learned Gaussian weights to experimentally reachable TMR distributions, the reported CIFAR-10 validation accuracy is 78.5%, with a seven orders of magnitude improvement in the overall figure of merit relative to a 28 nm CMOS baseline (Wang et al., 23 Jul 2025).

Sampling-based learning and physics applications also appear prominently. A hybrid FPGA/sMTJ probabilistic computer was used for probabilistic inference and learning in a full adder and a deep Boltzmann machine, with the key observation that stochastic timing injected by sMTJs can make even a low-quality LFSR behave more like a high-quality RNG. The same study states that randomness quality matters much more for learning than for simple optimization (Singh et al., 2023). In another direction, a probabilistic computer with magnetic p-bits was used to learn the ground state of a 12-spin transverse-field Ising model. The exact ground-state energy was given as $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$3, and the FPGA-emulated probabilistic computer improved time per epoch by approximately a factor of two while highlighting the CPU-side local-energy computation as the remaining bottleneck (Chowdhury et al., 2023).

Skyrmion-based MPC targets both stochastic computing and direct probabilistic representation. A room-temperature skyrmion reshuffler preserved the input value $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$4 with $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$5 while decorrelating input and output to a Pearson correlation of $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$6, thereby providing the missing reshuffling element required by stochastic-computing circuits (Zázvorka et al., 2018). Later work generalized skyrmion diffusion to multi-state computation: one prototype identified $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$7 pinning sites, used occupation probabilities to approximate softmax, and implemented an invertible OR gate with experimentally achieved KLD below 0.1 for the 1-clamped and unclamped distributions, notably without requiring a network of probabilistic devices (Winkler et al., 27 Aug 2025). Integer factorization via invertible logic constitutes a different computational mode: in the CMOS+V-MTJ ASIC, the valid factor states $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$8 and $$E=-\left(\sum{J_{ij}m_im_j}+\sum{h_im_i}\right), \qquad p_j =\frac{1}{Z}\exp(-\beta E_j).$$9 together made up 67.5% of the final experimental results for the 6-bit factorization of 35 (Duffee et al., 2024).

6. Scaling limits, design tensions, and research directions

The recent literature presents MPC as increasingly practical, but it also makes the principal constraints explicit. One recurring difficulty is control of the magnetic energy barrier across large arrays. Thermally unstable S-MTJ p-bits are attractive as entropy sources, yet scaling them requires fine control of a small barrier across many devices; this motivates alternatives such as V-MTJs that remain thermally stable in standby and generate randomness on demand (Duffee et al., 2024). A related integration bottleneck is monolithic fabrication. The 2026 CMOS-integrated sMTJ p-bit establishes feasibility, but it still identifies CMOS non-idealities, stray magnetic fields from the reference layer, device-to-device variability, and the need for tighter compact modeling and larger interconnected arrays as immediate next steps (Yoon et al., 15 Apr 2026).

Another design tension is that the device must be stochastic enough to be useful but stable enough to be reliable. The SAF s-MTJ work states this tradeoff directly and argues that the compensated free layer helps resolve it by reducing unwanted sensitivity while preserving intrinsic randomness (Kinoshita et al., 8 May 2025). At circuit level, p-bit quality depends on co-design rather than any single figure of merit: the MoS$35\,k_B T$0-MTJ study shows that resistance matching, moderate rather than maximal TMR, fast and more continuous resistance dynamics, and non-ideal but suitably shaped inverter transfer characteristics all matter to the final sigmoid (Daniel et al., 2023). This suggests that “better” magnetic devices in a memory sense do not automatically produce better probabilistic devices.

Architectural scaling introduces a separate set of limits. The heterogeneous FPGA+sMTJ study projects that pure digital p-computers become prohibitive beyond $35\,k_B T$1 to $35\,k_B T$2 p-bits because of RNG area, energy, and throughput limits, whereas magnetic entropy sources can avoid that bottleneck (Singh et al., 2023). For optimization-oriented probabilistic computers, graph structure determines how effectively stochastic updates can be parallelized. Simulations of three-dimensional Edwards–Anderson spin glasses and bicliques report that the number of iterations required to reach a fixed solution quality can saturate to a constant with system size past a saturation point if one assumes perfect parallelization, but the saturation point varies between topologies and qualities and becomes exponentially hard in the limit of finding the ground truth (Hasselgren et al., 27 Oct 2025). This suggests that future large-scale MPC will depend not only on better p-bits, but also on graph-aware scheduling, sparse embeddings, and update-group structure.

The most notable research direction is diversification of the probabilistic object itself. Binary p-bits remain the dominant abstraction, yet current work already includes on-demand entropy sources based on VCMA, Gaussian random variables based on domain-wall fluctuations, direct multi-state skyrmion distributions, and functionally reversible magnetic gate networks (Duffee et al., 2024, Wang et al., 23 Jul 2025, Winkler et al., 27 Aug 2025, Nallan et al., 19 Jan 2026). A plausible implication is that MPC is evolving from a narrow p-bit technology program into a broader hardware discipline for physical probabilistic computation, in which magnets provide not only random bits but tunable distributions, stochastic clocks, invertible constraints, and directly sampled energy landscapes.