3FI ASIC for Full-Field X-Ray Spectroscopy
- 3FI ASIC is a purpose-built 65nm CMOS chip for full-field, event-driven fluorescence imaging, enabling per-pixel spectroscopy in X-ray detection.
- It integrates charge amplification, shaping, discrimination, and multi-pixel charge-sharing correction in a compact 32×32 array for enhanced throughput.
- Measured performance shows low-noise energy resolution with FWHM as low as 138 eV, making it ideal for in situ microanalysis in diverse research fields.
The 3FI application-specific integrated circuit is a purpose-built 65 nm CMOS readout chip for Full-Field Fluorescence spectral X-ray Imaging, also described as 3FI or FFFI, in which X-ray fluorescence is acquired over an entire field of view rather than by mechanically raster-scanning a sample. Implemented as a small-scale hybrid-pixel prototype with a 32 × 32 array on a 100 µm pitch and bump-bonded to a simply, planar, two-dimensionally segmented silicon sensor, it integrates per-pixel charge amplification, shaping, discrimination, peak capture, and sample-and-hold storage, then outputs analog amplitudes and event addresses in an event-driven mode for energy-resolved, frameless imaging (Maj et al., 19 Jul 2025).
1. Concept and scientific motivation
The 3FI ASIC was developed as the electronic core of a detector concept intended to remove a central limitation of conventional X-ray Fluorescence Microscopy (XFM): standard scanning XFM acquires data sequentially over many scan positions and is therefore inherently slow. The motivating use case for 3FI is full-field fluorescence detection, in which fluorescence signals from an entire image area are collected simultaneously. The intended result is the combination of elemental specificity with high throughput, especially for systems in which chemistry or biology may evolve too quickly for conventional scanning acquisition (Maj et al., 19 Jul 2025).
Within that framework, the ASIC is designed for in situ trace element microanalysis in biological and environmental research. The paper explicitly associates the approach with elemental transport in biological tissue, oxidation-state changes, chemical transformations in living systems, plant–soil interface chemistry, nutrient cycling in the (mycor)rhizosphere, microbial redox processes, and genotype-phenotype correlations in bio-energy crops. The broader scientific premise is that a frameless, energy-resolving detector can support time-sensitive chemical imaging without the latency imposed by frame readout or mechanical scan motion.
A common misconception is that full-field fluorescence readout merely replaces a scan with parallel photon counting. In 3FI, the architectural objective is narrower and more technical: the ASIC is not restricted to binary hit detection, but measures pulse amplitudes so that photon energy can be reconstructed. The device is therefore organized for spectroscopic imaging rather than simple occupancy measurement.
2. Pixel organization and mixed-signal architecture
The prototype 3FI chip is a 65 nm CMOS ASIC organized as a 32 × 32 pixel array with 100 µm × 100 µm pitch, while the intended full-scale chip size is 256 × 256 pixels. The detector is a hybrid pixel architecture, bump-bonded to a planar silicon sensor. Each pixel is designed as an independent spectroscopy channel, and the paper states that the detector enables high-speed multi-element X-ray fluorescence imaging (Maj et al., 19 Jul 2025).
Each pixel incorporates the following blocks:
| Block | Function | Architectural role |
|---|---|---|
| Charge-sensitive amplifier | Converts collected charge to a voltage pulse | Front-end charge readout |
| Shaping filter | Third-order, semi-Gaussian shaping | Signal-to-noise optimization and pulse conditioning |
| Discriminator | Compares shaped signal to a threshold | Valid-event generation |
| Peak detector | Captures pulse maximum | Energy inference |
| Sample-and-hold | Stores captured analog amplitude | Event-driven analog readout |
A distinctive feature of the pixel design is the bank of nine sample-and-hold circuits. This permits simultaneous latching of the central hit pixel and its eight nearest neighbors. The central purpose of that arrangement is charge-sharing compensation: when charge is split across adjacent pixels, the neighboring amplitudes can be combined off-chip to recover the deposited charge more accurately. In the absence of such readout, charge sharing would directly degrade energy resolution.
The architecture therefore couples local analog spectroscopy to localized spatial context. This is a consequential design choice for a 100 µm pitch detector, because it acknowledges that energy estimation in a finely segmented sensor is not always a strictly single-pixel problem.
3. EDWARD event-driven readout and system integration
A central architectural feature of 3FI is its use of EDWARD, an event-driven asynchronous readout paradigm previously developed at Brookhaven. EDWARD is used to deliver both the digital address of the triggering event and the analog signal amplitude associated with that event. In normal operation, the chip does not read out full frames; instead, a threshold crossing initiates capture of the relevant analog value or values, followed by asynchronous routing of the event address and analog amplitude through separate output paths (Maj et al., 19 Jul 2025).
Operationally, when a pixel discriminator fires, the event is declared valid, the peak detector captures the maximum pulse height, the relevant sample-and-hold cells are latched, the event address is routed through asynchronous logic, and the analog value and digital address are sent off-chip. Two readout modes are described. In single-pixel readout mode, the trigger latches the central pixel and neighbors but ultimately reads only the central pixel, maximizing throughput. In charge-sharing compensation mode, the central pixel plus all eight neighbors are read out so that the total deposited charge can be reconstructed more faithfully.
The output structure is split into an analog output path and a digital output path. The analog path uses a differential analog buffer to send stored amplitudes off-chip. The digital path uses a high-speed serializer with LVDS-compatible differential signaling to output event addresses. Around the ASIC, the reported detector system includes a National Instruments sbRIO-9629 controller, an Artix-7 FPGA, an Intel Atom E3845 CPU, a 14-bit AD9649 ADC operating up to 65 MS/s, Ethernet and wireless connectivity, and Peltier-based thermal stabilization. The FPGA performs slow control, high-speed deserialization, ADC interfacing, event filtering, and DMA transfer to the CPU. The system can operate either autonomously through TCP/IP scripting or in a supervised GUI mode.
The frameless characterization of the detector should not be interpreted as an absence of structure in the acquisition chain. Rather, it denotes the absence of conventional frame-based readout latency in normal operation. Event traffic is sparse and asynchronous, but the surrounding system remains highly organized.
4. Threshold handling, trimming, and diagnostic modes
Spectrometric performance in 3FI depends strongly on uniform threshold behavior across the array, and the paper devotes substantial attention to comparator or discriminator offset trimming. Two calibration approaches are described: a slower method that reconstructs the DC response from sample-and-hold data, and a faster event-rate-based method. In the faster method, the global threshold is held fixed, all trim DACs are initially set so that pixel baselines are below threshold, and each trim DAC is then increased until noise-triggered events disappear; the trim is chosen just above threshold, where spurious event rates are suppressed. The reported consequence is that pixel equalization can be completed in seconds (Maj et al., 19 Jul 2025).
The validation sequence included power-up and configuration checks, synchronization-word handling, I²C slow-control verification, discriminator offset trimming, forced-read diagnostic mode, and event/address alignment between analog samples and digital event data. These procedures establish that the ASIC is not only a front-end spectroscopy engine but also a configurable detector subsystem whose correctness depends on synchronization between asynchronous address logic and analog sample capture.
The forced-read capability is particularly significant because it qualifies the meaning of “frameless.” EDWARD can sequentially activate each pixel in turn, allowing a full 32 × 32 image to be reconstructed for diagnostic purposes even though the nominal operating mode is event-driven. This clarifies a second common misunderstanding: frameless operation does not preclude deterministic full-array inspection; it simply means that routine data acquisition is not organized around compulsory frame scans.
5. Synchrotron evaluation and measured performance
The prototype detector was evaluated at beamline 17-BM at NSLS-II using synchrotron radiation and thin fluorescence foils producing characteristic lines from Ca, Mn, Cu, Pb, and Zr. The paper reports that more than two million events per target were collected, providing statistically robust line-shape measurements and validation of the event-driven acquisition chain (Maj et al., 19 Jul 2025).
The reported spectrometric results are:
- Ca Kα at 3.69 keV: 138 eV FWHM, corresponding to 16 e⁻ rms ENC
- Mn Kα at 5.898 keV: 249 eV FWHM
- Cu Kα at 8.04 keV: 308 eV FWHM, corresponding to 30 e⁻ rms ENC
- Pb Lα at 10.551 keV: 339 eV FWHM
- Zr Kα at 15.775 keV: 469 eV FWHM
The paper also states that neighboring-pixel baseline measurements correspond to a noise level of approximately 120 eV FWHM. That value is consistent with the low-noise orientation of the front-end and with the use of neighboring-pixel readout for charge-sharing correction.
Power dissipation is reported in two forms. The abstract gives 200 µW per pixel, consisting almost uniquely of power dissipated in analog blocks. Later, in the functional-test discussion, the front-end ASIC is described as dissipating on the order of ~500 mW total. Taken together, these values place the dominant power budget in the analog spectroscopic front-end rather than in large-scale digital processing.
The energy-resolution trend across Ca, Mn, Cu, Pb, and Zr is relevant to interpretation of the architecture. The data block notes that the better resolution at Ca than at Cu is consistent with the interplay of electronic noise and charge-collection or statistical effects, while charge sharing between adjacent pixels is identified as a major source of energy-resolution loss. This suggests that the nine-sample-and-hold neighborhood capture is not an auxiliary convenience but part of the core spectroscopic strategy.
6. Applications, scalability, and position within detector-ASIC design
The paper presents 3FI as an enabling technology for high-throughput elemental imaging in domains where slow scanning is a fundamental limitation. The explicit application areas are in situ trace-element microanalysis in biological and environmental samples, nutrient cycling in the (mycor)rhizosphere, microbial redox processes, genotype-phenotype correlations in bio-energy crops, and broader environmental, biomedical, and material science studies (Maj et al., 19 Jul 2025).
Spatial resolution in the present detector is primarily set by the 100 µm pixel pitch. The paper further notes that spatial performance could be improved through coded-aperture imaging and Wolter optics. Those extensions are presented as routes to enhanced spatial resolution rather than as modifications of the ASIC core itself.
Scalability is an explicit aspect of the design narrative. Although the reported chip is a 32 × 32 prototype, the architecture is described as designed with a much larger-scale detector in mind, and the paper argues that the approach is scalable toward much larger arrays, potentially beyond 10 kpixels. A plausible implication is that the main scaling challenge is not the spectroscopic front-end principle, which is already demonstrated, but system-level integration of asynchronous event routing, analog amplitude acquisition, and charge-sharing correction across a substantially larger pixel matrix.
Within the broader landscape of detector-specific ASICs, 3FI occupies a distinct niche. It combines per-pixel spectroscopy, asynchronous address routing, and localized multi-pixel charge-sharing correction specifically for full-field X-ray fluorescence imaging. That combination differentiates it from ASICs optimized primarily for sparse photon detection in space instrumentation, continuous event-driven spectroscopy and diffraction, or detector biasing and clocking. Its defining contribution is therefore not only low-noise front-end integration, but the conversion of X-ray fluorescence imaging from a mechanically scanned workflow into an event-driven, frameless, energy-resolving detector architecture.