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ConiQ: Hardware-Aware Quantum Compiler

Updated 8 July 2026
  • ConiQ is a hardware-aware quantum compiler that leverages many-hypercube codes to enable fault-tolerant quantum circuits on neutral atom arrays.
  • It introduces AHA logical CNOT gates and VAIR to preserve the concatenated structure, achieving up to 2000× reduction in spacetime overhead and 10^6× reduction in compilation time.
  • By co-designing compiler and code with neutral-atom hardware features, ConiQ significantly lowers resource overhead compared to traditional surface-code based approaches.

ConiQ is a hardware-aware quantum compiler designed to compile fault-tolerant quantum circuits for neutral atom arrays using many-hypercube codes. It was introduced as an efficient compilation approach for concatenated codes, specifically many-hypercube codes, with two central components: Automorphism-assisted Hierarchical Addressing (AHA) logical CNOT gates and the Virtual Atom Intermediate Representation (VAIR). In the reported evaluation, ConiQ achieves up to 2000×2000\times reduction in spacetime overhead and up to 106×10^6\times reduction in compilation time compared to state-of-the-art compilers, while AHA gates provide an additional overhead reduction of up to 20×20\times (Liu et al., 7 Aug 2025).

1. Definition and design objective

ConiQ targets a specific bottleneck in fault-tolerant quantum computing with concatenated codes. Many-hypercube codes are described as extremely space-efficient, but two practical obstacles remain: they lack efficient implementations of addressable logical gates, and their gadgets require a high degree of parallelism together with long-range interactions. ConiQ is designed around the observation that neutral atom arrays provide precisely those hardware capabilities: large $2$-D arrays, moveable qubits via optical tweezers, long-range entangling gates via Rydberg blockade, and global or row/column-addressed parallel operations (Liu et al., 7 Aug 2025).

The compiler is therefore not a general-purpose fault-tolerance stack detached from hardware constraints. Its architecture is explicitly hardware-aware. The AHA construction addresses individually addressable logical gates, especially logical CNOT, without relying on the conventional distillation-based approach at each concatenation level. VAIR addresses the compilation problem itself by preserving the concatenated structure level by level rather than flattening everything to physical qubits at the outset. This combination is presented as the mechanism by which concatenated many-hypercube codes become practically compilable on neutral atom arrays (Liu et al., 7 Aug 2025).

A plausible implication is that ConiQ should be understood as a co-design result: the compiler, the code family, and the neutral-atom execution model are mutually matched rather than independently optimized.

2. Concatenated-code foundations

ConiQ is built around concatenated many-hypercube codes assembled from small distance-$2$ CSS building blocks D2mD_{2m} with parameters

[[2m,2m2,2]].[[2m, 2m-2, 2]].

These codes have stabilizers

X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.

Two concrete instances emphasized in the underlying work are D4=[[4,2,2]]D_4 = [[4,2,2]] and D6=[[6,4,2]]D_6 = [[6,4,2]] (Liu et al., 7 Aug 2025).

A level-106×10^6\times0 many-hypercube code is written

106×10^6\times1

where level 106×10^6\times2 uses a 106×10^6\times3 code. Registers are the logical units at each concatenation level: a register is a block of logical qubits encoded together by a 106×10^6\times4 code. Logical information is interleaved across all physical qubits in the block, so intra-block operations must be performed coherently at register granularity rather than by naively addressing a single physical qubit (Liu et al., 7 Aug 2025).

The paper highlights the space efficiency of this construction. For four levels of 106×10^6\times5 blocks, the encoding rate is

106×10^6\times6

which corresponds to roughly 106×10^6\times7 physical qubits per logical qubit at distance 106×10^6\times8. The same source contrasts this with surface-code overheads on the order of 106×10^6\times9 physical qubits per logical qubit for 20×20\times0 (Liu et al., 7 Aug 2025).

The code family admits standard fault-tolerant gadgets. Transversal CNOT between two registers is implemented by applying CNOT to every corresponding physical-qubit pair, and transversal 20×20\times1 is implemented by applying 20×20\times2 to every physical qubit, yielding logical 20×20\times3 up to permutations of logical qubits. State preparation follows Steane-style encoding with transversal gates, ancilla registers, measurement, and post-selection (Liu et al., 7 Aug 2025).

3. Automorphism-assisted Hierarchical Addressing

The AHA construction is ConiQ’s mechanism for individually addressable logical gates inside densely packed concatenated blocks. Its starting point is the use of code automorphisms: permutations of physical qubits that map stabilizers to stabilizers and logical operators to logical operators. In the 20×20\times4 code, swapping physical qubits 20×20\times5 and 20×20\times6 implements a logical SWAP between the two logical qubits in the block, while swapping physical qubits 20×20\times7 and 20×20\times8 implements a logical CNOT between the two logical qubits (Liu et al., 7 Aug 2025).

ConiQ generalizes this automorphism principle to higher concatenation levels. A register at level 20×20\times9 is composed of lower-level registers arranged in a structured layout, and carefully chosen parallel SWAPs of rows or columns realize batched intra-register operations. The compiler then combines those batched operations with hierarchical selection. The addressing strategy is explicitly compared to binary search: starting from all logical qubits in a register, batched inter-register CNOTs and ancilla-assisted selection repeatedly halve the candidate subset until a single logical qubit is isolated (Liu et al., 7 Aug 2025).

The dominant cost in this procedure is not the logical operation itself but the error-correction cycles inserted between addressing stages. Even so, the reported advantage over distillation-based addressable logical CNOT is substantial. The paper states that AHA CNOT reduces spacetime product for a single logical CNOT by up to $2$0, and for multi-qubit operations such as $2$1-qubit GHZ preparation by up to $2$2 (Liu et al., 7 Aug 2025).

AHA is also used beyond CNOT. Addressable $2$3 is implemented by permutations that move the target logical qubit into a location where transversal $2$4 acts as the desired logical $2$5, followed by another permutation if needed. Non-Clifford $2$6 gates are implemented via magic-state preparation and teleportation, with the AHA CNOT serving as the coupling primitive between data and magic states (Liu et al., 7 Aug 2025).

4. Virtual Atom Intermediate Representation

VAIR is the compiler abstraction that makes ConiQ’s level-wise optimization possible. At level $2$7, the VAIR state is

$2$8

where $2$9 and $2$0 are ordered coordinate lists for AOD registers, $2$1 stores the index of an AOD register at $2$2 or $2$3, and $2$4 stores the index of an SLM register at integer coordinate $2$5 or $2$6 (Liu et al., 7 Aug 2025).

The significance of VAIR is that the instruction set at every concatenation level mirrors the physical neutral-atom instruction set. It includes transfers between AOD and SLM layers, order-preserving movement of AOD registers, and parallel one-register and two-register gadgets. In effect, a level-$2$7 register behaves like a “virtual atom” whose operations are structurally identical to level-$2$8 operations (Liu et al., 7 Aug 2025).

This recursive uniformity underlies the lowering rules. If a level-$2$9 register is composed of D2mD_{2m}0 level-D2mD_{2m}1 subregisters with offsets D2mD_{2m}2, then a level-D2mD_{2m}3 coordinate D2mD_{2m}4 is mapped to level-D2mD_{2m}5 coordinates

D2mD_{2m}6

and coordinate sets transform through tensor-product-style expansions such as

D2mD_{2m}7

Transfers, movements, and gadget schedules are then lowered by coordinate expansion rather than by flattening and resynthesizing the entire circuit (Liu et al., 7 Aug 2025).

The paper presents a greedy scheduling algorithm at each level. It repeatedly takes the current front layer of dependency-satisfied instructions, chooses an instruction type, computes the maximal subset that can be batched while obeying row-column and order-preserving constraints, emits one VAIR instruction, and removes the covered instructions. The key claim is that the legality of the schedule is preserved under lowering from level D2mD_{2m}8 to level D2mD_{2m}9, so optimizations discovered at high levels translate directly into physical savings (Liu et al., 7 Aug 2025).

5. Neutral-atom execution model and reported performance

ConiQ assumes a neutral-atom architecture with two trap layers: static SLM traps on a [[2m,2m2,2]].[[2m, 2m-2, 2]].0-D integer grid and movable AOD traps whose coordinates are given by ordered lists [[2m,2m2,2]].[[2m, 2m-2, 2]].1 and [[2m,2m2,2]].[[2m, 2m-2, 2]].2. The physical instruction set comprises transfers between AOD and SLM layers, order-preserving AOD movement, single-qubit gates on SLM atoms, and [[2m,2m2,2]].[[2m, 2m-2, 2]].3 operations between overlapping AOD-SLM pairs. Two hardware constraints are central: AOD atoms cannot cross during movement, and transfers and CZ gates obey a row-column constraint, acting on all selected row-column intersections (Liu et al., 7 Aug 2025).

The reported physical error model uses

[[2m,2m2,2]].[[2m, 2m-2, 2]].4

Within this model, the paper compares ConiQ against Atomique and Enola, both extended to handle many-hypercube codes by flattening to the physical level (Liu et al., 7 Aug 2025).

Several benchmark figures are emphasized. For state preparation with [[2m,2m2,2]].[[2m, 2m-2, 2]].5, the reported compilation times are [[2m,2m2,2]].[[2m, 2m-2, 2]].6 s for Atomique, [[2m,2m2,2]].[[2m, 2m-2, 2]].7 s for Enola, and [[2m,2m2,2]].[[2m, 2m-2, 2]].8 s for ConiQ. For logical CNOT with [[2m,2m2,2]].[[2m, 2m-2, 2]].9, Atomique times out after more than X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.0 h, Enola reports X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.1 s with distillation and X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.2 s with AHA, while ConiQ reports approximately X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.3–X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.4 s. For the same CNOT benchmark, the spacetime products are X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.5 for Enola plus distillation, X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.6 for Enola plus AHA, X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.7 for ConiQ plus distillation, and X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.8 for ConiQ plus AHA (Liu et al., 7 Aug 2025).

The paper also reports memory-style logical-error comparisons against surface codes. At X1X2X2m,Z1Z2Z2m.X_1 X_2 \cdots X_{2m}, \quad Z_1 Z_2 \cdots Z_{2m}.9, D4=[[4,2,2]]D_4 = [[4,2,2]]0 is reported to achieve better logical error than D4=[[4,2,2]]D_4 = [[4,2,2]]1 while using D4=[[4,2,2]]D_4 = [[4,2,2]]2 physical qubits per logical qubit versus D4=[[4,2,2]]D_4 = [[4,2,2]]3, a reduction of approximately D4=[[4,2,2]]D_4 = [[4,2,2]]4. The mixed code D4=[[4,2,2]]D_4 = [[4,2,2]]5 is reported to improve this to approximately D4=[[4,2,2]]D_4 = [[4,2,2]]6 (Liu et al., 7 Aug 2025).

These results are presented as evidence that concatenated many-hypercube codes, when compiled with ConiQ, are not merely asymptotically interesting but operationally competitive on neutral atom arrays.

6. Position in the literature and terminological ambiguity

In current arXiv-indexed literature, “ConiQ” refers specifically to the neutral-atom quantum compiler described above (Liu et al., 7 Aug 2025). The surrounding literature, however, contains several near-homonymous terms that are technically unrelated.

In image quality assessment, “ConiQ” is described as almost certainly referring to KonIQ-10k, a large-scale, ecologically valid IQA database containing D4=[[4,2,2]]D_4 = [[4,2,2]]7 natural images with crowdsourced subjective quality scores (Lin et al., 2018). In mathematical reasoning, Conic10K is a conic-section dataset with D4=[[4,2,2]]D_4 = [[4,2,2]]8 open-ended problems, formal representations, and solution rationales (Wu et al., 2023). In knowledge-graph reasoning, ConE is a cone-embedding model for first-order logical queries with conjunction, disjunction, and negation (Zhang et al., 2021), while RConE extends that cone-based geometric paradigm to multi-modal knowledge graphs with a rough-cone representation (Kharbanda et al., 2024). In quantum optimization, a separate line of work develops a universal quantum conic programming framework for hard-constrained combinatorial optimization problems, generalizing Quantum Conic Programming through a generalized eigenvalue formulation (Binkowski et al., 2024). A further neighboring acronym is CONTRIQUE, the CONTRastive Image QUality Evaluator for no-reference IQA (Madhusudana et al., 2021).

A common misconception is therefore to treat “ConiQ” as a generic label for cone-based models, conic datasets, or contrastive IQA. In the specific 2025 usage, it denotes a compiler for concatenated quantum error correction on neutral atom arrays, centered on AHA logical gates and VAIR-based hierarchical lowering (Liu et al., 7 Aug 2025).

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