RASCqL: qLDPC Fault-Tolerant Quantum Architecture

• RASCqL is a reaction-time-limited architecture using qLDPC codes as specialized compute modules for critical quantum subroutines.
• It employs cross-layer co-design by embedding native complex Clifford instructions as matrix automorphisms to reduce space-time costs.
• The design leverages reconfigurable neutral-atom arrays to enable fast predictive resource preparation and constant expected reaction times.

Searching arXiv for the specific topic and closely related papers. RASCqL, short for Reaction-time-limited Architecture for Space-time-efficient Complex qLDPC Logic, is a qLDPC-based complex-instruction-set quantum computer (CISQ) architecture for fault-tolerant quantum computing. It is designed to make qLDPC codes useful not only as low-footprint quantum memories but also as compute modules for the dominant subroutines in practical workloads, especially quantum arithmetic, table lookups, and magic-state distillation. The architecture is presented as a cross-layer co-design spanning the functional, logical, and physical layers, with an application-tailored code-modification scheme that embeds specific complex Clifford instructions as virtually implementable matrix automorphisms and with an implementation path on reconfigurable neutral-atom array hardware (Yang et al., 15 Feb 2026).

1. Conceptual motivation and architectural stance

RASCqL is motivated by a tension in fault-tolerant quantum computing. The paper starts from a three-layer stack consisting of a functional layer for algorithms, a logical layer for QECCs and logical ISA, and a physical layer for hardware. Within that stack, surface codes are described as having a simple and expressive logical ISA and being hardware-friendly on planar devices, but they incur large overheads that scale roughly quadratically with distance, leading to very large footprints. By contrast, qLDPC codes can offer high rate and lower footprint, but existing logical-gate constructions are often too limited, too hardware-demanding, or not space-time efficient enough for real algorithms (Yang et al., 15 Feb 2026).

The central shift in RASCqL is therefore not to make each qLDPC block support a full universal RISC-style logical ISA. Instead, it adopts a CISQ viewpoint: each qLDPC code block is co-designed to support a limited but useful set of native logical instructions that directly match the subroutines dominating fault-tolerant workloads. The paper argues that useful applications often reduce to a small number of repeated kernels, notably adders / arithmetic, QROM / table lookup, magic-state distillation and injection, and reactive measurements and fan-outs. In that sense, RASCqL treats qLDPC blocks as specialized accelerators rather than universal logical substrates.

This stance is application-tailored rather than fully general. The paper explicitly contrasts RASCqL with prior qLDPC logic constructions that aim at versatile ISAs amenable to diverse circuits. Its claim is narrower: if a qLDPC code can execute the dominant kernels of relevant applications efficiently, then it can be practically useful even without a general-purpose in-block logical ISA. A plausible implication is that RASCqL trades universality for subroutine-level efficiency in a controlled and explicit way.

2. Core components and execution model

RASCqL is organized around three named components: CQLU, PReP, and an RNAA implementation (Yang et al., 15 Feb 2026).

Component	Expansion	Role
CQLU	Complex Quantum Logic Units	qLDPC code blocks tailored to a limited but useful native instruction set
PReP	Predictive Resource-state Preparation	Pre-provisions and pipelines resource states such as $\ket{T}$, $\ket{i}$, and $\ket{GHZ}$
RNAA implementation	Reconfigurable neutral-atom array implementation	Physical compiler and layout using parallel motion, AOD-based shuttling, transversal operations, and fast QEC cycles

The phrase “reaction-time-limited” refers to a compilation and execution model in which runtime is dominated by how quickly the system can react to measurement outcomes and consume pre-prepared resource states. In this model, some operations are performed offline through predictive state preparation, after which the online program can proceed with $O(1)$ expected reaction time for reactive measurements and non-native gates while keeping the footprint low. This execution model is tightly connected to PReP, which pipelines resource states such as $\ket{T}$, $\ket{i}$, and $\ket{GHZ}$.

The CQLU abstraction is the architectural core. These units are qLDPC code blocks specifically tailored to support a restricted set of native logical instructions. The paper presents this as the logical analogue of a complex instruction set: the architecture does not attempt to expose all operations uniformly, but instead aims to make a small set of functionally important transformations cheap and parallelizable within the code block itself.

The RNAA implementation supplies the hardware-level realization. The paper describes a physical compiler and layout on reconfigurable neutral-atom array hardware using parallel atom motion, AOD-based shuttling, transversal operations, and fast QEC cycles. This hardware choice is not incidental; it is part of the co-design premise that the code, instruction set, runtime model, and physical substrate should all be aligned.

3. Code modification and matrix automorphisms

One of the technical centers of RASCqL is its method for embedding useful logical Clifford instructions as virtually implementable matrix automorphisms (Yang et al., 15 Feb 2026).

For a binary linear code $\mathcal{C}(G,H)$ with generator matrix $G$, a permutation $\sigma$ is a code automorphism if there exists $\ket{i}$0 such that

$\ket{i}$1

For quantum CSS/qLDPC codes, the paper states that a stronger condition is needed: the permutation must also preserve the check matrix structure,

$\ket{i}$2

for some row permutation $\ket{i}$3. When this holds, the automorphism can be implemented as a virtual qubit relabeling, i.e. without physical cost.

The code-construction idea is to begin with a qLDPC code, choose a useful logical Clifford instruction group $\ket{i}$4, and modify the code so that $\ket{i}$5 is embedded as automorphisms. The paper gives an Automorphism Completion theorem:

Given a $\ket{i}$6 code $\ket{i}$7 and $\ket{i}$8, there exists a family of codes $\ket{i}$9 with $\ket{GHZ}$0 such that $\ket{GHZ}$1.

The construction is explicit:

$\ket{GHZ}$2

The paper then addresses whether this preserves low density. It states that if $\ket{GHZ}$3 is $\ket{GHZ}$4-bounded and each $\ket{GHZ}$5 is $\ket{GHZ}$6-bounded, then a new check matrix can be built with bounded weight such as

$\ket{GHZ}$7

depending on the construction variant. This is presented as evidence that the modification need not destroy the LDPC property.

RASCqL further refines the requirement from ordinary automorphism to matrix automorphism. The condition is described as invariance of the rows of $\ket{GHZ}$8 under right action by $\ket{GHZ}$9:

$O(1)$0

The paper also gives a conversion theorem: given a code and a set of automorphisms $O(1)$1, there exists an augmented check matrix $O(1)$2 with at most $O(1)$3 rows such that every $O(1)$4 becomes a matrix automorphism; if $O(1)$5 is $O(1)$6-bounded, then $O(1)$7 can be made $O(1)$8-bounded. This is the formal mechanism by which complex Clifford instructions become virtual permutations compatible with the quantum code.

4. Supported subroutines and logical functionality

RASCqL is designed around the claim that many practical workloads are dominated by a small collection of recurring subroutines, and that a qLDPC architecture should optimize those directly rather than expose a uniform universal ISA (Yang et al., 15 Feb 2026).

For quantum arithmetic, the paper specifically compiles Gidney’s ripple-carry adder, which uses about $O(1)$9 $\ket{T}$0-gates for an $\ket{T}$1-bit adder. The MAJ/UMA blocks are rewritten so that many Clifford components become CQLU-native. The paper lists 3-bit fan-outs/fan-ins inside MAJ blocks as being implemented using the automorphism CNOT $\ket{T}$2, global Hadamards, and transversal CNOTs. It further states that Bell-pair preparation and measurement are handled by transversal logical operations and bridge qubits in separate qLDPC blocks, and that Clifford corrections are propagated through measurements, producing reactive measurements. The result is that the “gray-box” part of the adder becomes mostly parallelizable and cheap in-block.

For table lookups / QROM, the paper observes that QROM constructions can be built from Toffoli ladders and CNOT fan-outs. Since $\ket{T}$3 states can implement fan-outs, the same CISQ machinery is presented as supporting QROM-like subroutines.

For magic-state distillation, the paper focuses on the Hastings–Haah family, including $\ket{T}$4-style protocols. It states that RASCqL can prepare stabilizer and resource states in qLDPC blocks, inject noisy magic states through a universal adapter, and execute the Clifford part of distillation with the CQLU ISA. At the same time, the paper is explicit that magic-state production remains expensive and that magic-state injection remains a bottleneck.

Across these cases, the architecture’s recurring theme is the use of in-block native Clifford structure, predictive resource provisioning, and reactive measurements with constant expected reaction time. This suggests a logical organization in which non-Clifford cost is shifted into prepared resources, while as much of the Clifford scaffolding as possible is absorbed into code-specific native actions.

5. Hardware substrate and neutral-atom realization

RASCqL targets reconfigurable neutral-atom array (RNAA) platforms because the paper regards them as particularly well matched to qLDPC logic with structured permutations and transversal operations (Yang et al., 15 Feb 2026).

The RNAA platform is described as offering parallel atom movement using optical tweezers or AODs, mid-circuit movement and measurement, long coherence times, and support for large-scale arrays, with the paper citing demonstrations up to 6100 qubits. These features are important because many qLDPC logical operations require global or structured permutations, which neutral atoms can realize through parallel shuttling.

The paper reports QEC cycles in the millisecond scale, with representative logical cycle times of $\ket{T}$5 ms for the $\ket{T}$6 code, $\ket{T}$7 ms for $\ket{T}$8, and $\ket{T}$9 ms for $\ket{i}$0 and $\ket{i}$1. The architecture uses systolic schedules for syndrome extraction, movement schedules that preserve check ordering, and virtual relabeling for automorphism gates whenever possible.

A physical noise model is also discussed, in which movement, gates, and idle periods all contribute to error. Under that model, the paper reports an empirical circuit-level threshold around $\ket{i}$2 for the HGPS codes in the RNAA setting. This is used to support the claim that the proposed hardware mapping is not merely abstract but is compatible with simulated fault-tolerant operation in the intended regime.

The hardware choice also clarifies why RASCqL emphasizes transversal operations and virtual relabeling. The paper’s physical argument is that neutral-atom arrays can efficiently support the non-local reconfiguration patterns that would be awkward on planar nearest-neighbor architectures, making them a natural substrate for qLDPC codes treated as CISQ compute modules.

6. Space-time costs, comparative results, and limitations

RASCqL is evaluated against state-of-the-art transversal surface-code architectures on RNAA hardware, and the reported gains are explicitly subroutine-dependent rather than universal (Yang et al., 15 Feb 2026).

The abstract and evaluation report up to $\ket{i}$3 to $\ket{i}$4 footprint reduction at realistic physical error rates of

$\ket{i}$5

For adders, the paper reports up to $\ket{i}$6 footprint reduction and about $\ket{i}$7 Clifford-volume reduction, while remaining competitive even if reaction time is $\ket{i}$8 the surface-code baseline reaction time. The stated reason is that the surface-code adder requires more simultaneously live patches, including extra patches for $\ket{i}$9 corrections that must persist through sequential reactive measurements.

For $\ket{GHZ}$0 preparation, the paper reports more than $\ket{GHZ}$1 qubit-footprint reduction and similar savings in space-time volume. For magic-state distillation, it reports up to $\ket{GHZ}$2 footprint reduction, but also notes that space-time volume can be $\ket{GHZ}$3 worse in some settings because magic-state injection remains costly; the paper explicitly states that this volume may improve with better qLDPC-native injection schemes.

The paper’s broader architectural conclusion is therefore qualified. It does not claim that qLDPC codes dominate surface codes in all respects. Rather, it argues that for important FTQC kernels, a qLDPC CISQ architecture can be competitive in space-time while significantly reducing footprint. The final message is that qLDPC codes are not merely good memories; they can be practical compute accelerators if their logical layer is co-designed around the subroutines that real algorithms actually use.

The limitations are also stated directly. Resource-state provisioning is still a systems challenge, decoder latency may be optimistic, and more work is needed to search for better qLDPC codes and to improve magic-state injection. This suggests that RASCqL is best understood as a concrete architectural direction rather than a complete endpoint. Its significance lies in demonstrating a viable path by which qLDPC codes can become specialized CISQ compute modules with meaningful footprint savings and competitive space-time costs under realistic physical error rates.