SPAD Simulation Pipeline Overview

• SPAD simulation pipelines are comprehensive frameworks integrating physical, statistical, and circuit-level models to capture avalanche, photon detection, and noise behaviors.
• They employ Monte Carlo, drift-diffusion, and circuit simulation techniques to optimize device parameters for applications like quantum cryptography, LIDAR, and passive imaging.
• Validation against experimental data and statistical post-processing enable rapid prototyping and performance optimization across various SPAD configurations.

A Single-Photon Avalanche Diode (SPAD) simulation pipeline is a multi-layered computational methodology developed to model the physical, statistical, and circuit-level behavior of avalanche breakdown, photon detection, stochastic noise, and temporal readout in solid-state single-photon detectors. These simulation frameworks are essential for design optimization, system-level performance prediction, and the creation of synthetic datasets for algorithm validation in domains ranging from quantum cryptography, time-of-flight imaging, quantum photonics, and passive low-light imaging to photonic circuit integration. Modern SPAD simulation pipelines combine Monte Carlo transport, Poisson–Drift–Diffusion solvers, statistical thinning, correlated noise modeling, circuit simulation, and statistical post-processing to capture the full spectrum of deterministic and stochastic SPAD behaviors.

1. Physical and Computational Foundations

SPAD simulation pipelines are built on the interplay between carrier transport physics, stochastic impact ionization, circuit response, and noise processes. At their core, SPAD simulators solve the charge transport and avalanche build-up phenomena, often using Monte Carlo techniques coupled to Poisson’s equation for the electric field. For instance, in the 3D particle-based pipeline described by (Dollfus et al., 19 Dec 2025), each carrier is propagated in the local electrostatic field (solution of ∇·[ε(r)∇φ(r)] = ρ(r)), with instantaneous scattering and ionization rates based on the electronic band structure and phonon, impurity, and intervalley interactions. The local probability of impact ionization is sampled at each step, leading to the stochastic creation of new carrier pairs and possible avalanche onset.

In more device-focused simulations (e.g., (Yanikgonul et al., 2019, Li et al., 2023)), the geometry, doping profiles, and field distribution are set via TCAD or 1D/2D Poisson solvers, with the avalanche process treated by Random Path-Length (RPL) methods or drift-diffusion equations. The avalanche is detected when the induced current crosses a device-specific threshold, implementing the generalized Shockley–Ramo theorem:

$$I(t) = \sum_i q_i\,\mathbf{v}_i(\mathbf{r}_i)\cdot\mathbf{F}_0(\mathbf{r}_i)$$

where q is the carrier charge, $\mathbf{v}_i$ is the velocity, and $\mathbf{F}_0$ is the unit-bias weighting field.

Photon detection is simulated through quantum efficiency, absorption probability, and avalanche triggering models, with statistical thinning of Poisson photon arrivals by device-dependent detection probability (PDP).

2. Stochastic Avalanche, Quenching, and Circuit Interaction

The stochastic nature of avalanche triggering is modeled via local field-dependent ionization rates, e.g., Keldysh-type or Miller–Okuto–Crowell models:

$$\alpha_n(F) = A_n\,\exp[-B_n/F], \quad \alpha_p(F) = A_p\,\exp[-B_p/F]$$

For each carrier, the mean-free-path to ionization is sampled, and upon exceeding the threshold energy and path, a new electron–hole pair is spawned, feeding the multiplication process.

Quenching—necessary to restore detector readiness—is simulated by coupling the device to an external quenching circuit, frequently a resistor–capacitor network (RQ, CQ) governed by:

$$CQ \frac{dV_{\text{SPAD}}}{dt} = (V_{\text{BIAS}}-V_{\text{SPAD}})/RQ - I_{\text{SPAD}}$$

At each picosecond-scale time-step, the device current is evaluated from the Monte Carlo carrier ensemble, updating the boundary conditions and circuit voltage for the next cycle (Dollfus et al., 19 Dec 2025). Successful quenching is identified when the device voltage falls below breakdown and no ionization events occur within a specified timeout.

Statistical analysis across $N_{\text{sim}} \gg 10^4$ simulated photon events yields aggregate quantities:

• Avalanche probability $P_{\text{av}}$
• Quenching probability $P_{\text{qu}}$
• Joint probability $P_{\text{AQ}} = P_{\text{av}} \cdot P_{\text{qu}}$
• Avalanche build-up time distribution $\langle t_A \rangle$

A strong inverse correlation between $P_{\text{av}}$ and $P_{\text{qu}}$ with respect to overbias is commonly observed, mandating trade-offs during device optimization (Dollfus et al., 19 Dec 2025).

3. Noise Mechanisms, Model Integration, and Statistical Post-processing

Modern pipelines integrate a suite of correlated and uncorrelated noise processes, reflective of both device-intrinsic and extrinsic origins. Core elements include:

• Dark Count Rate (DCR): Simulated as a Poisson process or via band-to-band/trap-assisted tunneling models, with rates determined by temperature, layer thickness, and field profiles (Ma et al., 2016, Suonsivu et al., 19 Jan 2026, Peña-Rodríguez et al., 2024).
• Afterpulsing: Modeled by triggering secondary avalanches after a dead time, with exponential delays reflecting carrier trap lifetimes. The fraction is set either by geometric or empirical probability ($P_{ap}$) (Hernandez et al., 2017).
• Optical Crosstalk: Simulated as a chain process where an avalanche in one cell can trigger neighbors, governed by a fitted crosstalk probability ($P_{ct}(d)$) (Peña-Rodríguez et al., 2024, Hernandez et al., 2017), though in some imagers is negligible (Suonsivu et al., 19 Jan 2026).
• Pile-up and Dead Time: Implemented as logical hold-off, suppressing photon or noise triggers within $\tau_d$ of the previous event, critical for high-flux and asynchronous regimes (Suonsivu et al., 19 Jan 2026).

The full measurement record for a single pixel or array element is thus given by successive filtering and superposition:

$$y(t) = [\mathrm{Thin}_q\{x(t)\}] \cup n_{\rm DC}(t) \cup n_{ap}(t)$$

subject to dead-time suppression (Suonsivu et al., 19 Jan 2026).

Time-resolved outputs are binned into histograms or per-pixel event lists, supporting downstream flux estimation or temporal analysis. The pipeline supports both asynchronous (photon timestamp streams) and synchronous (frame- or first-photon per frame) modalities.

4. Implementation Workflow, Algorithmic Stages, and Performance Considerations

A typical pipeline proceeds through multiple algorithmic stages, which are largely modular and highly parallelizable:

1. Initialization: Device geometry, doping, and mesh generation; bias and quenching circuit parameters; quantum efficiency and noise model calibration from empirical data (Dollfus et al., 19 Dec 2025, Ma et al., 2016).
2. Carrier Transport and Avalanche Simulation: Stochastic or deterministic propagation of carriers via 1D/2D/3D Monte Carlo or drift-diffusion solutions. Avalanche detection via current thresholding and carrier multiplication.
3. Circuit Coupling and Quenching: Explicit numerical integration of parallel circuit equations, updating device boundary conditions and enforcing dead time or depletion region reset upon quenching.
4. Noise and Signal Event Generation: Sampling and merging of incident photon events, dark and afterpulsing streams, and application of optical crosstalk, pile-up, and detection windows (Peña-Rodríguez et al., 2024, Hernandez et al., 2017, Suonsivu et al., 19 Jan 2026).
5. Time Histogramming and Flux Reconstruction: Binning of outputs (timestamps, binary frames, pulse amplitudes), supporting downstream analysis and integration with algorithm or hardware pipelines.
6. Statistical Aggregation: Repetition over $N_{\text{sim}}$ events for estimation of probabilities, timing metrics, and uncertainty quantification.

Performance optimization leverages reduced device cross-sections, event-driven MC loops, parallel (threaded or GPU-accelerated) computation, frozen-field approximations for early jitter, and precomputation of statistical tables (Dollfus et al., 19 Dec 2025, Yanikgonul et al., 2019, Peña-Rodríguez et al., 2024).

5. Validation, Device Trade-offs, and Experimental Corroboration

Pipelines are validated by benchmarking simulation outputs against experimental measurements:

• Time-Correlated Single-Photon Counting (TCSPC) impulse responses and timing jitter histograms
• Count-rate statistics, DCR, afterpulse, and crosstalk fractions for commercial SPADs and SiPM arrays
• Comparison of synthetic versus real data in imaging scenarios (e.g., synthetic SPAD-MNIST performance on real sensor images) (Suonsivu et al., 19 Jan 2026, Hernandez et al., 2017, Peña-Rodríguez et al., 2024)

Parametric sweeps reveal trade-offs such as the inverse $P_{\text{av}}$–$P_{\text{qu}}$ relationship, DCR–PDE curves, and the effects of bias, circuit, and material modifications (e.g., Ge SPADs achieving higher $P_{\text{qu}}$ at lower $V_{\text{BIAS}}$) (Dollfus et al., 19 Dec 2025, Ma et al., 2016).

Pipelines enable rapid device optimization, e.g., maximizing secure key rate and operational distance for QKD (Ma et al., 2016), tuning count rates versus dead time, and selecting doping/circuit parameters for desired PDE/jitter/DCR performance.

6. Applications and Adaptations

SPAD simulation pipelines underpin a wide range of research and application domains:

Application Domain	Key Features Modeled	Citations
Quantum Photonics	Avalanche build-up/jitter, PDE, DCR, device scaling	(Yanikgonul et al., 2019)
LIDAR/Depth Imaging	Time-of-flight, event histograms, CRB analysis	(Scholes et al., 2022)
Passive Imaging	Photon-thinning, dark/afterpulse, dead time, pile-up	(Suonsivu et al., 19 Jan 2026)
Quantum Key Distr.	PDE/DCR modeling, QKD performance metrics	(Ma et al., 2016)
SiPM Array Detectors	Multipixel crosstalk, amplitude statistics, noise	(Peña-Rodríguez et al., 2024)
Nanowire Devices	Drift-diffusion, timing jitter, scaling	(Li et al., 2023)

Adaptation to new materials (e.g., InGaAs, InP, GaAs, Ge) or circuit schemes (active/passive quenching, array geometries) requires only modification of band structure models, ionization rates, noise parameters, and circuit descriptions (Dollfus et al., 19 Dec 2025, Li et al., 2023).

7. Limitations, Extensions, and Outlook

Current simulation pipelines offer high fidelity to real SPAD behavior but face several inherent limitations:

• Pixel-to-pixel nonuniformity can be underrepresented (real sensors exhibit “hot”/“lazy” pixels).
• Extremely high-flux nonlinearities and pile-up distortions may require more advanced queueing models beyond simple dead-time suppression (Suonsivu et al., 19 Jan 2026).
• Crosstalk and afterpulsing parameterization remains empirical and device-specific.
• Optical and package-level effects (e.g., microlens alignment, interconnect capacitance) may necessitate extension to full 3D field solvers and mixed-mode SPICE/Verilog-A integration.

Extension to multi-pixel and large-scale SPAD arrays, system-level simulation for imaging, and integration with transient rendering engines and learning-based pipelines is routinely accomplished by leveraging modular, parallel simulation frameworks (Peña-Rodríguez et al., 2024, Suonsivu et al., 19 Jan 2026, Scholes et al., 2022).

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In summary, SPAD simulation pipelines constitute a multi-disciplinary framework coupling semiconductor physics, stochastic process theory, circuit dynamics, and statistical data processing, validated by direct comparison to device measurements and demonstrating adaptability to diverse device platforms and imaging/configuration paradigms (Dollfus et al., 19 Dec 2025, Hernandez et al., 2017, Yanikgonul et al., 2019, Ma et al., 2016, Scholes et al., 2022, Li et al., 2023, Peña-Rodríguez et al., 2024, Suonsivu et al., 19 Jan 2026).