GHz-Gated InGaAs/InP SPAD Arrays

• GHz-gated InGaAs/InP SPAD arrays are integrated optoelectronic detectors combining InGaAs/InP semiconductor technology with GHz gating to enable single-photon detection at telecom wavelengths.
• They employ advanced SAGCM/SACGM architectures, self-differencing readout, and hybrid integration techniques to achieve low dark count rates, minimal afterpulsing, and precise timing jitter.
• These arrays support high-speed quantum key distribution, lidar, and near-infrared imaging by offering scalable, miniaturized designs with robust temperature regulation and high photon detection efficiency.

GHz-gated InGaAs/InP single-photon avalanche diode (SPAD) arrays are integrated optoelectronic systems combining indium gallium arsenide/indium phosphide (InGaAs/InP) devices with high-frequency electronic gating and sophisticated readout architectures. They represent a mature technology for single-photon detection at telecom wavelengths (e.g., 1550 nm), providing essential capabilities for quantum key distribution (QKD), quantum information processing, and advanced photon-counting instrumentation. These arrays are characterized by their ability to operate at gate-pulse repetition rates in the gigahertz regime while maintaining low dark count rates, minimal afterpulsing, and high photon detection efficiency through advanced device structuring, miniaturization, and hybrid integration techniques.

1. Device Structure, Array Architecture, and Gating Methodologies

InGaAs/InP SPAD arrays leverage the separate absorption, grading, (charge,) and multiplication (SAGCM/SACGM) structure, optimized for near-infrared detection at 1550 nm (Dolphin et al., 5 Sep 2025, Yu et al., 13 Aug 2024, Ma et al., 2016). Typical devices consist of planar InGaAs absorption layers coupled to InP multiplication regions, with bandgrading to suppress carrier accumulation and charge-control layers to tune the internal electric field profile.

Arrays may be configured in linear or two-dimensional formats, with collective GHz gating architecture. For instance, in a recent hybrid-integrated array, a 1 GHz square-wave is applied to all cathodes, while individual DC biasing of each SPAD anode allows fine per-pixel excess bias tuning (Dolphin et al., 5 Sep 2025). Self-differencing or capacitance-balancing techniques are used for readout, suppressing the large gating transients and isolating weak avalanche signals.

Monolithic integration of readout circuits via low-temperature co-fired ceramics (LTCC) or system-in-package (SiP) technology yields modules with footprints as small as 6 × 5.7 × 1.7 cm³ (Xu et al., 6 Mar 2025, Zhengyu et al., 5 Jan 2024, Jiang et al., 2017). In such modules, functions include GHz sine wave generation, phase/amplitude modulation, active delay control, and real-time gate monitoring. Each SPAD typically has an aperture diameter of 20–25 μm, supporting efficient multimode fiber or waveguide coupling (Dolphin et al., 5 Sep 2025).

2. High-Frequency Gate Driving and Signal Extraction

GHz gating in SPAD arrays exploits narrow gate windows (110–400 ps) created by large-amplitude sine (or square) waves, restricting the active period to a small fraction of each cycle (Liang et al., 2012, Xu et al., 6 Mar 2025, Zhang et al., 2010). This temporal narrowing minimizes the probability of dark and afterpulse events by limiting the duration for avalanche formation.

The gating signal, e.g. $V(t) = V_b + V_{pp} \sin(2\pi f t)$ for sine gating, is delivered through integrated circuits capable of >10 V peak-to-peak amplitudes, with digital phase shifters permitting sub-15 ps gate timing adjustment (Xu et al., 6 Mar 2025). Low-pass or ultra-narrowband interference circuits (UNICs) employing surface acoustic wave (SAW) filters are critical for extracting weak photon-induced avalanches and suppressing the capacitive response at the gating frequency, achieving up to 80 dB rejection per stage, with cascaded architectures yielding >100 dB (Fan et al., 2023, Zhengyu et al., 5 Jan 2024).

3. Crosstalk Mitigation and Waveguide Coupling Strategies

In densely packed GHz-gated arrays, inter-pixel crosstalk is a principal concern. Under short gate operation ($\sim$400 ps window at 1 GHz), the time for crosstalk processes to complete is longer than the gate duration, reducing synchronous crosstalk probabilities to <0.1% (order of magnitude improvement relative to previous designs) (Dolphin et al., 5 Sep 2025). Asynchronous crosstalk, measured outside the gate, is similarly suppressed.

Hybrid integration with silica planar waveguides employs quasi-planar coupling (QPC), where an angled facet on the chip directs light vertically into SPAD apertures for coupling losses down to 0.22–0.68 dB/channel and optical mode-matching to the detector area (Dolphin et al., 5 Sep 2025). This approach allows for array scalability and individual pixel bias compensation.

4. Performance Metrics: Detection Efficiency, Dark Counts, and Afterpulsing

Recent advances have yielded arrays and modules exhibiting the following metrics:

Device/Array	PDE (%)	DCR (kcps)	Afterpulse (%)	Gate Frequency (GHz)	Gate Width (ps)
Array (QKD receiver) (Dolphin et al., 5 Sep 2025)	15	<8/pixel (as low as ~2)	<4	1	400
Compact module (Xu et al., 6 Mar 2025)	40	9	4.6	1.25	117
Miniaturized module (Jiang et al., 2018)	30	2	8.8	1.25	138
UNIC module (Zhengyu et al., 5 Jan 2024)	30	0.22 (8 ×10⁻⁷ per gate)	2.4	1.25	140
High-PDE SPD (Fang et al., 2020)	60	340	14.8 (~5.5 at 40% PDE)	1.25	--

The photon detection efficiency (PDE) can be measured as $$PDE = -\frac{1}{\mu}\ln\left(1-\frac{S_p}{f}\right)$$ (Xu et al., 2023), where $\mu$ is the mean photon number per pulse, $S_p$ the detected count rate, and $f$ the repetition frequency. Typical afterpulse probabilities fall below 5% at high PDE and optimized hold-off (100–200 ns), with dark count probabilities per gate often on the order of $10^{-6}$ to $10^{-7}$ (Zhengyu et al., 5 Jan 2024, Jiang et al., 2018).

5. Afterpulsing, Timing Jitter, and Quenching Techniques

Afterpulsing arises from carrier trapping during the avalanche process. Its probability decreases with reduced avalanche charge (via shorter gate windows, lower excess bias), improved material quality, and integration of active quenching elements (e.g. thin film resistors for NFADs or fast electronics) (Yu et al., 13 Aug 2024, Xu et al., 2023). State-of-the-art modules report afterpulsing probabilities down to 0.5–2.4% for detection efficiencies of 21–30% at temperatures as low as –30°C (Fan et al., 2023, Zhengyu et al., 5 Jan 2024).

Timing jitter, the FWHM variance in the time of photon detection, in advanced GHz-gated SPADs is measured as low as 44–119 ps (Dolphin et al., 5 Sep 2025, Shaw et al., 2021, Jiang et al., 2018). Jitter reduction is enabled by optimized multiplication layer thickness, fast readout electronics, and precise gate timing alignment.

6. System Integration, Miniaturization, and Environmental Stability

Recent technology demonstrates complete system integration of SPAD, readout, amplitude/phase control, and temperature regulation on miniaturized PCBs or silicon packages (Xu et al., 6 Mar 2025, Zhengyu et al., 5 Jan 2024). Integrated modules achieve stabilization of both bias and gate parameters via FPGA, maintain operational temperature to ±0.03°C (crucial for dark count and breakdown voltage stability), and include multi-channel fiber interfaces for scalable arrays.

UNICS and MIRCs implemented with temperature compensation provide stable 70–80 dB gating rejection over wide ambient fluctuations, supporting robust operation in practical environments (Zhengyu et al., 5 Jan 2024).

7. Quantum Key Distribution and Application Demonstrations

GHz-gated InGaAs/InP SPAD arrays directly enable high-speed QKD receivers, with demonstrated secure key rates exceeding 2 Mbps at short distances and persistent positive key rates up to 15 kbps over 100 km of fiber (Dolphin et al., 5 Sep 2025). The combination of scalable silicon/silica waveguide integration, low crosstalk, high PDE, and minimized error rates meets practical QKD security thresholds. These arrays are also deployed for ultrafast lidar, time-correlated photon counting, and near-infrared imaging, with design principles (such as adjustable deadtime and temperature stability) generalized to advanced photon-counting applications (Yu et al., 2017, Zhang et al., 2015, Xu et al., 2023).

Summary and Outlook

GHz-gated InGaAs/InP SPAD arrays combine advances in III–V compound semiconductor device engineering, RF circuit design, and hybrid photonic integration to yield near-infrared detectors capable of synchronous, low-noise, single-photon counting for quantum and photonic applications. Critical to their performance are optimized SAGCM/SACGM architectures, collective GHz gating, sub-nanosecond gate windows, monolithic readout circuits, crosstalk suppression, and temperature/regulation compensation. Secure QKD implementations and compact, multi-pixel systems are now feasible without cryogenic cooling, and continued improvements in material quality, electronic integration, and scalable coupling strategies are anticipated to further enhance device efficiency, array scalability, and system robustness in quantum photonics (Dolphin et al., 5 Sep 2025, Xu et al., 6 Mar 2025, Zhengyu et al., 5 Jan 2024, Fan et al., 2023, Yu et al., 13 Aug 2024).

Common misconceptions: While Si SPAD arrays achieve lower noise and afterpulsing, InGaAs/InP GHz-gated arrays now offer competitive PDE and timing jitter at telecom wavelengths. Backflash side-channel emission, although present, has been characterized to induce minimal secure key rate penalty in fast-gated (GHz) SPADs (Koehler-Sidki et al., 2020).

Controversies and challenges: Continued progress requires further integration of gating electronics and waveguide/array architecture, as well as developments in defect suppression and electric field optimization to minimize noise, afterpulsing, and maintain PDE at or above 40–60%, with timing jitter approaching 50 ps for time-resolved applications.