OQC Toshiko Gen-1 Quantum Processor

• OQC Toshiko Gen-1 is a superconducting quantum processor that uses 32 fixed-frequency coaxmon transmons in a planar lattice, ensuring uniform connectivity and high coherence.
• It implements high-fidelity native two-qubit Echo Cross Resonance (ECR) gates optimized through pulse-level error suppression methods like DRAG shaping and virtual-Z compensation.
• Benchmarking shows a significant error-per-gate reduction—from 4.6% to 1.2% on a 16-qubit chain—demonstrating its potential for scalable, fault-tolerant quantum circuits.

The OQC Toshiko Gen-1 system (“Tokyo” QPU) is a @@@@1@@@@ designed and implemented by Oxford Quantum Circuits (OQC) featuring high-fidelity native two-qubit Echo Cross Resonance (ECR) gates optimized via pulse-level error suppression strategies. It comprises a planar lattice of 32 fixed-frequency coaxmon transmons with engineered connectivity, coherence, and readout characteristics. The system demonstrates substantial error reduction for two-qubit operations through integrated pulse shaping and compensation, achieving improved uniformity and reliability critical for near-term quantum circuit execution and informing scalable, fault-tolerant hardware design (Ward et al., 28 Jan 2026).

1. Hardware Architecture and Readout

The Toshiko Gen-1 quantum processing unit features 35 coaxmon transmons (32 lattice-connected, remainder reserved), fabricated on sapphire to support exceptional coherence. Each transmon operates at a fixed frequency within 4.24–4.53 GHz, with typical anharmonicity α ~ –182 MHz. The median energy relaxation time $T_{1}$ is 69 μs, and Hahn-echo dephasing time $T_{2e}$ is 103 μs, resulting in robust single-qubit operations.

Control and readout wiring exploits a 3D “coaxmon” design: all microwave control lines terminate out-of-plane as coaxial pins, minimizing substrate crosstalk and stray coupling (as referenced to Rahamim et al.). Readout resonators are distributed in the 9.63–10.27 GHz range, achieving a median single-shot readout fidelity of 96%. Nearest-neighbor capacitive coupling strengths are $J$ ≈ 2.7 MHz, facilitating the deployment of cross-resonant two-qubit gates.

Parameter	Value
Qubit frequency range (GHz)	4.24–4.53
Anharmonicity α (MHz)	–182
Median T₁ (μs)	69
Median T₂ₑ (μs)	103
Typical J coupling (MHz)	2.7
Readout frequ. range (GHz)	9.63–10.27
Median readout fidelity (%)	96
Single-qubit SX fidelity (%)	99.9

The architectural focus is on uniform connectivity and low-control crosstalk, establishing the platform's suitability for error-budgeted, scalable quantum information processing.

2. Native Two-Qubit Gate: Echo Cross Resonance (ECR)

The primary entangling operation is the ECR(π/4) gate, implemented as an echoed cross-resonant microwave pulse sequence mediated by the control qubit. The logical gate composition is expressed as:

ZX(π/4)₍cr₎ — X(π)₍ctrl₎ — ZX(–π/4)₍cr₎

Each ZX(±π/4) pulse is a cross-resonant excitation (duration τ₁ ≈ 250–460 ns depending on qubit detuning), shaped as a Gaussian envelope with single- or higher-derivative DRAG (Derivative Removal by Adiabatic Gate) to suppress leakage and non-ideal transitions. The intermediate X(π) on the control is realized as two SX (√X) gates with Gaussian DRAG pulses spanning ≈40 ns. This echo protocol cancels leading-order Hamiltonian errors (IX, IY, ZI) and linear ZZ interactions.

3. Formal Error-Budgeting and Characterization

Gate fidelity analysis decomposes the total error-per-gate (EPG) into five well-defined contributions:

$$E_\text{total} = E_\text{incoh} + E_\text{leakage} + E_\text{coherent} + E_\text{crosstalk} + E_\text{unexplained}$$

• Incoherent (Decoherence) Errors: Quantified as $E_\text{incoh} ≈ 1 - e^{-t_g/2T_1}\,e^{-t_g/T_ϕ}$, with $T_ϕ$ defined via $1/T_ϕ ≡ 1/T_{2e} - 1/2T_1$. This channel generally sets a lower bound for gate infidelity, typically 0.3–0.8% per ECR operation.
• Control-Qubit Leakage: Strong off-resonant CR drives induce population transfer to higher transmon levels (01, 12 single-photon, and 02/2 two-photon transitions). Characterization uses a leakage-amplification circuit, revealing $p_\text{leak}$ up to 2% on some pairs pre-suppression, and <0.1% on best pairs.
• Coherent (Unitary) Errors: The effective two-qubit drive Hamiltonian is expressed as:

$$H/\hbar = \frac{1}{2} (\Omega_{IX}\,IX + \Omega_{IY}\,IY + \Omega_{IZ}\,IZ + \Omega_{ZI}\,ZI + \Omega_{ZX}\,ZX + \Omega_{ZY}\,ZY + \Omega_{ZZ}\,ZZ)$$

Only ZX is required for ideal CZ(π/4). Before correction, residual Ω{IZ} and Ω{ZZ} terms may contribute up to ∼10% and ∼1.8% EPG, respectively, notably on poorly detuned pairs. Other terms are negligible after calibration.

A plausible implication is that comprehensive process tomography is necessary for continuous gate performance assessment, especially as device size and complexity grow.

4. Error Suppression Procedures

All error suppression is implemented via pulse-level software with minimal calibration overhead:

• DRAG Pulse Shaping for Leakage: Adapts the drive envelope, $F(t) \to [1 + i\alpha\,d/dt]\,F(t)$, selecting α from measured frequency differences. α is set as $1/[2\pi(f_x - f_{CR})]$ for single-photon, $1/[4\pi(f_x - f_{CR})]$ for two-photon leakage. Most pairs achieve $p_\text{leak} \lesssim 10^{-4}$ post-suppression.
• Virtual-Z Compensation for IZ Terms: Corrective virtual Z-rotations, $R_Z(\theta_c)$, are added on the target after each ZX, with θc chosen to null residual Ω{IZ}. These do not incur additional latency or decoherence.
• Compensating RY Rotations for ZZ Terms: For affected pairs, ZX pulses are sandwiched with $R_Y(\theta)$ and $R_Y(-\theta)$, where $\theta = \arctan(\Omega_{ZZ}/\Omega_{ZX})$, rotating residual ZZ into the ZX interaction and renormalizing the overall gate via reduced CR amplitude.

Calibration of pulse parameters requires only minutes per pair, with virtual-Z pulses and phase corrections incorporated into existing gate calibration flows. No hardware changes or additional gate depth are required.

5. Benchmarking Methodology and Results

Gate fidelity evaluation utilizes interleaved randomized benchmarking (IRB) according to Magesan et al. Random Clifford sequences are interleaved with the ECR gate. Survival probability $P(m)$ is fit to $A\,p^m + B$, extracting depolarizing parameter $p_\text{interleaved}$, compared to reference RB $p_\text{ref}$. ECR gate fidelity is

$$F_\text{ECR} = 1 - \frac{1 - p_\text{interleaved}/p_\text{ref}}{2}$$

Thirty random sequences are averaged per sequence length (up to $m\sim50$). Uncertainty arises from curve fitting and statistical sampling.

Key quantitative outcomes:

Pair ID	EPG_before (%)	EPG_after (%)	Reduction (×)
3	7.9	2.0	4.0
7	5.2	1.0	5.2
12	2.3	0.7	3.3
15	1.5	0.6	2.5

For a 16-qubit chain, median EPG improves from 4.6% to 1.2%, mean EPG from 6.75% to 1.6%, the best pair from 1.5% to 0.6%, averaging a 3.7× error reduction.

6. Implications and Device Scaling Outlook

Suppression of two-qubit errors via pulse optimization and software increments shifts the dominant residual error to incoherent processes (decoherence) and unexplained terms, possibly related to spectator-qubit interactions (spectator ZZ during control X(π)), or higher-order Hamiltonian components. This suggests investigation into context-aware spectator decoupling and further advances in substrate and materials science to reduce TLS noise.

Uniform error improvement across qubit chains enhances overall circuit reliability by eliminating “weak links,” a necessary predicate for quantum circuit scaling and progression toward fault-tolerant thresholds (<0.5% error rates). Achieving such fidelity will require gate durations $τ_g \lesssim 100$ ns compared to T₁, optimized device layout, and improved fabrication to control frequency collisions and coupling strengths.

A plausible implication is that hardware-aware error budgeting and integrated process tomography will become routine in future device generations, with post-fabrication tuning to further optimize operational envelopes.