IBM Heron Quantum Processor

• IBM Heron Quantum Processor comprises superconducting transmon devices arranged on a heavy-hex lattice, offering structured connectivity for scalable quantum simulation.
• The architecture employs tunable couplers to mediate two-qubit gates, achieving high-fidelity operations with error rates as low as 10⁻⁴ to 10⁻² while mitigating crosstalk.
• Benchmarks demonstrate practical applications in quantum machine learning, fermionic simulations, and condensed matter studies, supporting circuits with hundreds of two-qubit operations.

The IBM Heron Quantum Processor denotes a family of large‐scale, superconducting, heavy-hex lattice transmon devices featuring tunable-coupler two-qubit gates, with variants deployed for diverse high-fidelity quantum simulation and quantum machine learning experiments. These include systems with up to 156 qubits (ibm_fez), 133 qubits (ibm_montecarlo), and focused subdevices such as Heron r2 (30 qubits) and Heron 2 (small patches used for benchmarking and digital quantum simulations). The Heron devices demonstrate leading parallel gate fidelities and architectural features that enable structured quantum algorithms at scale.

1. Device Architecture and Physical Design

Heron processors are based on fixed-frequency transmon qubits arranged on IBM’s heavy-hexagon (heavy-hex) connectivity graph. The architecture enables nearest-neighbor connectivity (maximum degree 3), supporting long, contiguous qubit chains critical for scaling quantum algorithms. Key architectural parameters and features across Heron models:

• Qubit count: Ranges from 30 (Heron r2) to 156 (ibm_fez), with 133 (ibm_montecarlo) as a mainline benchmarking reference (McKay et al., 2023, &&&1&&&, Vilchez-Estevez et al., 8 Jan 2025).
• Gate primitives: Native single-qubit rotations (along X, Y, Z axes) and two-qubit entangling gates: controlled-Z (CZ) and, via tunable couplers, parametric iSWAP or cross-resonance (CR) as appropriate (McKay et al., 2023, Kiiamov et al., 3 Jan 2026).
• Tunable Coupler Technology: Two-qubit gates are mediated by microwave-activated interaction via flux-tunable coupler elements. When idle, couplers are detuned to suppress crosstalk (notably always-on ZZ interactions), yielding improved two-qubit fidelities and scalability for layered gate patterns (McKay et al., 2023, Kiiamov et al., 3 Jan 2026).
• Device layout for algorithms: The system supports geometry-aware routing and efficient embedding of 1D chains, rings, and other structured graphs.

2. Gate Performance, Error Rates, and Benchmarking

Heron devices exhibit high-fidelity gate operations as verified by multi-qubit benchmarking:

• Single-qubit gate error rates: Typical values reported (ibm_fez) are in the range $10^{-4}$–$10^{-3}$, as measured by randomized benchmarking (Candelori et al., 6 Jan 2026).
• Two-qubit (CZ/CR) gate error rates: $10^{-3}$–$10^{-2}$, with isolated gate errors as low as $1.2\times10^{-3}$ for the best chains (McKay et al., 2023, Candelori et al., 6 Jan 2026).
• Coherence times ($T_1$, $T_2$): On the order of 50–150 μs (reference from published specs; not reported individually in all papers), consistently sufficient to support circuit depths involving hundreds to $\sim$1,000 two-qubit operations (Candelori et al., 6 Jan 2026, Vilchez-Estevez et al., 8 Jan 2025).
• Layered fidelity (LF) and error per layered gate (EPLG): For $N=80$ qubits on ibm_montecarlo (Heron), $LF_{80}=0.61$; $EPLG=6.2\times10^{-3}$; for $N=100$, $LF_{100}=0.26$ and $EPLG=1.2\times10^{-2}$ (McKay et al., 2023).
• Crosstalk suppression: The tunable coupler architecture ensures that gate errors in fully layered operation remain near the isolated RB rates—crucial for parallel primitive-intensive algorithms (e.g., VQE, Trotterized Hamiltonian evolution).

Qubit count	Single-qubit error	Two-qubit error	Layer fidelity ($N$=80/100)	EPLG
156	$10^{-4}$–$10^{-3}$	$10^{-3}$–$10^{-2}$	Data not shown	Data not shown
133	Not given	$1.2\times10^{-3}$ min.	0.61 / 0.26	$6.2\times10^{-3}$ / $1.2\times10^{-2}$
30	Not given	Not given	Not given	Not given

Low EPLG and crosstalk enable executions of circuits with $\gtrsim 1{,}000$ entanglers in practical time frames before errors dominate algorithmic results (McKay et al., 2023, Candelori et al., 6 Jan 2026).

3. Calibration Protocols and Error Mitigation

Operation at scale on Heron processors employs a range of calibration and mitigation strategies:

• Layer-fidelity chain selection: Experimental runs are preferentially mapped onto contiguous qubit chains exhibiting optimal aggregate layer fidelity (i.e., minimizing inhomogeneous gate errors and maximizing parallel fidelity in “layers” of 2-qubit gates) (McKay et al., 2023, Candelori et al., 6 Jan 2026).
• Dynamical decoupling (DD): Idle qubits undergo DD sequences (e.g., XX, π-pulses), mitigating $T_2$ dephasing during circuit execution (Kiiamov et al., 3 Jan 2026, Vilchez-Estevez et al., 8 Jan 2025).
• Pauli twirling: Two-qubit gates are randomised (Pauli-twirled) to convert systematic errors into stochastic Pauli channels and enhance error resilience of the implemented quantum circuits (Vilchez-Estevez et al., 8 Jan 2025).
• Readout calibration: T-REx and other Qiskit-based readout calibrations are applied to suppress bit-flip and assignment errors (Vilchez-Estevez et al., 8 Jan 2025).
• Post-selection: Where applicable (e.g., Fermi–Hubbard simulation), shots are filtered to enforce conserved quantities (such as fixed particle number), further reducing the impact of spurious errors (Vilchez-Estevez et al., 8 Jan 2025).
• Zero Noise Extrapolation (ZNE): In benchmark-scale simulations (Heron 2), ZNE is used to extrapolate physical measurements to the zero-noise limit, improving energy estimates (Kiiamov et al., 3 Jan 2026).

4. Scalability and Algorithmic Benchmarks

Heron devices enable practical execution of classically challenging and/or structured quantum algorithms:

• Machine Learning (QML): Up to 50 qubits (ibm_fez/Heron) were used for shallow-circuit supervised learning leveraging sample-based Krylov quantum diagonalization (SKQD): 1,000+ CZs per circuit, $\sim$91% classification accuracy on synthetic data, no barren-plateau collapse, and successful shallow-gradient propagation (Candelori et al., 6 Jan 2026).
• Fermi–Hubbard Simulation: Heron r2 (30 qubits) supports Trotterized simulation of the spin Green’s function for system sizes $L=9$–$15$ (18–30 qubits, up to 1,200 CXs), robust to noise via Pauli twirling, DD, readout mitigation, and post-selection; Structural Similarity Index (SSIM) with noiseless results remains $\gtrsim0.7$ even at maximum size/depth (Vilchez-Estevez et al., 8 Jan 2025).
• Condensed Matter (Wigner Localization): Heron 2 (6-qubit ring) achieves $\leq7\%$ energy error in VQE of long-range interacting electron dimer, with performance improving in the strong-interaction regime—a direct validation of tunable-coupler enhanced digital quantum simulation (Kiiamov et al., 3 Jan 2026).
• Layer-fidelity implications: For $N=80$, $LF=0.61$ allows for $O(10^2)$-depth algorithms before errors saturate, while error-mitigation overheads (e.g., for probabilistic error cancellation) scale polynomially (overhead $\sim2.7^{10}\approx20,000$ for depth-$10$) (McKay et al., 2023).

5. Methodologies, Mathematical Models, and Key Circuits

Heron processors facilitate a range of algorithmic primitives:

• Sample-based Krylov quantum diagonalization: Implements low-depth quantum subspace expansion, efficiently approximating ground states for $k$-local Hamiltonians $H(x)=B - \sum_{f=1}^D a^f X_f$, with operators expressed as adjacency-respecting 1- or 2-local Pauli strings. Gradients are computed via truncated perturbative excitation sums (Candelori et al., 6 Jan 2026).
• Layered randomized benchmarking: Full-layer RB partitions the device into disjoint pairs per sublayer and measures layer-wise process fidelity; the error per layered gate (EPLG) normalizes the result for scaling analysis (McKay et al., 2023).
• Digital quantum simulation with VQE/Trotterization: Algorithms are mapped to Heron's heavy-hex layout with nearest-neighbour Hamiltonians (e.g., Fermi–Hubbard, Wigner dimer), typically using hardware-efficient ansätze, optimal routing (Qiskit SABRE), and circuit depths determined to remain within the device's coherence window (Kiiamov et al., 3 Jan 2026, Vilchez-Estevez et al., 8 Jan 2025).

Key formulas used in these settings include:

• Process fidelity (RB): $F = \frac{1 + (d^2 -1)\,\alpha}{d^2}$
• Error per layered gate: $\mathrm{EPLG} = 1 - LF^{1/n_{2Q}}$
• Probabilistic error cancellation overhead: $\gamma \approx 1/LF^2$, total circuits $\sim \gamma^{2\delta}$ for depth $\delta$ (McKay et al., 2023)
• Hamiltonian for Wigner dimer: $$\hat H = -\,t\sum_{i=0}^{5}(\hat a_i^\dagger\hat a_{i+1} + \hat a_{i+1}^\dagger\hat a_i) + \sum_{0\le i<j\le5} V_{ij}\hat n_i\hat n_j$$, with $V_{ij} = U/r_{ij}$, $r_{ij}=6/\pi\,\sin(\pi|i-j|/6)$ (Kiiamov et al., 3 Jan 2026)

6. Impact and Outlook

The Heron quantum processor series is validated as a testbed for scalable, error-suppressed quantum computing in both NISQ and emerging error-mitigated regimes:

• Empirical results show preservation of algorithmic structure in execution, robust classification and simulation outcomes at nontrivial circuit sizes and depths, and resilience to dominant hardware noise via a combination of architectural choices and modest error mitigation (Candelori et al., 6 Jan 2026, Vilchez-Estevez et al., 8 Jan 2025).
• Layer-fidelity and tunable coupler technology set a standard for scaling structured-layer algorithms such as VQE, QAOA, and time-evolution-based correlation measurements to 80–100 qubits in practice (McKay et al., 2023).
• Proof-of-principle experiments (e.g., Wigner localization, spin spectroscopy) demonstrate the feasibility of probing strongly correlated electron physics and quantum many-body spectra on contemporary superconducting platforms (Kiiamov et al., 3 Jan 2026, Vilchez-Estevez et al., 8 Jan 2025).
• Recommendations include restricting Pauli-string ansätze to local terms, using layer-fidelity for dynamical device mapping, and inserting dynamical decoupling for idling qubits. Algorithmic resource scaling (especially for quantum machine learning and simulation) remains intimately tied to the ongoing improvement of native hardware error rates, parallel gate performance, and error mitigation strategies (Candelori et al., 6 Jan 2026, McKay et al., 2023).

Collectively, the IBM Heron processors provide a flexible, high-fidelity, and scalable superconducting qubit infrastructure for the advancement of algorithmic quantum computing research.