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Megapixel Time-Gated SPAD Sensor

Updated 5 March 2026
  • The sensor integrates 1M SPAD pixels achieving time-gated photon counting for precise 2D and 3D imaging with nanosecond-scale temporal resolution.
  • It employs dual pixel designs with distinct SPAD characteristics, delivering 7.0–13.4% fill factors, up to 26.7% PDP, and low dark count rates for high sensitivity.
  • The global gating mechanism and 24k fps readout enable direct ToF ranging and multi-object detection with <7.8 mm precision over an extended dynamic range.

A megapixel time-gated single-photon avalanche diode (SPAD) image sensor is a solid-state photodetector array integrating 1 million SPAD pixels for the capture of 2D and 3D images with single-photon sensitivity and precise temporal gating. Fabricated in 180 nm CMOS image sensor (CIS) technology, the device achieves nanosecond-scale gating and high frame rates, enabling applications in high-speed imaging, time-of-flight (ToF) depth sensing, and advanced optical measurements. The sensor employs global time-gated photon counting with binary, high-throughput pixel operations, supporting applications in direct ToF, multi-object detection, and ultra-high dynamic range 2D imaging (Morimoto et al., 2019).

1. Sensor Architecture and Pixel Design

The megapixel time-gated SPAD sensor comprises a 1024×1000 array of pixels at 9.4 μm pitch, realized in a standard 180 nm CIS process. Two pixel variants are implemented:

  • 7-transistor pixel A: No transistor sharing, 2.8 μm SPAD diameter, 7.0% fill factor, 10.5% peak photon detection probability (PDP), 0.4 cps median dark count rate (DCR).
  • 5.75-transistor pixel B: 2×2 readout transistor sharing, 3.88 μm SPAD diameter, 13.4% fill factor, 26.7% peak PDP, 2.0 cps median DCR.

Both designs employ circular guard rings and buried deep-n wells to define a uniform high-field p⁺–i–n junction, avoiding premature edge breakdown. The SPADs utilize standard CIS implant profiles, and the avalanche region is centrally located to maximize sensitivity and minimize crosstalk.

Within each pixel, the SPAD is biased at 3.3 V excess above breakdown and post-avalanche quenching is achieved by a thick-oxide transistor. In Pixel A, avalanche detection is gated and stored in a dynamic memory node with a dedicated reset, while in Pixel B, an in-pixel feedback-quenched latch disables recharge after photon detection for single-shot operation. Readout follows a row-wise scheme; Pixel A uses an independent path per SPAD, while Pixel B time-multiplexes over 2×2 blocks via shared lines.

2. Time-Gating Mechanism and Performance

The sensor employs a global time-gate signal distributed to all pixels, allowing for fine-grained temporal selection without per-pixel time-to-digital converters (TDCs). During the gate window (3.8 ns full width with <550 ps rise/fall FWHM), SPAD-generated pulses are registered; photons arriving outside the gate are ignored. The global gate delay Δt can be incremented in hardware steps of 36 ps, supporting precise temporal scanning.

The measured per-pixel photon-count histogram h(t)h(t) corresponds to

h(t)=[f(t)g(t)],h(t) = [f(t) * g(t)],

where f(t)f(t) is the gate-window function (3.8 ns width), and g(t)g(t) is the photon arrival density. For an idealized narrow optical pulse delayed by Δt,

h(t)af(tΔt),h(t) \approx a\,f(t-\Delta t),

with photon count aa. For multiple reflectors,

h(t)iaif(tΔti),h(t) \approx \sum_{i} a_i\,f(t-\Delta t_i),

with aia_i and Δti\Delta t_i the amplitudes and delays of individual photon returns.

Gate uniformity is closely controlled: the full-width-at-half-maximum (FWHM) gate length variation is 120 ps, and the gate skew across the array is 410 ps.

At 3.3 V excess bias, Pixel B achieves a maximum PDP of 26.7% at 520 nm (uniformity ≤3.2%), while Pixel A achieves 10.5% PDP. Median DCRs are 2.0 and 0.4 cps, respectively.

3. High-Speed Frame Acquisition and Data Readout

To attain video-rate acquisition at 24,000 frames per second, the array is organized in two halves, each 1024×500 pixels. All 1024 or 512 bits per row (depending on pixel type) are sampled within 83 ns. A dual-lane 128-bit bus streams binary frames off-chip, aggregating data for external processing.

Each frame is binary per pixel. FPGA-based accumulation of NN successive binary frames yields NN-bit greyscale images. For instance, summing 16,320 binary frames at 24 kfps produces a 14-bit image. The main engineering trade-off balances temporal resolution for ToF ranging (short gates, high scan rates) against raw data throughput, which is on the order of tens of Gbit/s. The use of global gating dramatically reduces the per-pixel complexity and data volume relative to per-pixel TDC approaches.

4. Imaging Demonstrations: 2D, ToF Ranging, and Multi-Object Detection

4.1 2D Imaging and Extended Dynamic Range

Under uniform 50 lux illumination, high spatial resolution is demonstrated (ISO 1000 chart) via summation of 16,320 frames for a 14-bit output. To surpass the single-exposure shot-noise-limited dynamic range, a dual-exposure approach combines short (TsT_s) and long (TL=8TsT_L = 8T_s) integrations within the same exposure sequence.

For single exposure, the count output is

NS=Nsat[1exp(Nin/Nsat)],N_S = N_{\rm sat}\,[1 - \exp(-N_{\rm in}/N_{\rm sat})],

where NsatN_{\rm sat} is the max count (e.g., 4080). For dual exposure, the count becomes

ND=12Nsat[(1eNinTs/Nsat)+(1eNinTL/Nsat)].N_D = \frac{1}{2} N_{\rm sat} \left[(1 - e^{-N_{\rm in}T_s/N_{\rm sat}}) + (1 - e^{-N_{\rm in}T_L/N_{\rm sat}})\right].

This extends the dynamic range from 96.3 dB to 108.1 dB, with a minimal reduction in SNR under low photon flux.

4.2 Time-of-Flight Ranging

Using a 637 nm, 40 MHz, 80 ps pulsed laser, gate delay is swept from 0.6 ns to 13.2 ns in 36 ps increments. The ToF for each pixel is determined by the rising edge of the smoothed h(t)h(t), and the round-trip distance is:

L=cΔt2L = \frac{c \Delta t}{2}

where cc is the speed of light. Each 36 ps increment sets the least significant bit (LSB) at 5.4 mm spatial resolution. Within the 0.2–1.6 m range, distance linearity is better than 1 cm and precision is below 7.8 mm rms on a 20×20 pixel patch.

4.3 Spatially Overlapped Multi-Object Detection

In a configuration with a semi-transparent plate (0.45 m) and a diffuse sphere (0.75 m), the histogram h(t)h(t) obtained from each pixel shows two rising steps corresponding to distinct reflections. A sliding-window edge detection identifies both Δti\Delta t_i, reconstructing two independent depth maps in the same 1 Mpixel frame. The minimum resolvable depth separation is limited by the gate rise/fall time (~550 ps), corresponding to approximately 8 cm.

5. Quantitative Sensor Performance Metrics

Characteristic Pixel A (7T) Pixel B (5.75T)
Fill factor (%) 7.0 13.4
SPAD diameter (μm) 2.8 3.88
Peak PDP at 520 nm (%) 10.5 26.7
DCR (median, cps) 0.4 2.0
Peak dynamic range (dB) 108.1 (dual-exp.) 108.1 (dual-exp.)
Minimum ToF LSB (mm) 5.4 5.4
ToF precision (mm, rms, 20x20) < 7.8 < 7.8

This performance profile establishes the sensor as the first megapixel SPAD imager achieving time-gated ToF and extended-range 2D/3D imaging (Morimoto et al., 2019).

6. Applications and Prospective Evolution

The demonstrated megapixel SPAD sensor with 3.8 ns gating and 24 kfps operation enables applications in single-photon 2D/3D video imaging, wide-field fluorescence lifetime microscopy, quantum LiDAR, and Raman spectroscopy. Future enhancements include:

  • Microlens integration: Projected fill-factor boosts by 2–10×.
  • Backside illumination: Increased photon detection efficiency (PDE).
  • Advanced process scaling: Deeper submicron CMOS nodes and 3D stacking to reduce pitch and enable multi-megapixel arrays.
  • Multibit in-pixel counting: For direct gray-scale acquisition.

A plausible implication is the realization of picosecond-resolved, high-fill-factor SPAD arrays with sub-micron scale integration, supporting per-pixel dark count rates below 1 cps, and addressing emerging needs in biomedical imaging, security, automated driving, and quantum optical systems (Morimoto et al., 2019).

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