5D VL53L1 ToF Array
- The paper presents a novel histogram-less LiDAR acquisition method using per-pixel SPAD linearization to eliminate dead-time effects.
- The design integrates a 5×5 pixel array that achieves high-flux immunity, MHz-scale acquisition rates, and significant memory savings compared to traditional methods.
- The approach details methodologies for ToF estimation via averaged timestamps, precise calibration, and scalable system integration for real-time 3D imaging.
A 5D VL53L1 ToF Array denotes a 5×5 pixel tile utilizing VL53L1-style direct-Time-of-Flight (d-ToF) acquisition, with complete per-pixel implementation of histogram-less LiDAR through SPAD response linearization. This design eliminates the need for per-pixel timestamp histograms, instead emulating a dead-time-free SPAD and extracting ToF by averaging photon arrival timestamps. The resulting system realizes high-flux immunity, MHz-scale acquisition rates, and substantial memory savings, facilitating robust, scalable, and low-latency 3D imaging architectures for LiDAR applications (Tontini et al., 2023).
1. Acquisition Architecture and SPAD Linearization
Traditional d-ToF arrays accumulate histograms of first-photon timestamps over numerous laser cycles, consuming memory per pixel and exhibiting significant nonlinear pile-up above approximately a 5% detection rate. The histogram-less method instead emulates a dead-time-free SPAD where photon arrivals are superposed linearly.
Per-pixel acquisition comprises two phases:
- Phase 1 (Background): With the laser OFF, repeatedly arm the SPAD/TDC, record first-photon timestamps , increment and accumulate until reaching a design target or time-out.
- Phase 2 (Signal + Background): With the laser ON, identically arm and record timestamps , increment and accumulate .
Real SPADs introduce a dead-time after each detection, which distorts timestamp statistics. Two schemes rectify this:
- Acquire-or-Discard: Track the latest detection timestamp, discard subsequent timestamps within the same cycle that precede it, yielding an ordered sample from a dead-time-free Poisson process.
- Time-Gated Acquisition: After each detection, re-arm the SPAD only after a programmable delay matching the last timestamp, ensuring accepted timestamps are monotonically ordered.
Both mechanisms yield timestamp sets statistically identical to those produced by a linear (dead-time-free) SPAD.
The photon flux is modeled as an inhomogeneous Poisson process with instantaneous rate:
wheredenotes background rate,the laser-echo envelope, ToF the time-of-flight, and the pulse window.
2. Time-of-Flight Estimation via Averaging
ToF estimation exploits averaged timestamps, eschewing histogram fitting. Let
- ,
From the analytic model, the mean timestamp obeys:
where is the mean intrinsic laser-echo delay within the window.
Solving for ToF yields (see Eq. (estimate1) in the paper):
Empirically, is often set to for uniform backgrounds, further simplifying computation.
Shot-noise dominates the estimator variance for large and , yielding:
with closed-form results for and , particularly under uniform-background assumptions.
3. Pixel Array Design and Data Pipeline
A 5×5 VL53L1-style array integrates 25 pixel tiles. Each pixel incorporates:
- A SPAD photodetector
- A time-to-digital converter (TDC) with ≃100 ps LSB
- Two 16-bit counters (, )
- One 24-bit accumulator (, optionally )
Array-level readout leverages row aggregators (5 rows), each aggregating 5 pixel registers post-frame. Global aggregation collects and transmits row data via SPI/I²C in a single burst to the host.
Simplified block diagram:
| Component | Role | Scale |
|---|---|---|
| [SPAD, TDC] | Timestamp acquisition | per pixel (25×) |
| Gate Logic | Emulate dead-time-free response | per pixel |
| Row Aggregator | Offload registers to host bus | per row (5×) |
| Global Aggregator | SPI/I²C burst to host | system-wide |
Pipeline timing consists of host-initiated frame start/reset, phase 1 background acquisition, phase 2 signal+background, and daisy-chained register readout. ToF is computed by firmware or FPGA per Eq. (3).
4. Synchronization, Calibration, and System Integration
Precision synchronization is achieved via a distributed common clock (≥1 MHz ARM pulse) for all pixels. Per-pixel calibration involves:
- Offset calibration: Illuminate with near-zero-range reflector (ToF ≈ 0) to measure and pixel-specific TDC offsets, entered into a lookup table.
- Intensity calibration: Measure versus ambient lux with the laser OFF to linearize .
This design supports easy mosaicking in custom VL53L1-block arrangements or host-driven multi-module arrays, with straightforward scaling to higher pixel counts (e.g., 32×32).
5. Experimental Performance Metrics
Single pixel validation reveals:
- Range: measured up to 3.8 m (optics-limited)
- Accuracy: <±0.5% in no-background, ±2% at 15 klux (7.7×10⁶ evt/s), ±6.7% at 75 klux (1.2×10⁸ evt/s); precision 0.25–21% depending on flux
- Pile-up: estimator remains effective up to 90% detection rate (18× above typical 5% histogram pile-up threshold)
- Memory: ~4 Bytes/pixel vs ~8 kB for histogram schemes (≃2000× reduction)
- Sustained flux: limited by TDC, tolerant to ≈1.5×10⁹ evt/s at a 100 ps LSB
For a 5×5 array, predicted performance includes:
- Maximum per-pixel flux: ≃1×10⁹ evt/s (≈3000× above typical pile-up rule)
- Ambient-light resilience: functional up to 85 klux with ≤±2% range bias
- Depth precision: shot-noise-limited, ; for –, jitter falls below 1 cm (few-mm depth)
- Memory: ~100 Bytes/frame vs ~200 kB for histogram approaches
- Frame rate: ARM pulses in 33 ms yields 0.9 MHz/pixel, easily distributed via a single FPGA (22.5 MHz total ARM rate)
6. Significance and Implications
The histogram-less ToF acquisition method, utilizing SPAD response linearization and mean-based timestamp estimation, directly addresses traditional d-ToF limitations in memory bandwidth, pile-up nonlinearity, and ambient-light resilience. The resulting rackable, low-power, and low-bandwidth LiDAR array is capable of robust 30 FPS 3D imaging to ~4 m, maintaining operational fidelity in high ambient and high-flux conditions (Tontini et al., 2023). This suggests strong applicability for scalable, real-time 3D sensing in both embedded and distributed sensor systems.
A plausible implication is that the architectural simplicity and scalability of the 5D VL53L1 ToF Array enable rapid deployment in larger arrays (e.g., 32×32), with per-pixel dead-time artifacts fully suppressed and ToF estimation consistently reliable under extreme conditions. The overall approach unifies low-latency, shot-noise-limited ranging performance with minimized digital resource overhead, providing a core design reference for academic and industrial LiDAR development.