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Dolan-Bridge Double-Angle Deposition

Updated 4 July 2026
  • Dolan-bridge double-angle deposition is a shadow evaporation technique that uses a suspended resist bridge as a self-aligned mask to form sub-100 nm Al/AlOₓ/Al Josephson junctions.
  • The method employs dual-angle metal depositions and in-situ oxidation to create a controlled overlap region that minimizes thickness variations and enhances uniformity.
  • Advanced designs incorporate stress-relief channels and optimized deposition angles to mitigate mechanical fragility and improve performance in superconducting circuits.

Dolan-bridge double-angle deposition is a shadow-evaporation method for forming Al/AlOx_x/Al Josephson junctions in which a suspended resist bridge acts as a self-aligned mask for two metal evaporations from different directions. In the cited implementations, a bilayer resist is developed so that the bottom layer is recessed and the top layer remains as a narrow suspended bridge; a first Al deposition, an in-situ oxidation, and a second Al deposition then create an overlap region beneath the bridge that becomes the tunnel junction. The technique remains one of the most direct ways to define sub-100–200 nm JJs with self-aligned electrodes and is widely used in transmons and SQUIDs, while also appearing in parametric amplifiers and in optical direct-write variants (Skinner-Ramos et al., 1 Feb 2025, Patel et al., 12 Jul 2025, Monroe et al., 2021).

1. Core process and physical principle

A Dolan–Niemeyer bridge is a suspended resist bridge used as a shadow mask for making overlap Josephson junctions by double-angle metal evaporation. The bridge blocks part of the incoming Al flux in each evaporation, so only a restricted region under the bridge receives metal from both directions. After oxidation of the first Al layer, that doubly exposed overlap becomes the Al/AlOx_x/Al tunnel junction (Monroe et al., 2021).

In one representative qubit-oriented implementation, the junction is formed in three steps: a first 20 nm20\ \text{nm} Al evaporation at 00^\circ to the substrate normal, static O2_2 at 500 mTorr500\ \text{mTorr} for 10 min10\ \text{min}, and a second 40 nm40\ \text{nm} Al evaporation at 3030^\circ to the substrate normal. For the devices studied there, nominal electrically tested areas were 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^2 (Skinner-Ramos et al., 1 Feb 2025).

Other implementations keep the same shadow-evaporation logic but alter the angular geometry. A model-based study of bilayer and trilayer Al junctions used opposite deposition angles of x_x0 or x_x1, with dynamic oxidation at x_x2 Ox_x3 for x_x4 and x_x5 rotation; a wafer-scale bias-correction study instead used a first evaporation at x_x6 and a second evaporation at x_x7 (Kakuyanagi et al., 29 May 2026, Moskaleva et al., 2024). These examples show that “double-angle” denotes a family of shadow-defined deposition geometries rather than a single fixed angle pair.

The overlap region is not always purely planar. In the bilayer model of Al/AlOx_x8/Al junctions, the effective junction interface includes a top-surface overlap region and a sidewall overlap region, and the balance between those contributions depends on deposition angle x_x9 and deposited thickness. This top-versus-sidewall decomposition is central to later analyses of critical-current variation (Kakuyanagi et al., 29 May 2026).

2. Bridge geometry, resist stacks, and mask architectures

The essential lithographic object is a narrow top-resist bridge suspended across an undercut cavity in a thicker bottom layer. In one nanoscale PMMA/MMA implementation, the self-aligned mask consists of two perpendicular fingers in a bilayer resist: a bottom MMA (EL13) layer 20 nm20\ \text{nm}0 thick and a top PMMA (950 A3) layer 20 nm20\ \text{nm}1 thick. The geometry is parameterized by 20 nm20\ \text{nm}2, 20 nm20\ \text{nm}3, and 20 nm20\ \text{nm}4, where 20 nm20\ \text{nm}5 is the width of the horizontal finger, 20 nm20\ \text{nm}6 is the width of the vertical finger and sets the Dolan bridge length, and 20 nm20\ \text{nm}7 is the gap that sets the overlap and effective angle shadow; in that study 20 nm20\ \text{nm}8, 20 nm20\ \text{nm}9, and 00^\circ0 was swept from 00^\circ1 to 00^\circ2 in 00^\circ3 steps (Skinner-Ramos et al., 1 Feb 2025).

Other reported stacks implement the same suspended-mask concept with different chemistries and thicknesses. A geometry-dependence study used PMGI 00^\circ4 and ZEP 00^\circ5, with the bridge defined in the top ZEP and the undercut formed in the PMGI. A planar-versus-TSV uniformity study used PMGI SF7 00^\circ6 and PMMA 950K A3 00^\circ7. A single-step JPA process used a 00^\circ8 bottom layer of methacrylic acid in methyl methacrylate and a 00^\circ9 top layer of PMMA 950K. An optical direct-write variant used LOR 10B at about 2_20 and S1805 at about 2_21, with a target undercut of about 2_22 and a bridge roughly 2_23 long and 2_24 wide (Kakuyanagi et al., 29 May 2026, Muthusubramanian et al., 2023, Patel et al., 12 Jul 2025, Monroe et al., 2021).

These architectures differ in resolution, undercut depth, and mechanical robustness, but they share the same operative principle: differential development of the bilayer leaves a top “roof” spanning an opening while the lower support layer is recessed. In the nanoscale PMMA/MMA case, development in MIBK:IPA undercuts the MMA much faster than the PMMA, leaving a suspended PMMA bridge with typical cross-section about 2_25 in width and 2_26 in thickness, spanning an undercut of about 2_27 (Skinner-Ramos et al., 1 Feb 2025).

The junction footprint is therefore controlled jointly by lithographic bridge width, resist thicknesses, undercut profile, and evaporation angle. In the simplest description, each electrode width is the aperture minus a shadow length, but the more detailed geometric treatments show that finite source size, local incidence angle, and sidewall deposition modify that naive picture at wafer scale (Moskaleva et al., 2024).

3. Angle dependence, overlap geometry, and uniformity models

A central result of recent model-based analysis is that the sensitivity of junction conductance to Al thickness fluctuations can be expressed through a geometric factor 2_28, where 2_29 is deposition angle and 500 mTorr500\ \text{mTorr}0 is the number of deposited Al layers. For the general multilayer case,

500 mTorr500\ \text{mTorr}1

For bilayer junctions,

500 mTorr500\ \text{mTorr}2

The 500 mTorr500\ \text{mTorr}3 term is the sidewall contribution and the 500 mTorr500\ \text{mTorr}4 term is the reduction of top-surface overlap. At 500 mTorr500\ \text{mTorr}5, the model gives 500 mTorr500\ \text{mTorr}6, so thickness-induced variation cancels to first order (Kakuyanagi et al., 29 May 2026).

The same study tested bilayer junctions with 500 mTorr500\ \text{mTorr}7 at 500 mTorr500\ \text{mTorr}8 and 500 mTorr500\ \text{mTorr}9. The measured normalized RMS variation of room-temperature 10 min10\ \text{min}0 was 10 min10\ \text{min}1 at 10 min10\ \text{min}2 and 10 min10\ \text{min}3 at 10 min10\ \text{min}4. For the optimized bilayer process, a relative standard deviation of 10 min10\ \text{min}5 across a 10 min10\ \text{min}6 square region and 10 min10\ \text{min}7 across a 10 min10\ \text{min}8 square region was reported, with 4221 valid junctions and yield 10 min10\ \text{min}9 on the 40 nm40\ \text{nm}0 array (Kakuyanagi et al., 29 May 2026).

At wafer scale, a separate line of work treated nonuniformity as a geometric problem of source–wafer configuration, local incidence angle, and sidewall deposition. There the actual angle at wafer position 40 nm40\ \text{nm}1 was modeled as

40 nm40\ \text{nm}2

with sidewall deposition

40 nm40\ \text{nm}3

This model was inverted to generate a position-dependent shadow-evaporation bias correction, termed SEBi, for a two-layer resist mask on 4-inch wafers. Over a 40 nm40\ \text{nm}4 working area, the junction-area variation coefficient 40 nm40\ \text{nm}5 was reduced from about 40 nm40\ \text{nm}6 to 40 nm40\ \text{nm}7 for 40 nm40\ \text{nm}8 junctions and from about 40 nm40\ \text{nm}9 to 3030^\circ0 for 3030^\circ1 junctions; with SEBi plus optimized dynamic oxidation, room-temperature resistance variation coefficients reached 3030^\circ2 and 3030^\circ3 on 3030^\circ4, and 3030^\circ5 and 3030^\circ6 on 3030^\circ7, for 3030^\circ8 and 3030^\circ9 junctions respectively (Moskaleva et al., 2024).

These results establish two distinct but compatible uniformity strategies. One is local geometric cancellation of thickness sensitivity by choosing deposition angle, especially 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^20 for bilayers. The other is wafer-scale precompensation of source-geometry and shadowing effects through position-dependent mask biasing. This suggests that Dolan-bridge uniformity is governed simultaneously by near-field bridge geometry and far-field evaporation geometry.

4. Mechanical fragility and stress-engineered bridge designs

The classical Dolan bridge is mechanically fragile because the top resist bridge is narrow, thin, and supported only at its ends. In the PMMA/MMA nanoscale study, the bridge dimensions were comparable to or larger than 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^21–100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^22 in length, about 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^23 in width, about 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^24 in thickness, and suspended over an undercut of 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^25. The authors identified mechanical stress within the PMMA bridge as the primary cause of fracture when using a standard PMMA/MMA stack with room-temperature development, and reported that standard bridges fabricated with that mask and stack “fail nearly 100% of the time” during development, already at the resist-mask stage before metal deposition (Skinner-Ramos et al., 1 Feb 2025).

Intrinsic biaxial film stresses were measured by wafer curvature as about 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^26 for MMA and about 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^27 for PMMA, and compared with a room-temperature PMMA tensile strength of about 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^28. Finite-element simulations in COMSOL Multiphysics showed that, for the investigated bridge geometries without stress relief, the lateral stress components in the bridge exceeded that tensile strength. The failure window was therefore associated not with deposited-metal stress or lift-off, but with the stress state after development, rinse, and drying (Skinner-Ramos et al., 1 Feb 2025).

To mitigate that failure mode, the study introduced stress-relief channels: long narrow cuts patterned on both sides of the bridge. Two variants were reported. “Floating” channels produced electrically floating metal islands after deposition and lift-off. The preferred “integrated” design connected the metallized channels to one of the junction electrodes, thereby avoiding a floating island at unknown potential. The channel geometry was 100×100, 100×200, 100×300, 100×400, 100×500 nm2100\times 100,\ 100\times 200,\ 100\times 300,\ 100\times 400,\ 100\times 500\ \text{nm}^29 in width and x_x00 in length, with center-to-center distance from the bridge varied from x_x01 to x_x02 (Skinner-Ramos et al., 1 Feb 2025).

The mechanical effect was substantial. For all studied bridge lengths, the average lateral stress in the Dolan bridge was reduced to about x_x03 of the no-channel design, and the authors summarized that the addition of stress-relief channels reduced the lateral stress by more than x_x04 for all investigated geometries. At x_x05 separation, the induced stress was reduced to about x_x06 of the PMMA tensile strength. Experimentally, the integrated-channel design produced 100% yield for over 100 fabricated Josephson junctions, converting an otherwise nonviable nanoscale mask into a robust room-temperature-developed process (Skinner-Ramos et al., 1 Feb 2025).

The reported mechanism is geometric compliance: cuts placed sufficiently near the bridge allow the surrounding resist to relax laterally, reducing the stress transmitted into the bridge neck without changing the intended junction overlap geometry. A plausible implication is that future bridge design should be treated as a coupled lithographic–mechanical optimization problem rather than only as a shadowing problem.

5. Circuit implementations and demonstrated operating regimes

Dolan-bridge double-angle deposition is primarily associated with superconducting quantum circuits, especially Al/AlOx_x07/Al qubits and parametric devices. In one transmon-oriented study using stress-relieved bridges, the Ambegaokar–Baratoff relation

x_x08

with x_x09 for Al, was used to infer critical currents for junctions of x_x10. For oxidation pressures of x_x11, x_x12, and x_x13, inferred x_x14 ranges were x_x15–x_x16, x_x17–x_x18, and x_x19–x_x20, respectively. The same work fabricated an Al/AlOx_x21 transmon with an asymmetric SQUID comprising x_x22 and x_x23 junctions, a x_x24 loop diameter, and x_x25 shunt capacitance; spectroscopy gave x_x26, x_x27, and x_x28, with flux sweet spots near x_x29 and x_x30. At x_x31, the measured coherence times were x_x32 and x_x33; the participation ratio of the integrated stress-relief features was x_x34, indicating negligible dielectric-loss contribution (Skinner-Ramos et al., 1 Feb 2025).

The same fabrication logic has also been used outside the transmon context. A single-step lithography implementation of an impedance-engineered Josephson parametric amplifier patterned the entire device in one electron-beam step and then used Dolan-bridge double-angle Al deposition at x_x35 with x_x36 and x_x37 Al layers, separated by a single in-situ oxidation at x_x38 for x_x39. All Josephson junctions in the SQUID and transformer were therefore formed in one oxidation step. The resulting device showed nearly quantum-limited amplification with x_x40 gain over a x_x41 bandwidth centered around x_x42, and a saturation power of x_x43 (Patel et al., 12 Jul 2025).

A distinct extension is optical direct write of Dolan–Niemeyer bridges for three-dimensional transmon qubits. There, the bridge was made not by e-beam lithography but by a 375 nm maskless direct-write system using LOR 10B and S1805, followed by double-angle Al evaporation at x_x44 with a x_x45 bottom electrode and a x_x46 top electrode. Multi-layer evaporation and oxidation, or a single long oxidation, were used to compensate for the much larger lithographic area of about x_x47–x_x48. With optimized Piranha and BOE surface treatments, energy-relaxation times in excess of x_x49 were achieved, and one device reached x_x50 (Monroe et al., 2021).

Taken together, these reports show that Dolan-bridge double-angle deposition spans at least three operating regimes: nanoscale self-aligned transmon junctions, single-step integrated nonlinear microwave circuits, and large-area optical direct-write junctions whose effective tunneling properties are tuned by oxidation engineering. The common element is the suspended bridge shadow mask; the differences lie in how geometry, oxidation, and circuit embedding are co-optimized.

6. Limitations, comparisons, and evolving design directions

A recurring misconception is that the self-aligned nature of the Dolan bridge automatically guarantees wafer-scale uniformity. The reported evidence is more conditional. On planar substrates, a 100 mm study found that Dolan junctions had the highest yield and lowest room-temperature conductance spread among the compared junction styles: on the planar 17Q wafer, yield was x_x51, wafer-scale conductance CV was x_x52–x_x53 depending on overlap area, and the average die-level transmon-frequency residual standard deviation was about x_x54. On TSV-integrated substrates, however, Dolan junctions degraded sharply, with yield x_x55, wafer-scale conductance CV x_x56–x_x57 after filtering, and average die-level frequency RSD x_x58. The stated cause was Dolan’s sensitivity to resist-height variation on topographic substrates, whereas Manhattan junctions became preferable in that implementation (Muthusubramanian et al., 2023).

The oxidation stage is another persistent limitation. In the wafer-scale SEBi study, applying geometric correction alone reduced x_x59 to about x_x60, but room-temperature resistance variation remained several percent until oxidation was optimized. Static oxidation at x_x61 for x_x62 produced strong spatial gradients, whereas dynamic oxidation at lower pressure and longer time reduced the barrier-related nonuniformity. Even then, the final x_x63 stayed in the x_x64–x_x65 range depending on area and working-area size (Moskaleva et al., 2024).

Model validity is likewise regime-dependent. The geometric-dependence analysis concluded, for the measured x_x66–x_x67, x_x68, and angles around x_x69 and x_x70, that geometry-independent and thickness-related terms were sufficient to explain the data, with non-negativity-constrained least squares setting x_x71. That conclusion was explicitly tied to the studied regime; for much smaller junctions or substantially different resist profiles, extra area- or edge-dependent contributions might become non-negligible (Kakuyanagi et al., 29 May 2026).

Mechanical modeling has analogous limits. The stress-accommodation study assumed linear elastic behavior with uniform intrinsic stress and did not explicitly include viscoelastic relaxation, developer-induced swelling, or drying dynamics. The authors therefore identified several future directions: more detailed mechanical modeling, optimization across resist stacks and geometries, wafer-scale statistical studies with thousands of bridges, integration with higher-coherence qubits, and process automation for oxidation and deposition (Skinner-Ramos et al., 1 Feb 2025).

The present literature therefore portrays Dolan-bridge double-angle deposition as neither a fixed recipe nor an obsolete craft process. It is better understood as a geometrically self-aligned platform whose performance depends on the coupled control of bridge mechanics, local overlap geometry, source–wafer kinematics, and oxidation kinetics. Recent work shows that substantial improvements can come from choosing deposition angles that null first-order thickness sensitivity, bias-correcting masks across the wafer, and stress-engineering the bridge itself. This suggests that the method’s contemporary development is less about replacing shadow evaporation outright than about formalizing and extending it into a quantitatively modeled fabrication technology.

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