NbN/AlN/NbN Trilayers in Superconducting Electronics

• NbN/AlN/NbN trilayers are advanced heterostructures combining superconducting NbN electrodes and an ultrathin, pinhole-free AlN barrier to enable high-performance Josephson devices.
• Fabrication employs epitaxial sputtering or ALD with sub-0.1 nm control, ensuring atomically sharp interfaces and excellent crystalline quality for reliable device performance.
• These structures deliver high gap voltages, tunable critical currents, and scalable CMOS-compatible integration for applications in qubits, THz mixers, and flux-flow oscillators.

NbN/AlN/NbN trilayers are heterostructures composed of niobium nitride (NbN) superconducting electrodes separated by an ultrathin aluminum nitride (AlN) tunnel barrier, fabricated as epitaxial or highly oriented thin films. These trilayers serve as the basis for high-performance Josephson junctions and related superconducting devices, including terahertz mixers, quantum circuit elements, and flux-flow oscillators. The combination of high-$T_c$ nitride superconductors and an ultrathin, pinhole-free nitride barrier enables operation at elevated temperatures, high-frequency response, and scalable, CMOS-compatible fabrication.

1. Thin-Film Growth Techniques and Structural Quality

Epitaxial NbN/AlN/NbN trilayer fabrication utilizes advanced sputtering or atomic layer deposition (ALD) processes to achieve single-crystal or highly oriented layers with atomically sharp interfaces. Sputtered trilayers can be grown on various substrates, commonly hydrogen-terminated Si(100) with a TiN buffer layer (Qiu et al., 2020) or R-cut sapphire (Merker et al., 2016), at substrate temperatures of 300–850 °C depending on the method. In ALD-based processes, c-plane sapphire substrates with plasma-enhanced surface pre-treatments are used, and NbN layers are grown at 300–400 °C with alkylamide or chloride precursors, while AlN is deposited using trimethylaluminum and plasma nitridation (Wang et al., 12 Nov 2025).

Crystallographic assessments via X-ray diffraction (XRD) for sputtered stacks confirm single (200) Bragg peaks for both buffer and trilayer layers, with FWHM below 0.3°, indicating high crystalline quality and strict cubic orientation. Transmission electron microscopy (TEM) and atom-probe tomography (APT) on ALD-grown films reveal interfaces with no detectable interdiffusion (sharpness <2 nm), atomic-level flatness, and minimal O contamination in the AlN barrier.

The TiN buffer, when present, reduces lattice mismatch ($\sim$5%) between Si and NbN. Surface and interface RMS roughnesses $<$0.5 nm are typical, with twin domains occasionally detected in NbN on c-sapphire, oriented along [111]. The AlN barrier is typically 2 nm (sputter) or 1–2 nm (ALD), and can be tuned with sub-0.1 nm precision by controlling deposition duration or ALD cycle count.

2. Nanofabrication and Device Patterning

Josephson junctions based on NbN/AlN/NbN trilayers require sub-micrometer lithography and precise etching:

• Base NbN electrodes are patterned by i-line photolithography and CF$_4$ RIE; AlN tunnel barriers are resistant and typically require Ar plasma for selective etch (Qiu et al., 2020).
• Junction areas are defined by electron-beam lithography (EBL) (down to 0.27 $\mu$m diameter), using negative-tone resists and Al or MgO hard masks, followed by RIE to etch through the trilayer stack.
• Interlayer dielectrics (SiO$_2$) are deposited and globally planarized by chemical mechanical polishing, and caldera-based RIE defines topological features.
• Contact vias to the upper electrode are formed by further RIE (CHF$_3$ plasma), with etch endpoints confirmed by step-profiling.
• ALD-grown trilayers are patterned using e-beam lithography and CF$_4$/Ar RIE; wiring is typically implemented on a separate chip (flip-chip bonded) or by inline deposition.

An optional buffered HF wet etch reliably removes residual dielectrics with no effect on junction transport characteristics. The ALD approach demonstrates highly uniform room-temperature resistance–area products (standard error 0.4 k$\Omega\cdot\mu$m$^2$ on 20 devices), and reproducibility in $J_c$ within 15% over year-long wafer production (Wang et al., 12 Nov 2025).

3. Superconducting and Tunneling Properties

NbN/AlN/NbN trilayers yield high-$T_c$ electrodes ($T_c$ up to 15.2 K for sputtered, 12–14 K for ALD), established by maximizing N$_2$ partial pressure and discharge current during growth (Merker et al., 2016). For optimized barriers, the devices consistently display:

• Gap voltages $V_\text{gap}$ up to 5.1 mV, corresponding to $2\Delta/e$ ($\Delta\sim2.6$ meV), yielding theoretical photon energy cutoff frequencies above 1 THz.
• Critical current density $J_c$ controlled via AlN barrier thickness: exponential dependence $J_c(t)=J_{c0}\exp(-t/t_0)$ is observed, where $t_0\approx0.10$ nm for PEALD films (Wang et al., 12 Nov 2025); achieved values extend from $\sim10^3$ to $10^{-4}$ A cm$^{-2}$.
• High subgap resistance: $R_\text{sg}/R_N > 100$ for optimized sputtered junctions (Qiu et al., 2020) and up to 55 in ALD-based devices, indicating minimal defect-mediated leakage and near-ideal SIS behavior.

The resistance–area product $R_NA$ remains approximately constant when area is corrected for RIE shrinkage, indicating uniform barrier transparency. For sputtered Si-based junctions, $R_NA\sim10^5$ $\Omega\mu$m$^2$ and $J_c\sim60$ kA cm$^{-2}$ are typical (Qiu et al., 2020).

The Josephson relation, $I(\phi)=I_c\sin\phi$, applies, with observed current-phase relations and Stewart–McCumber parameter $\beta_c\ll1$ (overdamped limit for $\epsilon_r(\textrm{AlN})\sim8$, $d\sim2$ nm, $A<1$ µm$^2$). Subgap currents are modeled as direct tunneling through a defect-free barrier or via localized states, but the high $R_{\rm sg}/R_N$ ratios confirm negligible two-level system loss in high-quality devices.

4. Applications: Mixers, Qubits, and Oscillators

Terahertz Mixers and Receivers: NbN/AlN/NbN SIS junctions on sapphire provide $V_\text{gap}$ up to 5.1 mV, enabling SIS mixer operation above 1 THz, exceeding the limit for conventional Nb/AlO$_x$/Nb ($\lesssim700$ GHz) (Merker et al., 2016). The key figures of merit—subgap ratios and $I_cR_N$ products—reach application thresholds, although further increase in $J_c$ and $R_{\rm sg}/R_N$ is desirable for maximally wide intermediate frequency bandwidths and noise minimization.

Superconducting Qubits: All-nitride trilayers grown by PEALD enable reproducible, scalable Josephson junctions for transmon circuits. Coherence times ($T_1=1$–4 μs, $T^*_2\sim0.6$–1.2 μs) are maintained up to 400 mK, significantly exceeding Al-based devices at elevated temperature due to the high $\Delta$ and $T_c$. Qubit parameters such as $E_J/E_C$ (up to 117), $f_{01}=4$–5 GHz, and $I_c$ tunability over seven orders of magnitude (controlled by ALD cycle count) have been demonstrated. The ALD process is CMOS-compatible and enables precise, wafer-scale integration (Wang et al., 12 Nov 2025).

Flux-Flow Oscillators: Asymmetric Nb–AlN–NbN flux-flow oscillators are modeled microscopically using Bardeen’s tunneling Hamiltonian, capturing features such as the sum-gap threshold $eV\geq\Delta_\mathrm{Nb}+\Delta_\mathrm{NbN}$, gap-difference step, and photon-assisted tunneling, which are absent in the traditional PSGE sine-Gordon models (Gulevich et al., 2018). The models accurately predict measured I–V curves, including self-coupling kinks and extended frequency/gap tunabilities (e.g., $f_{\rm max}\sim1$ THz, linewidth $\Delta f\sim1$ MHz), with direct connections to material parameters ($\Delta$, $R_N$).

5. Theoretical Modeling and Key Equations

The Josephson properties and tunneling spectra are analyzed using the Ambegaokar–Baratoff relation: $$I_cR_N = \frac{\pi\Delta}{2e}\tanh\left(\frac{\Delta}{2k_BT}\right)$$ with measured $\Delta$ and $T$ yielding $I_cR_N\sim2.5$–3.9 mV.

Capacitance is evaluated in the parallel-plate limit: $C_J = \epsilon_r\epsilon_0A/d$ where $\epsilon_r(\mathrm{AlN})\approx 8$–9, $d=2$ nm, $A$ device area.

Microscopic current-voltage ($I$–$V$) curves for asymmetric Nb–AlN–NbN SIS junctions are integrated as: $$I(V)=\frac{1}{eR_N}\int_{-\infty}^{\infty}N_1(E)N_2(E+eV)[f(E) - f(E+eV)]dE$$ with $N_i(E)$ the BCS density of states with respective $\Delta_i$.

For qubit (transmon) applications, the key frequencies and energy scales are given by: $$E_J=\frac{\hbar}{2e}I_c,\qquad E_C=\frac{e^2}{2C_\Sigma},\qquad f_{01} \approx \frac{1}{h}(\sqrt{8E_JE_C}-E_C)$$ with $E_J/E_C$ ratio, coherence times, and coupling rates ($g/2\pi$) directly measured.

6. Performance Metrics and Scaling Considerations

Key performance metrics for state-of-the-art trilayer junctions include:

• Area-corrected $J_c$: 40–60 kA cm$^{-2}$ (Si), 1–4 kA cm$^{-2}$ (sapphire), tunable to $J_c \sim 10^{-4}$ A cm$^{-2}$ (ALD).
• Junction diameters: down to 0.27 μm with robust gap structure and minimal subgap leakage.
• $R_NA$: $\sim10^5$ $\Omega·\mu\textrm{m}^2$, uniform across 2" wafers.
• $R_{\rm sg}/R_N$: $>100$ (Si), 9–15 (sapphire), up to 55 (PEALD).
• Qubit $T_1$: $1$–$4$ µs at $10$ mK, persisting at $1$–$3$ µs for $T=300$–$400$ mK (Wang et al., 12 Nov 2025).
• IC mixers: $V_g$ up to 5.1 mV implies photon energy cutoff $f_\text{max}>1$ THz.

Device yield, reproducibility, and scalability are directly enabled by atomic-level control in ALD, uniform sputtering, and robust wet/dry etch chemiresistance of nitride materials. Junction parameter variation ($J_c$, $R_N$, $A$) is dominated by barrier thickness uniformity and etch precision, with documented increment sizes of $\pm 0.1$ nm corresponding to measurable $J_c$ changes.

7. Future Prospects and Implications

The integration of high-$T_c$ nitrides in Josephson tri-layers enables next-generation quantum, cryogenic, and THz electronics. ALD-based methods extend these platforms to CMOS foundry scale and allow conformal growth on varied device architectures. High-gap NbN trilayers facilitate quantum circuits operable at temperatures up to $400$ mK, which reduces cryogenic requirements and system costs. Atomically uniform AlN barriers and robust process windows suggest scalability to multi-qubit arrays, SFQ circuits, and frequency-stable THz sources.

Development directions include further enhancement of subgap resistances, exploration of alternative nitride barriers for tailored transparency, and integration into multilayer quantum processor or receiver chips. The microscopic modeling of tunneling and oscillator behavior, capturing material-dependent gap effects, enables rational design of high-frequency, low-noise devices(Gulevich et al., 2018). Empirical evidence, from wafer-scale uniformity to microsecond qubit coherence at elevated temperature, positions NbN/AlN/NbN trilayers as a leading technology for advanced superconducting electronics and quantum information platforms (Qiu et al., 2020, Merker et al., 2016, Wang et al., 12 Nov 2025, Gulevich et al., 2018).