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Merged-Element Transmons

Updated 10 December 2025
  • Merged-element transmons are superconducting qubits that leverage the Josephson junction's intrinsic capacitance to replace large, lossy shunt capacitors, reducing decoherence from parasitic two-level systems.
  • Their design confines over 90% of the electromagnetic energy to the tunnel barrier, resulting in significant footprint reduction and more uniform qubit frequency allocation.
  • Advanced fabrication methods, including Al/AlOₓ, FinMET, and geometric inductor integration, enable tunable nonlinearity and fast two-qubit interactions in scalable quantum circuits.

A merged-element transmon (MET) is a superconducting qubit in which the Josephson junction’s intrinsic self-capacitance replaces the large, lossy planar shunt capacitor traditional to the transmon architecture. The MET’s electromagnetic energy is almost entirely confined to the tunnel barrier region, suppressing decoherence mechanisms associated with parasitic two-level systems (TLS) at other circuit interfaces and enabling substantial footprint reduction, tighter qubit–frequency allocation, and simplified fabrication compatible with modern semiconductor processing. METs can be realized using micrometer-scale Al/AlOₓ/Al junctions, epitaxial Al/Si/Al structures (“FinMET”), or amorphous-trilayer junctions, and are now extended to include designs utilizing explicit geometric inductors for tunable nonlinearity and fast two-qubit interactions.

1. Circuit Architecture and Physical Principles

The canonical MET consists of a single micrometer-scale Josephson junction (JJ) fabricated from Al/AlOₓ/Al or similar superconductor–insulator–superconductor trilayers, engineered so that both the Josephson nonlinearity and the transmon’s shunt capacitance CtotC_{\text{tot}} arise from the junction itself. Whereas conventional transmons use large (104μm2\gtrsim 10^4\,\mu\text{m}^2) coplanar/interdigitated capacitors to provide CshuntC_{\text{shunt}} (and thus drive the qubit into the charge-insensitive regime with EJ/EC20E_J/E_C \sim 20–$100$), METs leverage the fact that for a barrier thickness d2d \sim 2–$10$ nm and area A1A \sim 15μm25\,\mu\text{m}^2, the junction capacitance CJJ=ε0εrA/dC_{JJ} = \varepsilon_0 \varepsilon_r A / d (εr10\varepsilon_r \sim 10 for AlOₓ, 12\sim 12 for Si barriers) naturally yields the $20$–$100$ fF range required for transmon operation (Mamin et al., 2021, Goswami et al., 2021, Daum et al., 26 Sep 2025).

A representative MET circuit contains:

  • A single Josephson junction shunted only by its intrinsic capacitance;
  • Optional “antenna” arms for capacitive coupling to resonators;
  • In some variants, a geometric inductor LL for additional spectral tunability and sideband coupling (Fasciati et al., 2024).

In all embodiments, the electromagnetic energy participation ratio pjj=CJJ/Ctotp_{jj} = C_{JJ}/C_{\text{tot}} exceeds $0.9$, concentrating the electric field in the junction barrier. This configuration minimizes field overlap with surface dielectrics and interface defects that are known to dominate loss in large-area conventional transmons (Mamin et al., 2021, Daum et al., 26 Sep 2025).

2. Fabrication Modalities and Materials Interfaces

METs have been demonstrated using a variety of barrier materials and processing approaches:

  • Al/AlOₓ/Al junctions: Standard shadow-evaporation with long O₂ oxidations yields barriers of \sim2 nm and areas \sim1.4–2.4 μ\mum2^2, with Ic24I_c\sim 24 nA and CJJ62C_{JJ}\sim 62 fF (Mamin et al., 2021). Annealing (5 min, $375$–425425^\circC) raises the oxide gap and junction resistance, correlating with improved device quality factors.
  • In-situ bandaged Dolan process for Al JJs: Two-junction SQUID loops (“mergemon” qubits) with double oxidation and a thin tuning layer provide reproducible barrier thickness dJJ2.7d_{JJ}\sim 2.7–$3.1$ nm. Device footprints are minimized by compact islands with reduced geometric capacitance (Daum et al., 26 Sep 2025).
  • Si FinMET: Fin-based Si(110) substrates, anisotropically etched to expose atomically flat Si{111} planes, serve as intrinsic crystalline barriers. Epitaxial Al is deposited on the fin sidewalls, forming Al/Si/Al junctions with target barrier thickness tfin5t_{\text{fin}}\sim 5–$10$ nm. Collective capacitances C1C\sim 1–2 fF/μ\mum are achieved, and process flow is compatible with standard CMOS fabrication (Goswami et al., 2021).
  • Nb/a-Si/Nb trilayers: Used in early MET demonstrations, these devices replace the coplanar shunt with an amorphous Si barrier (thickness \sim9 nm, area rn0.5μr_n\sim 0.5\,\mum), although dielectric loss remains higher in amorphous layers (Zhao et al., 2020).
  • Geometric inductor integration: A simple geometric inductor in parallel with the JJ enables flux-tunable anharmonicity and rapid two-qubit gates while maintaining a single-JJ, low-participation layout (Fasciati et al., 2024).

For Si-based METs, Schottky barrier heights and interface atomic relaxations fundamentally determine tunneling characteristics. First-principles calculations for Al(111)/Si(111) and CoSi2_2(111)/Si(111) structures yield pp-type barriers ϕp0.4\phi_p \sim 0.4–$0.8$ eV; the optimal regime for 4–5 GHz multi-qubit operation is obtained for s6s \sim 6–8 nm crystalline Si with ϕp0.5\phi_p\sim 0.5–0.6 eV, specifically the CoSi2_2(111)-Si(111) B8 interface (Nangoi et al., 2024).

3. Electromagnetic Energy Distribution and Loss Participation

The MET is engineered to confine nearly all (\gtrsim90%) of its electric field energy within the tunnel barrier, quantified by the participation ratio

pjj=CJJCtot0.93p_{jj} = \frac{C_{JJ}}{C_{\text{tot}}} \sim 0.93

while geometric and substrate/vacuum participations are suppressed (3\sim 3–$7$ fF added by antenna arms or leads) (Mamin et al., 2021, Daum et al., 26 Sep 2025).

By contrast, conventional planar transmons exhibit pjj0.02p_{jj} \lesssim 0.02 (most energy in the coplanar shunt capacitor). This design choice in the MET minimizes the impact of dielectric loss from substrate and surface oxides, as confirmed by measured substrate-vacuum participation rates (3.5×1053.5\times 10^{-5}\,nm1^{-1} in METs vs 5.0×1055.0\times 10^{-5}\,nm1^{-1} in coplanar transmons) (Mamin et al., 2021).

Loss analysis using participation ratios and extracted loss tangents (from TLS spectroscopy under strain and electric fields) shows that once surface EPR is minimized, junction TLS become the dominant decoherence channel. Measured and simulated loss tangents are

  • tanδsurf103\tan\delta_{\text{surf}}\sim 10^{-3}10410^{-4} (surface)
  • tanδJJ1.2×103\tan\delta_{JJ}\sim 1.2\times 10^{-3} (junction, from TLS density and coupling)
  • tanδJJ5×107\tan\delta_{JJ}\lesssim 5\times 10^{-7} in the best annealed AlOₓ devices (Mamin et al., 2021, Daum et al., 26 Sep 2025).

Participation ratios for Si-based barriers (FinMET) are expected to be lower due to the absence of amorphous oxides and use of atomically flat interfaces (Goswami et al., 2021, Nangoi et al., 2024).

4. Energy Spectra, Spectroscopy, and Qubit Performance

In the weakly anharmonic (transmon) limit, the MET Hamiltonian retains its canonical form:

H^=4EC(nn~g)2EJcosφ\hat{H} = 4E_C(n-\tilde{n}_g)^2 - E_J\cos\varphi

with EJ=Ic/(2e)E_J=\hbar I_c/(2e) and EC=e2/(2Ctot)E_C = e^2/(2\,C_{\text{tot}}). The spectrum is characterized by transition frequencies

ω018EJECEC\omega_{01}\approx \frac{\sqrt{8E_J E_C}}{\hbar} - \frac{E_C}{\hbar}

and anharmonicity αEC/\alpha\approx -E_C/\hbar.

  • Al/AlOₓ METs: f014.4f_{01}\sim 4.45GHz5\,\text{GHz} (unannealed), $3.3$–3.8GHz3.8\,\text{GHz} (annealed), α/2π=300\alpha/2\pi=300450MHz450\,\text{MHz}, EJ/EC=20E_J/E_C=20–$32$ (Mamin et al., 2021).
  • Mergemons (Al JJ SQUIDs): fq=4.8f_q=4.87.7GHz7.7\,\text{GHz}, EC/h=180E_C/h=180340MHz340\,\text{MHz}, EJ/EC=30E_J/E_C=30–$213$, tunable via external flux (Daum et al., 26 Sep 2025).
  • Nb/a-Si/Nb: EJ/EC61E_J/E_C\sim 61, fq=4.5GHzf_q=4.5\,\text{GHz}, α260MHz\alpha\approx -260\,\text{MHz} (Zhao et al., 2020).
  • FinMET: Tuning achieved by adjusting Si fin thickness on the nanometer scale; predicted Qi>106Q_i>10^6, T1,T2100T_1, T_2^* \sim 100300μ300\,\mus (Goswami et al., 2021).

Qubit coherence times and quality factors strongly depend on design and processing:

  • Al/AlOₓ MET, annealed: median T1=46μT_1=46\,\mus, with some devices achieving T1>200μT_1>200\,\mus and Q=1.1×106Q=1.1\times 10^6 (Mamin et al., 2021).
  • Mergemon (Approach B): T1T_1 up to 130μ130\,\mus (Q3.3×106Q\approx 3.3\times 10^6); Approach A: T1=12T_1=1225μ25\,\mus (Daum et al., 26 Sep 2025).
  • Nb/a-Si/Nb: T1=55T_1=55 ns, T245T_2^*\sim 45 ns, limited by a-Si loss (Zhao et al., 2020).
  • FinMET: Resonators with Q up to 1.8×1041.8\times 10^4 pre-thinning; post-thinning and surface cleaning projected to reach tanδ104\tan\delta\lesssim 10^{-4} and Q>106Q>10^6 (Goswami et al., 2021).

Frequency uniformity across dies is improved in mergemon designs due to insensitivity to lithographic area fluctuations; measured RSD(fq)1%RSD(f_q)\sim 1\% for RSD(Ic)4%RSD(I_c)\sim 4\% (Daum et al., 26 Sep 2025).

5. Loss Mechanisms, Coherence, and Two-Level Systems

The MET paradigm is motivated by the desire to concentrate effort on controlling a single, relatively well-defined interface: the tunnel barrier. In conventional transmons, decoherence is dominated by parasitic TLS at the edges of coplanar shunt capacitors and junction leads. In METs and mergemons, the dominant loss mechanisms are:

  • Surface TLS: Amorphous layers at metal–air and substrate–air interfaces. Their contribution is minimized by careful design (enlarged islands, narrowed leads, optimized layout) that reduces the electric participation ratio (EPR) of these surfaces. Approach B in mergemon qubits achieves EPRS0.5×103EPR_S\sim 0.5\times 10^{-3} and a ten-fold reduction in surface TLS density compared to conventional designs (Daum et al., 26 Sep 2025).
  • Junction TLS: Intrinsic to the tunnel barrier (AlOₓ or a-Si), with higher densities in thicker or amorphous barriers. Junction TLS exhibit strong coupling to the qubit due to high local EE-field, with volume densities P02000P_0\sim 2000–$2300/($GHzμ\cdot\mum3)^3) for AlOₓ barriers. The measured loss tangent tanδJJ1.2×103\tan\delta_{JJ}\sim 1.2\times 10^{-3} can become the limiting factor after surface loss suppression (Daum et al., 26 Sep 2025).
  • Fabrication dependence: Double oxidation, annealing, and advanced surface treatments reduce both surface and junction TLS. Prospective strategies include crystalline or epitaxial barriers and thermal/alternating-bias annealing (Daum et al., 26 Sep 2025, Mamin et al., 2021).
  • Geometric inductor METs: Coherence metrics (single-qubit T1=37μT_1=37\,\mus, T2E=46μT_2^E=46\,\mus) are comparable to conventional transmons; the key advance lies in the suppression of correlated ZZ errors and in gate performance (Fasciati et al., 2024).

Table: Comparison of Coherence Metrics

MET Variant Median T1T_1 (μ\mus) Best T1T_1 (μ\mus) QQ (max)
Al/AlOₓ/Al (annealed) 46 >200 1.1×1061.1\times10^6
Al/AlOₓ/Al (unannealed) 13 34 3.8×1053.8\times10^5
Mergemon (Approach B) 39–131 130 3.3×1063.3\times10^6
Nb/a-Si/Nb 0.055
FinMET (projected, post-thin) 100–300 >10610^6

6. Design Scaling, Implementation Trade-offs, and Integration

METs offer orders-of-magnitude footprint reduction. A planar MET junction area is $1.4$–1.9μ1.9\,\mum2^2, compared to >104μ>10^4\,\mum2^2 for a typical planar shunt capacitor, affording packing densities >104>10^4 qubits/cm2^2 (Mamin et al., 2021, Goswami et al., 2021, Zhao et al., 2020). In FinMETs, integration leverages mature CMOS fin-processing, with all steps—mask deposition, anisotropic KOH etch, digital (atomic-layer) thinning, and shadow metal deposition—fully compatible with large-scale foundry environments (Goswami et al., 2021). The merged-element layout allows elimination of radiative “antenna” modes, reduction of inter-qubit crosstalk, and more uniform wiring.

For silicon-interface METs, first-principles studies (Nangoi et al., 2024) indicate that interface configuration and barrier thickness/schottky-barrier height trade-offs directly set JcJ_c and thus fqf_q. The Josephson current density scales as JcJ0exp(2κs)J_c \sim J_0 \exp(-2\kappa s) with κ2mhϕp/\kappa \sim \sqrt{2 m^*_h \phi_p }/\hbar; for target frequencies 4–5 GHz, design rules require crystalline Si barriers of s=6s=6–8 nm and ϕp0.5\phi_p \sim 0.5–$0.6$ eV. The optimal structures, such as CoSi2_2(111)/Si(111) in the B8 configuration, have both favorable energetics and a suitable tunneling barrier to reproducibly achieve desired JcJ_c (Nangoi et al., 2024).

7. Extensions: Enhanced Circuit Topologies and Gate Operations

Recent variations extend the MET architecture by integrating parallel Josephson junction arrays (NMon) or explicit shunt inductors (inductively shunted transmon, IST).

  • NMon: By replacing a single JJ with parallel N and M-junction arrays, tunable through external flux, the NMon achieves enhanced relative anharmonicity αr0.1|\alpha_r| \sim 0.1–$0.3$ while preserving transmon-like charge and flux matrix elements. Such designs offer additional suppression of flux-noise-induced dephasing (scaling 1/N\sim 1/N), with smooth interpolation between transmon and fluxonium modalities (Can et al., 2024).
  • IST (Inductively Shunted Transmon): Integration of a geometric LL enables flux-tunable anharmonicity (the sign of α\alpha can cross zero), passive cancellation of static ZZ errors in two-qubit circuits, and rapid first-order sideband gates (\sim75–125 ns) with up to FCZ=95.8%F_{CZ}=95.8\% in experiment. The simplicity and passive ZZ protection are promising for 2D qubit lattices with large native gate sets (Fasciati et al., 2024).

These advancements demonstrate that MET paradigms are compatible with qubit tileability, aggressive scaling, and advanced control protocols, while offering insight into the fundamental materials challenges limiting further improvement.


References:

(Mamin et al., 2021, Goswami et al., 2021, Fasciati et al., 2024, Daum et al., 26 Sep 2025, Zhao et al., 2020, Can et al., 2024, Nangoi et al., 2024)

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