Characterizing and Benchmarking Dynamic Quantum Circuits

Abstract: Dynamic quantum circuits with mid-circuit measurements (MCMs) and feed-forward operations play a crucial role in various applications, such as quantum error correction and quantum algorithms. With advancements in quantum hardware enabling the implementation of MCM and feed-forward loops, the use of dynamic circuits has become increasingly prevalent. There is a significant need for a benchmarking framework specially designed for dynamic circuits to capture their unique properties, as current benchmarking tools are designed primarily for unitary circuits and cannot be trivially extended to dynamic circuits. We propose dynamarq, a scalable and hardware-agnostic benchmarking framework for dynamic circuits. We collect a set of dynamic circuit benchmarks spanning various applications and propose a broad set of circuit features to characterize the structure of these dynamic circuits. We run them on two IBM quantum processors and the Quantinuum Helios-1E emulator, and propose scalable, application-dependent fidelity scores for each benchmark based on hardware execution results. We perform statistical modeling to identify correlations between circuit features and fidelity scores, and demonstrate highly accurate fidelity prediction using our model. Our model parameters are also transferable across hardware backends and calibration cycles. Our framework facilitates the understanding of dynamic circuit structures and provides insights for designing and optimizing dynamic circuits to achieve high execution fidelity on quantum hardware.

• The paper introduces dynamarq, the first hardware-agnostic framework that benchmarks dynamic quantum circuits incorporating mid-circuit measurements and feed-forward control.
• The methodology employs analytical modeling and regression analysis, achieving R² correlations up to 0.95 and fidelity improvements over traditional baselines.
• The work demonstrates strong transferability across hardware backends, providing actionable insights for optimizing quantum algorithms and error correction protocols.

Characterizing and Benchmarking Dynamic Quantum Circuits: An Analysis

Introduction and Motivation

Dynamic quantum circuits, which incorporate mid-circuit measurements (MCMs) and feed-forward classical control, are central to several advanced quantum computational primitives including quantum error correction (QEC), state preparation, and specific algorithmic speedups. Unlike standard unitary circuits—where measurements are conducted exclusively at the end—dynamic circuits restructure quantum information flow at runtime, depending on MCM outcomes. This flexibility enables major resource reductions, with constant-depth implementations for operations that would otherwise incur linear or greater depth overhead, as in long-range CNOTs and multipartite entanglement generation.

Despite their growing theoretical and experimental prominence, benchmarking methodologies for dynamic circuits have lagged. Existing frameworks are optimized for unitary circuits and fail to capture the characteristic non-determinism, outcome-dependent structure, and hardware-specific error channels present in dynamic quantum computation.

The work "Characterizing and Benchmarking Dynamic Quantum Circuits" (2604.03360) introduces dynamarq, the first hardware-agnostic application-level benchmarking suite explicitly tailored for dynamic quantum circuits. The framework addresses not only the deficiencies of static benchmarking paradigms in this context but also introduces new feature metrics and scalable fidelity scores for dynamic algorithmic constructs.

Framework Architecture

The dynamarq framework is composed of several core modules, each engineered for extensibility and compatibility across hardware backends:

1. Dynamic Benchmark Suite: Parameterized dynamic circuits for applications including GHZ/state preparation, Clifford gate primitives (e.g., long-range CNOT, CNOT ladders, fanout), dynamic versions of QFT and iterative phase estimation (IPE), Trotterized Hamiltonian simulation, and basic QEC codes (bit-flip, five-qubit, Steane).
2. Dynamic Circuit Features: Augmented feature extraction, incorporating both traditional and dynamic-only circuit characteristics, such as expected depth and operation count under MCM-induced branching (using analytically or empirically estimated branch probabilities), quantum and "classical" entanglement, liveness, parallelism, dynamic depth ratio, and communication metrics.
3. Scalable Fidelity Scores: Application-dependent, efficiently computable fidelity metrics, normalized and scalable in qubit number, enable principled comparisons across algorithmic classes and hardware architectures.
4. Statistical Modeling/Predictive Analytics: Regularized linear regression models are used for mapping circuit features to observed fidelities, enabling both analysis (feature importance, correlation structure) and fidelity prediction (for unseen circuits, machines, or calibration cycles).
5. Transferability and Robustness: Parameter transfer studies reveal high cross-platform and cross-calibration predictive performance, indicating substantive generalizability of the learned feature-fidelity relationships.

Formalization of Dynamic Circuit Structure and Features

A critical innovation is the analytical formalism for expressing expected values (e.g., depth, gate count, entanglement) of a dynamic circuit as a function over measurement branches, without resorting to full classical simulation or hardware execution. This approach leverages branch probabilities determined by the structure of dynamic control and, where applicable, empirically validates uniform branch weightings with the normalized Rényi-2 entropy of observed distributions.

Key dynamic-specific features include:

• Expected Circuit Depth and Operation Count: Computed as a weighted sum over all branches determined by possible classical bitstrings resulting from MCMs, reflecting the true executed structure.
• Dynamic Entanglement Measures: Distinction between quantum entanglement (unconditional two-qubit gates present in all branches) and classical entanglement (conditional gates in post-measurement circuit fragments).
• Hardware-dependent Depth and Operation Definitions: Optional inclusion of feed-forward logic durations to accurately represent real-system behavior.
• Communication Metrics: Weighted adjacency matrices and degree-based communication scores, capturing both quantum and classically mediated qubit correlations.
• Liveness and Parallelism: Time-based activation metrics demonstrating the exposure of qubits to decoherence during idle periods and the degree of gate-layer concurrency.

  Figure 1: A dynamic circuit preparing a 2-qubit GHZ state, demonstrating information propagation via MCM and feed-forward logic.

Benchmark Applications and Fidelity Evaluation

The benchmark suite is comprehensive, covering state preparation (GHZ, Bell, MPS), constant-depth Clifford gates, dynamic QFT variants, IPE, Trotterized Hamiltonian simulation (TFIM), and basic QEC codes. Notable aspects include:

• GHZ and Clifford Gate Preparation: Enables direct assessment of multi-qubit entanglement generation in the presence of dynamic control pathways.
• QFT and IPE: Dynamic versions alleviate hardware connectivity constraints at the expense of additional MCM and classical feed-forward, providing testbeds for quantifying this tradeoff.
• Hamiltonian Simulation Benchmarks: Utilize MPS-certifiable protocols to support scalable fidelity assessment on hardware.
• QEC Mini-benchmarks: Despite the absence of full real-time syndrome decoding on all platforms, these demonstrate practical dynamic control at moderate scale and provide a bridge toward future fault-tolerance thresholds.

Each application is paired with an efficient fidelity metric (e.g., Hellinger fidelity for multi-qubit state distributions, DFE for Clifford circuits, logical error rates for QEC) that is robust to increasing qubit count, avoiding costly tomographic inference.

Figure 3: The dynamarq dynamic circuit benchmark suite, spanning state preparation, gate synthesis, algorithmic primitives, and QEC circuits.

Statistical Modeling and Feature-Fidelity Correlations

Regularized linear regression models are trained to map extracted circuit features to observed fidelities across IBM Kingston, IBM Pittsburgh, and Quantinuum Helios-1E emulated hardware, both with and without dynamical decoupling error mitigation. Notable numerical results include:

• Maximum $R^2$ correlation scores of 0.86–0.95 using the full dynamarq feature set, confirming the expressive power of the proposed metrics.
• Predictive power gain of up to 53.4% over SupermarQ and 2.8× over state-of-the-art baselines on IBM hardware and Helios-1E.
• Top feature predictors vary by backend: For superconducting devices, number of qubits, dynamic depth ratio, and liveness are dominant; for trapped-ion systems, circuit depth and communication emerge most strongly.
• Generalization performance: Predictive $R^2$ on unseen test sets remains $\geq 0.72$ in standard random splits and is robust to cross-backend and cross-calibration evaluation.
• Transferability: Models trained on one hardware backend perform competitively on others with minimal degradation, highlighting the potential for cross-platform benchmarking standards.

  Figure 5: Linear regression correlation between circuit features and fidelity scores on IBM Pittsburgh under different feature sets, illustrating superior predictive accuracy for dynamarq features over SupermarQ baselines.

  

  Figure 2: Heatmap illustrating per-feature correlation with fidelity across multiple hardware backends.

  

  Figure 8: Benchmark fidelity scores on IBM Kingston quantum hardware.

  

  Figure 4: Benchmark fidelity scores on IBM Pittsburgh quantum hardware.

  

  Figure 6: Benchmark fidelity scores on Quantinuum Helios-1E emulator.

Implications and Future Perspectives

This work sets a new precedent for the systematic benchmarking of quantum systems capable of executing dynamic circuits. The feature formulation and benchmarking methodology not only enable nuanced analysis of hardware-specific error sources linked to dynamic control but also facilitate the design-space exploration and optimization of quantum algorithms under real device constraints.

Practically, dynamarq permits researchers and hardware vendors to assess, compare, and forecast the viability of quantum systems for dynamic-circuit-intensive applications—such as QEC and adaptive algorithms—well beyond the limitations of static benchmarking. The transferability of predictive models and robustness across calibration cycles suggest that the framework can underpin agile benchmarking pipelines for rapidly evolving quantum hardware landscapes.

Theoretical implications include the ability to separate fidelity bottlenecks attributable to quantum and classical control, the possibility to optimize circuit compilation for dynamic architectures, and, by extension, to inform the co-design of hardware-specific dynamic protocols. As the focus of quantum computing moves increasingly toward error-corrected and algorithmically adaptive regimes, the dynamarq methodology becomes essential.

Conclusion

The "Characterizing and Benchmarking Dynamic Quantum Circuits" paper introduces a comprehensive, application-level framework for the systematic characterization, evaluation, and fidelity prediction of dynamic quantum circuits, filling a significant gap in quantum benchmarking infrastructure. The introduction of dynamic-specific circuit features and robust, scalable fidelity measures marks a substantive advancement in benchmarking methodology. The resulting predictive models exhibit strong transferability, and the experimental data substantiate the superiority of this approach over unitary-centric baselines. Future extensions to more advanced QEC codes and real-time decoding, along with ongoing hardware advancements, are expected to further broaden the impact and utility of dynamarq as an open benchmarking standard for the dynamic, error-corrected era of quantum computation (2604.03360).