VAPC for Transient Stability in GFM-VSCs

• Virtual Unsaturated Active-Power Controller (VAPC) is a control strategy that replaces saturated active-power measurements with a computed 'virtual' signal derived from unsaturated current references and PCC voltage.
• It avoids misleading power collapse during faults by ensuring the self-synchronisation loop is driven by a signal reflective of the unsaturated internal request rather than a limited output.
• Quantitative analyses show that employing VAPC increases critical clearing times and improves post-fault recovery across various self-synchronisation strategies such as VSM-noPLL, VSM-PLL, and IP control.

Searching arXiv for the cited paper and adjacent control literature to ground the article. Virtual Unsaturated Active-Power Controller (VAPC) denotes the use of a virtual, unsaturated active-power signal as the feedback variable of the self-synchronisation loop of a grid-forming voltage source converter (GFM-VSC), instead of the physically measured active-power injection. In the formulation studied for transient-stability analysis, the self-synchronisation mechanism receives a virtual power signal computed from unsaturated current references and measured point-of-common-coupling (PCC) voltage, while the physical converter remains subject to current limiting. Its stated purpose is to improve transient stability, especially during severe faults that drive the converter into current or power limiting and would otherwise make measured active power collapse toward zero, producing excessive angle and frequency excursions and possible loss of synchronism (Avila-Martinez et al., 4 Sep 2025).

1. Definition and control objective

In the cited formulation, VAPC is both described as “Virtual Active Power Control (VAPC)” and as a “Virtual Unsaturated Active-Power Controller” idea. The essential modification is confined to the active-power feedback path of the self-synchronisation controller: the controller no longer reacts to the saturated external active-power output $p_g$, but to a virtual signal $p_g^{virt}$ intended to represent what the active-power-related internal request would have been without current saturation (Avila-Martinez et al., 4 Sep 2025).

The control problem arises because the synchronising loop of a GFM-VSC is driven by the mismatch between active-power reference and active-power feedback. During a large disturbance, the converter terminal voltage can collapse and the current limiter can activate. Under those conditions, the measured active power $p_g$ drops sharply, often close to zero. If the synchronising controller directly uses that collapsed measurement, it interprets the event as a large power deficit and accelerates the converter frequency and angle aggressively. The paper identifies that mechanism as a direct source of transient-stability degradation, because the synchronisation loop then reacts to the power the converter can physically inject under saturation rather than to the underlying power-angle relation that would exist absent current clipping (Avila-Martinez et al., 4 Sep 2025).

The intended effect of making active-power feedback “virtually unsaturated” is therefore specific: the self-synchronisation mechanism should “see” a signal reflecting the unsaturated internal current request, not the saturated external output. This preserves the physical current limiter, but changes the internal synchronisation dynamics. A plausible implication is that VAPC should be understood not as a replacement for current limiting, but as a redefinition of the feedback variable that drives frequency and angle evolution.

2. Architectural placement in GFM-VSC self-synchronisation

The formulation in (Avila-Martinez et al., 4 Sep 2025) studies four self-synchronisation strategies for GFM-VSCs: VSM-noPLL, VSM-PLL, VSM-Washout, and IP control. A central claim is that VAPC is compatible with any self-synchronisation mechanism and is analyzed for all four strategies. This universality is important because the method does not alter the core synchronisation law itself; it alters the signal entering that law.

In the baseline architecture, the active-power setpoint $p_g^0$ is compared against measured active power $p_g$. With VAPC, the same self-synchronisation block instead receives $p_g^{virt}$. Thus the control error is changed from

$e_p = p_g^0 - p_g$

to

$e_p^{virt} = p_g^0 - p_g^{virt}.$

The outer hierarchy remains the same: the self-synchronisation loop computes $\omega$ and then $\theta$; a quasi-static model generates current references; the current controller and current saturation algorithm act; and modulated voltage is generated. VAPC sits conceptually between current-reference generation and self-synchronisation feedback measurement, because it computes virtual active power from unsaturated current references and measured PCC voltage (Avila-Martinez et al., 4 Sep 2025).

This placement is also the basis for a recurrent clarification. VAPC does not replace the self-synchronisation law, inner current control, or current saturation algorithm. It modifies the active-power feedback variable seen by the synchronising controller while leaving the current limiter physically intact. A common misconception is to treat VAPC as a new synchronisation law; the paper instead presents it as a feedback-path intervention.

3. Mathematical formulation

The self-synchronisation output is the converter angular frequency $p_g^{virt}$0 and angle $p_g^{virt}$1, with the implied kinematic relation $p_g^{virt}$2 in per-unit form or equivalently $p_g^{virt}$3 if $p_g^{virt}$4 is treated directly as angular speed. The converter computes unsaturated current setpoints through a quasi-static model: $p_g^{virt}$5 with

$p_g^{virt}$6

Here $p_g^{virt}$7 and $p_g^{virt}$8 are unsaturated current references before limiting, $p_g^{virt}$9 and $p_g$0 are PCC voltage components in the converter $p_g$1 frame, and $p_g$2 is the equivalent reactance used in current-reference calculation (Avila-Martinez et al., 4 Sep 2025).

The defining VAPC equation is

$p_g$3

This virtual power replaces $p_g$4 in the self-synchronisation equations. For example, the VSM-noPLL and VSM-PLL forms become

$p_g$5

and

$p_g$6

while the IP-control form is modified by the same substitution rule (Avila-Martinez et al., 4 Sep 2025).

The paper’s theoretical contribution is the altered virtual power-angle characteristic. Without current limitation, the baseline active power follows the usual sinusoidal form

$p_g$7

With current saturation, the measured active-power characteristic is reduced, which the paper identifies as the cause of diminished transient-stability margin. Under VAPC, however, the virtual power-angle relation becomes

$p_g$8

with

$p_g$9

For the conventional current saturation algorithm with equal $p_g^0$0- and $p_g^0$1-axis priority, $p_g^0$2 and $p_g^0$3 have the same phase, so $p_g^0$4 is real and $p_g^0$5. Consequently, once current saturation starts, the denominator $p_g^0$6 is smaller than $p_g^0$7, and the virtual $p_g^0$8-$p_g^0$9 curve is larger than the ordinary one (Avila-Martinez et al., 4 Sep 2025).

That inequality is the mathematical basis for the paper’s central interpretation: transient-stability behaviour is driven by $p_g$0-$p_g$1 curves using $p_g$2, independently of whether the current limit is reached. This suggests that VAPC acts as a synchronisation-preserving reparameterisation of the outer-loop power signal rather than as a change to the physical power transfer capability.

4. Mechanism of transient-stability improvement

The transient-stability mechanism is described explicitly. Without VAPC, a severe fault causes terminal voltage collapse, activation of the current limiter, collapse of measured active power toward zero, a large mismatch $p_g$3, acceleration of $p_g$4, rapid growth of $p_g$5, and possible failure to resynchronise after fault clearing. This is particularly severe for controllers such as IP control, where $p_g$6 removes the stabilising power-dependent term and leaves strong frequency acceleration (Avila-Martinez et al., 4 Sep 2025).

With VAPC, the physical converter remains current-limited, but the synchronisation loop uses $p_g$7 rather than saturated $p_g$8. The internal controller therefore sees an unsaturated power-angle relation; the effective $p_g$9-$p_g^{virt}$0 curve driving synchronisation is enlarged; the mismatch $p_g^{virt}$1 is smaller than $p_g^{virt}$2; frequency and angle excursions are reduced; post-fault recovery is improved; and critical clearing time increases (Avila-Martinez et al., 4 Sep 2025).

The paper further characterizes this in internal-state terms: VAPC prevents the self-synchronisation inertial or integrative states from “running away” only because the output has been clipped by the current limiter. It is described as exactly analogous in spirit to anti-windup ideas, except that the implementation is through a virtual feedback power rather than standard limiter back-calculation. That analogy is interpretive but explicitly stated in the source material.

Two clarifications follow from this mechanism. First, VAPC does not increase the physical fault current capability of the converter; it changes the feedback seen by the synchronising dynamics. Second, its main benefit appears when transient instability is tied to the reduced $p_g^{virt}$3-$p_g^{virt}$4 characteristic produced by current saturation, rather than to all possible fault-induced phenomena.

5. Quantitative evidence and comparison with FLC

The principal quantitative metric used in (Avila-Martinez et al., 4 Sep 2025) is critical clearing time (CCT). In the EMT study, the base-case CCTs without VAPC or frequency limitation control (FLC) are 280 ms for VSM-noPLL with $p_g^{virt}$5, 1600 ms for VSM-noPLL with $p_g^{virt}$6, 1700 ms for VSM-PLL with $p_g^{virt}$7, 1020 ms for VSM-Washout with $p_g^{virt}$8, and 190 ms for IP control. With VAPC only, those values become 540 ms, 2640 ms, 3440 ms, 1900 ms, and 390 ms, respectively (Avila-Martinez et al., 4 Sep 2025).

Strategy	Base CCT (ms)	VAPC only (ms)
VSM-noPLL, $p_g^{virt}$9	280	540
VSM-noPLL, $e_p = p_g^0 - p_g$0	1600	2640
VSM-PLL, $e_p = p_g^0 - p_g$1	1700	3440
VSM-Washout, $e_p = p_g^0 - p_g$2	1020	1900
IP control	190	390

The same paper reports that, for a 300 ms clearing-time fault, synchronism is lost without VAPC for VSM-noPLL with $e_p = p_g^0 - p_g$3 and for IP control, whereas with VAPC synchronism is maintained in all cases. Within the scope of that test system, this is direct evidence that the method improves transient stability across all four studied self-synchronisation strategies (Avila-Martinez et al., 4 Sep 2025).

The paper also introduces FLC, which acts differently. VAPC modifies the active-power feedback seen by the synchronisation loop, whereas FLC directly limits converter frequency during detected faults. The two methods are presented as complementary rather than alternative. In the reported CCT table, the combination produces the highest value for VSM-PLL, reaching 3830 ms, and is also strongest for IP control, where base, VAPC only, FLC only, and VAPC+FLC CCTs are 190 ms, 390 ms, 1160 ms, and 1830 ms, respectively (Avila-Martinez et al., 4 Sep 2025).

This comparison supports a narrower interpretation of each mechanism. VAPC is particularly effective when transient instability is tied to the reduced $e_p = p_g^0 - p_g$4-$e_p = p_g^0 - p_g$5 characteristic caused by current saturation. FLC is particularly effective when direct suppression of frequency growth is more critical. The source text makes that distinction explicitly.

6. Simulation context, implementation, and assumptions

The evaluation in (Avila-Martinez et al., 4 Sep 2025) uses EMT simulation in Matlab/Simulink/SimPowerSystems with detailed average converter models. The test system is a 100 MVA GFM-VSC connected to an infinite bus, with nominal frequency 50 Hz, operating point $e_p = p_g^0 - p_g$6 MW, converter current limit around $e_p = p_g^0 - p_g$7–$e_p = p_g^0 - p_g$8 pu depending on section or figure wording, series reactance $e_p = p_g^0 - p_g$9 pu, and grid line reactance $e_p^{virt} = p_g^0 - p_g^{virt}.$0 pu. The disturbance is a three-phase-to-ground short circuit on line 2–3 close to bus 2, applied at $e_p^{virt} = p_g^0 - p_g^{virt}.$1 s and cleared after varying clearing times. Reported metrics include angle difference $e_p^{virt} = p_g^0 - p_g^{virt}.$2, converter frequency deviation, active and reactive power, current and terminal voltage, and CCT (Avila-Martinez et al., 4 Sep 2025).

Implementation is described as modest if internal signals are already available. VAPC requires computation of unsaturated current references $e_p^{virt} = p_g^0 - p_g^{virt}.$3 and $e_p^{virt} = p_g^0 - p_g^{virt}.$4, combination of those references with measured PCC voltage through

$e_p^{virt} = p_g^0 - p_g^{virt}.$5

and substitution of $e_p^{virt} = p_g^0 - p_g^{virt}.$6 for $e_p^{virt} = p_g^0 - p_g^{virt}.$7 in the self-synchronisation loop. The paper does not introduce extra VAPC tuning gains in this formulation. Its effectiveness depends mainly on the converter current-limiting structure, self-synchronisation controller tuning, network reactances, and whether the current saturation algorithm preserves current-reference phase as assumed (Avila-Martinez et al., 4 Sep 2025).

The theoretical derivation rests on specific assumptions: strong-grid-style SMIB analysis, constant $e_p^{virt} = p_g^0 - p_g^{virt}.$8, current limitation by conventional CL-CSA, equal priority for $e_p^{virt} = p_g^0 - p_g^{virt}.$9- and $\omega$0-axis currents, and the same phase for unsaturated and saturated current vectors under CL-CSA. The source also notes prior work showing effectiveness under different current-priority choices, but the explicit derivation in this paper uses the equal-priority case (Avila-Martinez et al., 4 Sep 2025).

These assumptions are significant because VAPC is sometimes misconstrued as a universally parameter-free stabilizer. The reported formulation introduces no additional gain, but its analytical guarantees are tied to the stated current-limiting and network assumptions.

7. Relation to adjacent active-power control research

The paper explicitly states that VAPC was proposed in previous work and that its own contribution is not to invent VAPC, but to evaluate it systematically across VSM-noPLL, VSM-PLL, VSM-Washout, and IP control. That extension is described as important because prior literature had not explicitly applied VAPC to VSM-PLL or VSM-Washout in a systematic comparative transient-stability study (Avila-Martinez et al., 4 Sep 2025).

Adjacent inverter-control literature uses other active-power-loop constructions that are relevant for delimiting the concept. In isochronous multi-inverter microgrids, active power can be regulated through a voltage–active power droop law,

$\omega$1

with a common GPS timing signal enforcing nominal frequency. That architecture may reasonably be interpreted as a voltage-commanded active-power outer loop, but it is not presented as a dynamic unsaturated active-power loop and does not discuss saturation or virtual unsaturated feedback (Patel et al., 2020). Likewise, a unified droop/VSG controller can shape active-power response by filtering, damping-like feedback, and pole-zero design in order to reduce overshoot and oscillation across grid-connected and islanded modes, but it is not presented as a VAPC and does not provide explicit unsaturated active-power logic (Tong et al., 10 May 2025).

At a broader system level, wind-turbine additional active power control has also been derived from a desired optimal frequency trajectory rather than from synchronous-generator emulation. In that setting, the controller is obtained by first solving a frequency-nadir optimization problem under an energy-balance constraint and then synthesizing an aggregate active-power law $\omega$2. That work is conceptually related because it derives a pre-limit or unconstrained active-power trajectory and then reconciles it with physical limits in implementation, but it is neither named nor formulated as VAPC (Zhang et al., 30 Mar 2026).

Taken together, these neighboring works help delimit VAPC precisely. VAPC, in the strict sense treated here, is not any active-power outer loop, not any voltage-mediated power regulator, and not any smooth active-power shaping controller. It is the specific use of a virtual unsaturated active-power feedback signal in the self-synchronisation loop of a current-limited GFM-VSC to mitigate transient-stability degradation caused by measured-power collapse under saturation (Avila-Martinez et al., 4 Sep 2025).