Grid-Following Inverter Control

• Grid-following inverters are grid-tied converters that synchronize with the AC network using a PLL to inject commanded current based on measured voltage conditions.
• Their cascaded control structure, including PLL, current, and voltage loops, enables precise power regulation and adaptability to network disturbances.
• Advanced models use linearized state-space and impedance-based analyses to optimize tuning, assess stability margins, and manage transitions toward grid-forming behavior.

A grid-following inverter is a grid-tied power-electronic converter that injects a commanded current into an existing AC network and synchronizes to the network voltage rather than forming its own voltage. In the standard formulation, the converter measures the point-of-common-coupling (PCC) voltage, estimates grid angle and frequency through a phase-locked loop (PLL), maps active/reactive-power or dc-link objectives into current references, and enforces those references with inner current control and pulse-width modulation. In contemporary research, the grid-following inverter is treated not only as a cascaded control architecture but also as a shaped output admittance, a small-signal dynamical system, an impedance-coupled network component, and a coordinated resource that may transition toward grid-forming behavior when operating conditions deteriorate (Li et al., 2021, Ali et al., 19 Mar 2026, Conte et al., 19 Jun 2025).

1. Functional identity and synchronization

In the classical taxonomy, a grid-following inverter is a current-source converter. Its power stage is typically a voltage-sourced converter followed by a filter, while its grid-facing behavior is that of a controlled current injector whose output admittance is shaped by the inner current loop. In the duality-based formulation, the inverter synchronizes by measuring the PCC voltage $v_{pcc}(t)$, transforming it into synchronous coordinates rotating at $\theta_{PLL}(t)$, and driving the $q$-axis voltage $v_q$ to zero. The resulting PLL law is written as

$$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$

and the same framework interprets the PLL as a $v_q\!-\!\omega$ droop, or dually a $Q\!-\!\omega$ droop, in contrast to the $P\!-\!\omega$ droop of a grid-forming inverter (Li et al., 2021).

This distinction is preserved in newer unified control frameworks. In the virtual-oscillator–based formulation, pure grid-following operation is recovered by setting $\epsilon\to0$ and $\mu\to0$, so that synchronization relies entirely on the externally measured grid frequency $\theta_{PLL}(t)$0 and the internal voltage-forming loop is disabled. In that limit, the inverter operates in PQ mode, tracks $\theta_{PLL}(t)$1, and does not act as a voltage or frequency source; EMT and hardware-in-the-loop results further show that it loses both voltage and frequency once islanded, which is consistent with the defining property of grid-following behavior (Wang et al., 2 Jul 2026).

The functional boundary between grid-following and grid-forming is therefore architectural rather than hardware-based. The same converter hardware can be operated as a purely reference-following current injector, as a continuously parameterized hybrid device, or as a switching GFL/GFM resource. What changes is the synchronization source, the closed-loop variable being regulated, and the extent to which the inverter contributes its own voltage and frequency dynamics (Wang et al., 2 Jul 2026, Lai et al., 20 Mar 2026).

2. Control structure and mathematical representation

The canonical grid-following control stack is a cascaded architecture. In the modified Cigré high-voltage-network study, the grid-following inverter-based resource is modeled as an aggregated 350 MVA two-level, three-phase voltage-source converter with an LC filter interfacing a stiff 660 V/50 Hz AC grid through a $\theta_{PLL}(t)$2 transformer and a dc-link capacitor. Its control comprises four nested loops: PLL, current control, power-to-current transformation, and dc-link voltage control (Conte et al., 19 Jun 2025). A closely related decomposition is used in Control-Sync, whose active grid-following path consists of grid-voltage/current measurement, PLL and phase detector, outer P/Q or dc-voltage control, inner $\theta_{PLL}(t)$3-current PI control with feed-forward and decoupling, and PWM generation via SVPWM or SPWM (Fateh, 2024).

Block	Function	Representative formulation
PLL	Estimates $\theta_{PLL}(t)$4 and frequency from PCC voltage	$\theta_{PLL}(t)$5, $\theta_{PLL}(t)$6 (Fateh, 2024)
Outer loop	Generates $\theta_{PLL}(t)$7 from $\theta_{PLL}(t)$8 or $\theta_{PLL}(t)$9	$q$0, $q$1 (Fateh, 2024)
Current loop	Tracks $q$2 in $q$3 frame	$q$4 (Fateh, 2024)
DC-link control	Regulates $q$5 or $q$6	$q$7 (Conte et al., 19 Jun 2025)

In Control-Sync, the synchronous-frame voltage detector is

$q$8

while instantaneous power is computed as

$q$9

The inner current loop uses feed-forward of the estimated grid voltage and cross-coupling compensation terms $v_q$0, which is the standard mechanism for decoupling $v_q$1- and $v_q$2-axis current regulation in the synchronous frame (Fateh, 2024).

For small-signal analysis, the overall converter and controller are linearized around a steady operating point. In the detailed Cigré-network model, each converter control block and power-electronic stage is assembled into

$v_q$3

where the state vector includes PLL states $v_q$4, current-control states $v_q$5, dc-voltage states, and additional filter and transformer states (Conte et al., 19 Jun 2025). In EMT-oriented formulations, the same physics is expressed directly through phase-domain or $v_q$6-domain differential equations and then embedded into SPICE-style companion models, so that the control loops and network equations can be solved in a unified circuit-simulation framework (Ali et al., 19 Mar 2026).

3. Stability analysis and reduced-order viewpoints

The present literature emphasizes that grid-following stability is a multi-loop, multi-timescale property. In the detailed Cigré high-voltage-network study, stability is assessed by direct eigenvalue analysis of a high-detailed linearized model of the overall network after replacing one synchronous generator with a grid-following IBR. The workflow is explicit: the nonlinear steady state is obtained via load flow in Pandapower; each subsystem is linearized in the $v_q$7 frame; subsystems are interconnected algebraically via MATLAB’s connect; and the eigenvalues $v_q$8 of the assembled matrix $v_q$9 are computed. Stability requires $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$0 in all four network scenarios considered (Conte et al., 19 Jun 2025).

A complementary formulation is the small-signal security region (SSSR). For a parameter vector $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$1, the SSSR is defined as

$$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$2

with boundary

$$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$3

The SSSR paper develops a hyperplane-approximation algorithm to fit $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$4 in a multi-parameter space and introduces a comprehensive stability index

$$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$5

which merges stability margin, sensitivity, and distance to the security boundary. The same study reports that decreasing SCR contracts the GFL SSSR and reduces the stability margin, that higher current-loop gains enlarge the SSSR more than outer-loop gains, and that larger grid $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$6 produces smaller margins (Lai et al., 20 Mar 2026).

Impedance-based modal analysis further decomposes the inverter’s internal origin of instability. The extended impedance modal analysis (EMAI) framework splits the small-signal inverter admittance $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$7 into an electromagnetic component $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$8, a synchronous component $$e(t)=v_q(t), \qquad \dot\theta_{PLL}=\omega_{PLL}, \qquad \dot\omega_{PLL}=k_{p,PLL}e+k_{i,PLL}\int e\,dt,$$9, and a coupling term $v_q\!-\!\omega$0, then computes participation factors, participation ratios, and explicit parameter participation factors directly from impedance data. In that formulation, oscillatory modes need not be attributed generically to “the inverter”: they can be localized to synchronous dynamics dominated by the PLL or electromagnetic dynamics dominated by the current-control loop, and the dominant gains can be identified without constructing a full state-space model of the entire system (Zheng et al., 2 Mar 2025).

A recurrent modeling question is whether a Thévenin equivalent is sufficient. In the Cigré-network comparison, Thévenin equivalents computed at bus 10 yield stability regions in the PLL and current-control planes that are strictly contained within the full-grid region; omitting loads raises $v_q\!-\!\omega$1, lowers SCR, and makes the predicted stability region more conservative. The reported result is that, when the Thévenin equivalent is accurate, its predicted stability region is conservative yet contained within that of the full network (Conte et al., 19 Jun 2025).

4. Parameter tuning, robust design, and performance limits

The most direct tuning results come from eigenvalue sensitivity studies. In the detailed Cigré network, low $v_q\!-\!\omega$2 below approximately $v_q\!-\!\omega$3 pu drives the dominant eigenvalue toward $v_q\!-\!\omega$4, while excessively high $v_q\!-\!\omega$5 pu or $v_q\!-\!\omega$6 pu excites fast unstable modes. For the current loop, a minimum $v_q\!-\!\omega$7 of approximately $v_q\!-\!\omega$8 pu is needed to damp filter resonance, whereas $v_q\!-\!\omega$9 pu may induce low-damping or unstable poles around $Q\!-\!\omega$0 Hz. The same study recommends $Q\!-\!\omega$1 pu, $Q\!-\!\omega$2 pu, $Q\!-\!\omega$3 pu, $Q\!-\!\omega$4 pu, dc-link gains above $Q\!-\!\omega$5 pu and $Q\!-\!\omega$6 pu for either $Q\!-\!\omega$7-PI or $Q\!-\!\omega$8-PI, and filter sizing $Q\!-\!\omega$9 pu, $P\!-\!\omega$0 pu, which places resonance around $P\!-\!\omega$1 Hz and above the dominant interaction frequencies below $P\!-\!\omega$2 Hz (Conte et al., 19 Jun 2025).

Control-Sync presents a bandwidth-separation rule of the standard cascaded type: the inner current loop is tuned at approximately $P\!-\!\omega$3 kHz, the PLL at approximately $P\!-\!\omega$4 Hz, and the outer P/Q or $P\!-\!\omega$5 loop at approximately $P\!-\!\omega$6 Hz, with phase margins kept above $P\!-\!\omega$7. For a 5 kVA, 208 V inverter with $P\!-\!\omega$8 mH and $P\!-\!\omega$9, the reported gains are $\epsilon\to0$0, $\epsilon\to0$1, $\epsilon\to0$2, $\epsilon\to0$3, $\epsilon\to0$4, and $\epsilon\to0$5. Under $\epsilon\to0$6 voltage sag and $\epsilon\to0$7 Hz frequency step, this tuning yields settling times below $\epsilon\to0$8 ms for currents, below $\epsilon\to0$9 ms for PLL lock, and below $\mu\to0$0 ms for P/Q steps (Fateh, 2024).

When grid impedance is highly uncertain, tuning by local bandwidth separation may be insufficient. The $\mu\to0$1-synthesis framework models uncertainty in Thévenin inductance and resistance through an upper-LFT block $\mu\to0$2, shapes performance with $\mu\to0$3, $\mu\to0$4, and $\mu\to0$5, and solves a mixed $\mu\to0$6 problem by D–K iteration. The resulting grid-following current regulator is a 13th-order continuous controller, typically reduced to a 6th–8th-order discrete implementation. Reported robust-stability and robust-performance values are approximately $\mu\to0$7 and $\mu\to0$8, while controller hardware-in-the-loop tests show the RMS instantaneous current tracking error rising only from approximately $\mu\to0$9 to $\theta_{PLL}(t)$00 for a 50% jump in P–Q setpoint and from approximately $\theta_{PLL}(t)$01 to $\theta_{PLL}(t)$02 for a 30% jump in grid impedance; total demand distortion remains below $\theta_{PLL}(t)$03 (Chakraborty et al., 2022).

Alternative control syntheses highlight the same fundamental trade-offs in different mathematical language. The E-GFL framework factorizes the coupled MIMO plant into two approximate SISO loops and uses the Bode sensitivity integral to expose the trade-off among reference tracking, closed-loop bandwidth, robust synchronization, and disturbance rejection. Its typical design point is $\theta_{PLL}(t)$04 Hz, $\theta_{PLL}(t)$05 Hz, $\theta_{PLL}(t)$06 Hz with lead ratios around $\theta_{PLL}(t)$07, while the reported guidance is that robust stability requires $\theta_{PLL}(t)$08 and bandwidth exceeding approximately $\theta_{PLL}(t)$09 for effective decoupling (Askarian et al., 2023).

5. Weak-grid behavior, disturbances, and faults

Weak-grid sensitivity is one of the defining limitations of the grid-following paradigm. In the duality formulation, the relevant characteristic equation is

$\theta_{PLL}(t)$10

so a weaker grid, interpreted as a reduction in grid admittance $\theta_{PLL}(t)$11, moves the root locus toward the right half-plane. The same analysis shows that raising the PLL bandwidth or reducing the inner current-loop bandwidth also shifts roots rightward, identifying grid short-circuit ratio, PLL gains, and inner-loop bandwidth as the critical stability variables in weak-grid operation (Li et al., 2021).

Experimental work confirms that well-tuned grid-following control can nevertheless perform well under moderate disturbances. In Control-Sync tests on four 5 kVA, 208 V inverters and two 30 kVA grid emulators, an active-power step from $\theta_{PLL}(t)$12 to $\theta_{PLL}(t)$13 kW yields current settling in $\theta_{PLL}(t)$14 ms and active-power settling in $\theta_{PLL}(t)$15 ms; a grid-frequency step from $\theta_{PLL}(t)$16 Hz to $\theta_{PLL}(t)$17 Hz yields PLL relock in less than $\theta_{PLL}(t)$18 ms with phase error below $\theta_{PLL}(t)$19; a $\theta_{PLL}(t)$20 voltage sag is tracked within $\theta_{PLL}(t)$21 ms while THD stays below $\theta_{PLL}(t)$22; and in an unbalance test with phase $\theta_{PLL}(t)$23 sagged by $\theta_{PLL}(t)$24, negative-sequence current injection remains below $\theta_{PLL}(t)$25 of nominal and THD below $\theta_{PLL}(t)$26 (Fateh, 2024).

Large disturbances expose a different layer of vulnerability. In the transient angular-stability study of parallel grid-following PV inverters, non-uniform inverter ratings and line impedances reduce the critical fault-clearing time relative to a uniform cluster. The paper reports a uniform-cluster CCT of approximately $\theta_{PLL}(t)$27 ms and a non-uniform-cluster CCT of approximately $\theta_{PLL}(t)$28 ms. The 12 kVA inverter loses synchronism first, and the stated mechanism is that larger apparent power makes an inverter more susceptible to losing synchronism because the maximum current limit causes the PCC voltage to decrease (Mishan, 2023).

Short-circuit studies often suppress the controller dynamics altogether. In the optimization-based inverter model for fault analysis, the detailed PLL and dual-loop current controllers are not modeled explicitly; instead, a grid-following inverter is represented as a constant-power source per phase as long as current remains below the phase-current limit, and as a current-saturated source once that limit is reached. The model reproduces current saturation at $\theta_{PLL}(t)$29, injects mainly positive-sequence current under unbalanced faults, and remains feasible across the full fault-impedance sweep considered in the 4-bus synthetic microgrid case study (Mabote et al., 2023).

Recent weak-grid work also explores replacing the PLL itself. The Kalman-filter/LQR approach estimates the grid angle through an advanced angle-estimation Kalman filter with line-drop compensation and replaces PI current regulation with LQR. In the reported comparisons, the AAEKF-LQR scheme achieves $\theta_{PLL}(t)$30 RMS phase-angle estimation error, $\theta_{PLL}(t)$31 PCC voltage THD, and an $\theta_{PLL}(t)$32 Hz oscillation damping time-constant of $\theta_{PLL}(t)$33 s; eigenvalue plots indicate robust stability up to $\theta_{PLL}(t)$34 error in $\theta_{PLL}(t)$35 (Nguyen et al., 2 Jul 2025).

6. Hybrid operation, coordination, and system-level roles

Grid-following control is no longer studied only as a fixed operating mode. Several recent formulations embed GFL behavior in a continuum of inverter modes. In the unified virtual-oscillator framework, the parameters $\theta_{PLL}(t)$36 and $\theta_{PLL}(t)$37 continuously interpolate between pure grid-following and grid-forming behavior, so that PQ-mode GFL operation sits at $\theta_{PLL}(t)$38 and can move smoothly toward hybrid or fully grid-forming modes without structural controller switching. A related multi-mode design places GFL on a two-dimensional continuum parameterized by $\theta_{PLL}(t)$39 and $\theta_{PLL}(t)$40, with seamless transitions obtained by slowly varying these parameters along a stable path rather than by discrete controller replacement (Wang et al., 2 Jul 2026, Askarian et al., 2024).

Other works retain explicit mode switching but redesign the transition law. Control-Sync maintains synchronized GFM and GFL control paths in parallel and reports instantaneous switching in less than $\theta_{PLL}(t)$41 ms without open-loop intervals. The contingency-support and transition-control framework introduces a modified droop-like GFL controller that is insensitive to slow loading changes but supports GFM units during large contingency events; for a fast $\theta_{PLL}(t)$42 kW, $\theta_{PLL}(t)$43 kVAR step, the proposed GFL reduces RoCoF from $\theta_{PLL}(t)$44 Hz/s to $\theta_{PLL}(t)$45, $\theta_{PLL}(t)$46, and $\theta_{PLL}(t)$47 Hz/s depending on $\theta_{PLL}(t)$48, and a smooth GFL$\theta_{PLL}(t)$49GFM transition reduces active-power overshoot from approximately $\theta_{PLL}(t)$50 kW to $\theta_{PLL}(t)$51 W while eliminating reactive-power overshoot (Fateh, 2024, Park et al., 2024).

At the network level, grid-following inverters are increasingly treated as active participants in coordinated control. The leader-follower consensus framework for inverter-based microgrids shows that coordinated GFL/GFM secondary control can restore frequency to $\theta_{PLL}(t)$52 Hz, achieve $\theta_{PLL}(t)$53 in less than $\theta_{PLL}(t)$54 s, and reduce $\theta_{PLL}(t)$55 to approximately $\theta_{PLL}(t)$56 pu, while remaining robust to intermittency, reduced communication, link failure, plug-and-play events, and multi-microgrid splitting (Singhal et al., 2020). A separate network-theoretic analysis proves that synthesizing GFL and GFM inverters improves disturbance rejection performance relative to homogeneous GFL-only or GFM-only networks; in the reported three-inverter case, the hybrid arrangement yields sensitivity peaks of $\theta_{PLL}(t)$57 dB in a strong-grid scenario and $\theta_{PLL}(t)$58 dB in a weak-grid scenario, lower than the worse of the two homogeneous alternatives in each case (Ma et al., 2024).

The same system-level expansion appears in distributed optimal frequency control. Under a DC-power-flow approximation, a GFL inverter is modeled through a static droop relation $\theta_{PLL}(t)$59, local power balance, and neighbor-coupled line-flow dynamics. In the IEEE 39-bus EMT validation with all synchronous machines replaced by inverters, the distributed primal-dual controller limits frequency peak to approximately $\theta_{PLL}(t)$60 Hz after a 3 MW disturbance and restores nominal frequency within approximately $\theta_{PLL}(t)$61 s while enforcing inverter power limits and line thermal constraints (Wang et al., 2024).

Taken together, these results indicate that the grid-following inverter remains fundamentally a voltage-following, current-forming device, but its research frontier has shifted from isolated PLL-current-loop design toward full-network stability regions, impedance-based diagnosis, uncertainty-aware synthesis, and coordinated or continuous transition frameworks that explicitly manage the boundary between grid-following and grid-forming operation.