Unified Virtual Oscillator Controllers (uVOC)

• uVOC is a nonlinear control architecture that employs dynamic complex-frequency feedback to unify grid-forming and grid-following operation in power converters.
• It replaces static droop gains with tunable complex transfer functions for adjustable inertia, damping, and voltage shaping, enhancing transient and steady-state performance.
• Built-in over-current limiting and fault ride-through functionalities enable PLL-free synchronization and seamless recovery from network disturbances.

Unified Virtual Oscillator Controllers (uVOC) constitute a nonlinear, oscillator-based feedback control architecture for power electronic converters, engineered to unify grid-forming (GFM) and grid-following (GFL) operation. The design extends the analytical and operational capabilities of dispatchable Virtual Oscillator Control (dVOC) via the systematic use of dynamic complex-frequency control with robust integration of over-current limiting and fault ride-through functionalities, yielding seamless transitions between different operational modes and rigorous fault-resilient synchronization—without dependence on phase-locked loops (PLLs) (Domingo-Enrich et al., 2024, Awal et al., 2020, Awal et al., 2020).

1. Principles and Control Objectives

The uVOC synthesizes two major legacy paradigms: classical droop control and virtual oscillator control (VOC/dVOC). Droop control provides distributed active power–frequency and reactive power–voltage regulation across converter arrays. VOC/dVOC enforces global synchronization and voltage stability through nonlinear state and output feedback based on tight coupling between complex power and complex frequency. The essential innovation of uVOC is the replacement of static, scalar droop gains with frequency- and voltage-shaping complex transfer functions, granting:

• Arbitrarily assignable inertial response,
• Adjustable oscillation damping,
• Concurrent small-signal guarantees for frequency synchronization and voltage stabilization,
• Seamless operation for both GFM and GFL modes, including robust bidirectional power flow and DC-bus regulation,
• Intrinsic capability for over-current limiting and fault ride-through without mode switching or PLL reliance (Domingo-Enrich et al., 2024, Awal et al., 2020, Awal et al., 2020).

2. Mathematical Formulation and Converter Model

Converters are modeled in complex-frequency coordinates. For a balanced three-phase or single-phase voltage-source converter, set the terminal voltage as $\underline{v} = v e^{j\theta}$. Define the complex angle $\underline{\vartheta} = \ln v + j \theta$ (so $\underline{v} = e^{\underline{\vartheta}}$), with complex frequency $$\underline{\varpi} = \frac{\dot{v}}{v} + j\dot{\theta} = \varepsilon + j\omega$$, where $\omega$ is the angular frequency and $\varepsilon = (1/v)\frac{dv}{dt}$ is the normalized rate-of-change-of-voltage.

The instantaneous complex power $$s = p + jq = \underline{v} \,\overline{\underline{i}}_o$$ and the normalized conjugated form $$\underline{\overline{\varsigma}} = \frac{p-jq}{v^2} = \frac{\underline{i}_o}{\underline{v}}$$ constitute the feedback variables coupling power tracking to frequency/amplitude actuation.

The classical static complex droop (dVOC) law in this formulation reads: $$\underline{\varpi} = \underline{\varpi}_0 + \eta e^{j\varphi}(\underline{\overline{\varsigma}}^* - \underline{\overline{\varsigma}}) + \eta\alpha e^{-j\varphi} \frac{v^* - v}{v^*},$$ where $\underline{\varpi}_0 = j\omega_0$, $\eta$ and $\alpha$ are scalar droop gains, and $\varphi$ aligns the feedback orientation according to the grid impedance angle.

uVOC generalizes this to a dynamic law: $$\Delta\underline{\varpi}(s) = \underline{T}(s) \left( -\Delta\underline{\overline{\varsigma}}(s) - \underline{T}^v(s) \Delta v(s) \right),$$ where $\underline{T}(s)$ and $\underline{T}^v(s)$ are frequency- and voltage-shaping complex transfer functions, respectively. Typical selections employ $\underline{T}(s) = e^{j\varphi}(M_d s + D_d)$ (first-order inertial/damping structure), and $\underline{T}^v(s) = \alpha_d e^{-j\varphi}$, ensuring tunable closed-loop dynamic profiles (Domingo-Enrich et al., 2024).

3. Architecture, Fault-Ride-Through, and Over-Current Limiting

uVOC processes normalized active and reactive power errors ($\Delta\rho$, $\Delta\sigma$) and voltage-magnitude error ($\Delta v$) through the complex gain structure to yield frequency and amplitude adjustment signals. These are integrated to update the log-magnitude and phase (thus, terminal voltages), closing the feedback loop with real-time power flow observation.

Fault-ride-through (FRT) and over-current protection are achieved natively. When output current exceeds a specified hardware limit $I_m$, a circular current limiter alters the power reference to cap current magnitude but preserves phasing. The voltage-restoration gain $\mu$ is set to zero during a fault to prevent unfeasible voltage commands, and the synchronization gain $\eta$ is momentarily boosted to expedite resynchronization. No auxiliary controllers or PLLs are invoked; upon clearance, the controller resumes standard operation (Awal et al., 2020, Awal et al., 2020).

Over-current logic and FRT design guarantee:

• Synchronization to grid voltages as low as $0.2$–$0.3$ p.u.,
• Automatic current limit enforcement,
• Seamless recovery of nominal operation post-fault—regardless of power-angle displacement at clearing,
• No need for mode switching or backup control logic during severe network disturbances (Awal et al., 2020).

4. Dynamic Response Shaping, Stability Analysis, and Design Guidelines

The use of complex transfer functions introduces arbitrarily assignable virtual inertia ($M_d$) and damping ($D_d$), decoupled from steady-state droop slopes. Frequency and amplitude dynamics can thus be shaped independently and concurrently within specified passivity and stability regions.

Small-signal stability for multi-converter networks is guaranteed if each local transfer function $e^{-j\varphi_z} \underline{T}_k(s)$ is strictly positive real (i.e., strictly passive), and voltage shaping functions $\underline{T}_k^v(s)$ are stable. This can be verified using Nyquist and Liénard–Chipart criteria on $\Re\{e^{-j\varphi_z}\underline{T}_k(j\omega)\} > 0$ and ensuring no right-half-plane pole/zero incursions (Domingo-Enrich et al., 2024).

Parameter tuning recommendations include:

• $M_d$ (inertia): controls initial $\omega(t)$ slope; typical $1$–$5$ s,
• $D_d$ (damping): sets settling speed and steady-state offset; typical $20$–$100$,
• $\alpha_d$: voltage regulation speed vs. line dynamic interaction; typical $1$–$10$,
• $\varphi \approx \arctan (X/R)$: matches grid impedance for maximal passivity,
• Participation factors $m_k(s)$: represent converter sharing and timescale constraints, ensuring $\sum_k m_k(s) = 1$ (Domingo-Enrich et al., 2024).

5. Transient Stability and Phase-Plane Behavior

uVOC’s first-order dynamic structure yields distinctive transient stability properties. Traditional controllers like droop or Virtual Synchronous Machine (VSM) admit a critical clearing angle (CCA): fault-induced loss of synchronism is irreversible if system trajectories exceed CCA during faulted conditions. For uVOC, the coupled voltage–angle dynamics, analyzed via a phase-plane $(V, \delta)$, show that even when no equilibrium exists during a severe fault, converter trajectories remain confined to a bounded limit cycle (current clamped at $I_m$). Upon fault clearance, all trajectories collapse to the pre-fault equilibrium, ensuring global transient stability for faults of any duration provided a post-fault equilibrium remains (Awal et al., 2020).

6. Comparative Case Studies and Experimental Evidence

Quantitative studies validate uVOC’s dynamic and fault-tolerant capabilities:

• On the IEEE nine-bus system, dynamic uVOC configuration ($M_d=2$ s, $D_d=50$, $\alpha_d=5$, $\varphi=\pi/4$) produced a peak frequency deviation of $\approx0.038$ Hz (vs. $0.045$ Hz for static droop), limited rate-of-change-of-voltage to $0.05$ pu/s (vs. $>0.25$ pu/s), and halved settling time to $0.15$ s at the $5\%$ band (Domingo-Enrich et al., 2024).
• In three-parallel-converter operation, analytical and numerical results demonstrated perfect synchronization and power/voltage sharing ($<1\%$ steady deviation), regardless of scenario (Domingo-Enrich et al., 2024).
• Hardware experiments with a 10 kVA converter confirmed DC-bus regulation, rapid resynchronization post-fault ($<100$ ms), successful island-to-grid transitions, and harmonic distortion $<2\%$ under weak grids, all without PLLs (Awal et al., 2020).
• Laboratory fault scenarios confirmed FRT logic and phase-plane predictions: under extreme voltage sags and saturation conditions, uVOC maintained bounded oscillations in $(V, \delta)$, always recovering nominal operation upon fault clearance (Awal et al., 2020).

7. Unified Operation and Implementation Considerations

uVOC operates natively as either a grid-forming ($\mu > 0$) or grid-following ($\mu = 0$) controller; the change requires modifying only the voltage-restoration gain and does not require switching control structures or auxiliary logic. PLL-less operation is intrinsic, circumventing synchronization challenges in weak grids. In GFL mode, bidirectional power set-points and DC-bus voltage regulation are achieved within the same framework utilized for GFM. Smooth pre-synchronization and seamless islanded-grid transitions are supported via optional virtual branches (Awal et al., 2020).

In summary, uVOC establishes a rigorously analytical, robust, and versatile architecture for converter control, merging the best features of conventional droop and oscillator-based schemes, supported by extensive analytical, numerical, and experimental validation (Domingo-Enrich et al., 2024, Awal et al., 2020, Awal et al., 2020).