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Grid-Following Control Mode

Updated 12 November 2025
  • Grid-following control mode is defined by power electronic converters using PLL synchronization to track grid voltage and frequency, ensuring accurate active and reactive power injection.
  • It employs cascaded control loops—inner current control with PI regulators and an outer power/voltage loop—to achieve rapid response and robustness under varying grid conditions.
  • Experimental results show low current tracking error and improved stability under grid impedance variations, confirming the mode's effectiveness in modern inverter-dominated power systems.

Grid-following control mode refers to the operational paradigm in which a power electronic converter—typically a voltage source converter (VSC)—injects current into the grid by tightly tracking the externally imposed grid voltage and frequency. Unlike grid-forming modes, which establish voltage and frequency references themselves, grid-following controllers rely on external synchronization (usually via a phase-locked loop, PLL) and act essentially as controlled current sources, executing user-specified active and reactive power setpoints. Grid-following control mode underpins the operation of most grid-tied inverters in contemporary high-renewable environments and features centrally in robust control, stability, and coordinated operation of modern power systems.

1. Core Principles and Architecture of Grid-Following Control

The defining feature of grid-following (GFL) operation is the strict locking of the inverter's internal control frames to the grid voltage angle and frequency. This is primarily achieved by a PLL, which extracts the phase and frequency of the grid voltage at the point of common coupling (PCC). The control hierarchy is typically organized as follows:

  • Synchronization block: A synchronous-reference-frame PLL (SRF-PLL) or equivalent mechanism measures the grid-angle (θ_PLL) and frequency (ω_PLL) by driving the q-axis voltage component at the PCC to zero. The PLL dynamics are typically second order, implementing a PI controller on the v_q signal:

θ˙PLL=ωPLL,τPLLω˙PLL=kpvqkivqdt\dot\theta_{PLL} = \omega_{PLL}, \quad \tau_{PLL}\dot\omega_{PLL} = -k_p v_q - k_i \int v_q dt

  • Inner current-control loop: In the dq-frame aligned to θ_PLL, PI regulators enforce rapid tracking of current references id,qi_{d,q}^* corresponding to setpoints for active and reactive power. The current control law cancels out cross-coupling terms and grid-voltage feedforward:

vinv,d=Vg+Rfid+Lf[ωiq+ud]v_{inv,d} = V_g + R_f i_d + L_f[\omega i_q + u_d]

  • Outer power or voltage loop: Reference currents for the inner loop are calculated from active and reactive power setpoints:

id=Pref/Vd,iq=Qref/Vd.i_d^* = P^{ref} / V_d, \qquad i_q^* = -Q^{ref} / V_d.

In advanced architectures, droop controllers or outer power/voltage loops provide frequency and voltage support through setpoint modification (Singhal et al., 2020).

A canonical block diagram for GFL control can be represented as:

1
2
3
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5
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Grid voltage (abc) → [PLL] → dq reference frame
                               ↓
                +------------------------------+
                |      Outer control (P/Q)      |
                |   (↓ setpoints)               |
                +------------------------------+
                               ↓
                  [Current PI regulators]
                               ↓
                 PWM/modulation → inverter → grid

In enhanced frameworks, the PLL and virtual-impedance blocks may be merged or replaced by more general feedback architectures, as in Enhanced Grid-Following (E-GFL) (Askarian et al., 2023) or Unified Virtual Oscillator Controllers (uVOC) (Awal et al., 2020).

2. Dynamic Modeling and Governing Equations

GFL inverters are customarily modeled in the synchronously rotating dq-reference frame, resulting in coupled differential-algebraic systems. The standard model (neglecting switching and with LCL filter reduced to L–R equivalent) reads:

Lddt[id iq]=[vinv,dvg,d vinv,qvg,q]R[id iq]Lθ˙PLL[iq id]L \frac{d}{dt} \begin{bmatrix} i_d \ i_q \end{bmatrix} = \begin{bmatrix} v_{inv,d} - v_{g,d} \ v_{inv,q} - v_{g,q} \end{bmatrix} - R \begin{bmatrix} i_d \ i_q \end{bmatrix} - L \dot\theta_{PLL} \begin{bmatrix} -i_q \ i_d \end{bmatrix}

Active and reactive power at the PCC are computed as:

P=Vdid+VqiqVgid,Q=VqidVdiqVgiqP = V_d i_d + V_q i_q \approx V_g i_d, \qquad Q = V_q i_d - V_d i_q \approx -V_g i_q

The PLL is described as a nonlinear oscillator seeking to minimize vqv_q, whose linearized small-signal model can be mapped into a second-order swing equation (Zhang, 2022):

Jeqδ¨=P0,eqDeqδ˙Pem,eqsinδJ_{eq} \ddot\delta = P_{0,eq} - D_{eq} \dot\delta - P_{em,eq} \sin\delta

where the equivalent inertia JeqJ_{eq} and damping DeqD_{eq} are explicit functions of the PLL and circuit parameters.

The uVOC framework eliminates the PLL entirely, replacing it with an oscillator with direct error feedback from current (Awal et al., 2020):

ddtv=jω0v+η(i0i)ejϕ\frac{d}{dt}\mathbf{v} = j\omega_0 \mathbf{v} + \eta (\mathbf{i}_0 - \mathbf{i}) e^{j\phi}

with power-to-current mapping given by:

i0=2NVp2[vαvβ vβvα][P0 Q0]\mathbf{i}_0 = \frac{2}{N V_p^2} \begin{bmatrix} v_\alpha & v_\beta \ v_\beta & -v_\alpha \end{bmatrix} \begin{bmatrix} P_0 \ Q_0 \end{bmatrix}

3. Control Design Strategies and Robustness Features

3.1 Classical GFL Control

Traditional GFL controllers use cascaded PI or PR regulators for the inner loop and PLL for synchronization, with tuning trade-offs between stability, bandwidth, disturbance rejection, and susceptibility to grid impedance variation (Javadi et al., 5 Nov 2025). The PI current regulator gains are selected to ensure inner-loop bandwidth much higher than PLL bandwidth, providing fast current control while avoiding interaction:

Kp,cur=ωbw,curLf,Ki,cur=ωbw,curRfK_{p,cur} = \omega_{bw,cur} L_f, \quad K_{i,cur} = \omega_{bw,cur} R_f

Typical phase margin target is >60° (Fateh, 31 Dec 2024).

3.2 Robust and Advanced Grid-Following Techniques

Robust control methods based on μ\mu-synthesis construct controllers that guarantee sensitivity, stability, and disturbance rejection under 100% grid impedance variation (Chakraborty et al., 2022):

  • Plant and uncertainty weighting are explicitly modeled in a generalized plant
  • The controller is synthesized such that the structured singular value μ\mu of the closed-loop remains <1<1 at all frequencies
  • Experimental results show current tracking error (rICTE\mathrm{rICTE}) remains 2%\approx 2\% even under large grid uncertainties

The E-GFL architecture (Askarian et al., 2023) merges the PLL, virtual impedance, and current regulation into a unified feedback law, factorizing the MIMO closed-loop into decoupled SISO loops with explicit coupling bounds. Controller design exploits separate tuning of dd- and qq- axes (e.g., integral, resonant, and lead-lag elements) and quantifies the fundamental performance trade-offs via the Bode sensitivity integral.

3.3 Converter Harmonic Impedance and Resonance

GFL control mode in complex converter structures—such as the MMC—requires linear time-periodic impedance modeling to handle multi-harmonic coupling, especially due to arm capacitance (Sun et al., 19 Aug 2024). The closed-loop impedance is expressed as a structured block Toeplitz transfer function, with explicit characterization of resonance peaks at the fundamental and 2nd harmonic, and convergence to conventional VSC impedance as submodule capacitance increases.

4. Grid Interaction, Stability Limits, and Grid Code Compliance

GFL inverters are fully dependent on external grid voltage/frequency, making their stability highly contingent on PCC voltage, grid strength (expressed via short-circuit ratio, SCR), and the details of synchronization. Instability manifests via loss of phase lock or limit cycles in the PLL, particularly under low PCC voltage or low SCR conditions (Zhang, 2022, Zeng et al., 28 Aug 2025). Fundamental findings include:

  • PLL proportional gain (KpK_p) is inversely proportional to damping; excessive values reduce stability margins.
  • PLL integral gain (KiK_i) emulates a virtual droop, but GFLs lack practical inertia.
  • GFLs can be mapped to droop-like grid-forming dynamics in the small KiK_i (zero inertia) limit, but normally do not establish grid references themselves.

During dynamic grid events, GFLs may be forced to switch modes (e.g., low/high voltage ride-through, LVRT/HVRT), with explicit control laws outlined for current and power limitation based on voltage thresholds (Zeng et al., 28 Aug 2025):

IFL=min[KRT(UWUFL)+IFL,0,IFL,max]I_{FL} = \min\left[K_{RT}(U_{W}-U_{FL})+I_{FL,0},\,I_{FL,\max}\right]

Multi-mode switching system theory is applied to model transitions among normal, LVRT, and HVRT modes, with explicit boundaries for desynchronization and stability.

5. Coordination and Secondary Control in Inverter-Dominated Grids

In microgrids and inverter-rich systems, coordination between grid-following (GFL) and grid-forming (GFM) converters enables robust power sharing and voltage/frequency regulation even in the absence of synchronous machines. A leader–follower consensus framework is used to synchronize GFM and GFL droop setpoints via sparse communication graphs (Singhal et al., 2020). The update laws in GFL for real and reactive power setpoints in consensus form are:

P˙iset=1kipjNicij(mp,iPisetmp,jPjset)\dot{P}_i^{set} = -\frac{1}{k_i^p} \sum_{j\in\mathcal{N}_i} c_{ij} (m_{p,i}P_i^{set} - m_{p,j}P_j^{set})

Simulations confirm that fully coordinated secondary control achieves superior restoration of nominal frequency, proportional power and var sharing, and circulatory var mitigation compared to primary-only or partially coordinated architectures.

6. Seamless Transitions, Unified and Data-Driven Frameworks

Grid-following control is not an isolated mode, but often resides within a continuum of operation as part of universal or multi-mode inverter controllers (Askarian et al., 11 Oct 2024, Fateh, 31 Dec 2024), enabling seamless switching between GFM, GFL, and auxiliary modes (e.g., STATCOM). In such setups, the grid-following mode is architected by placing one integrator less in the dd-axis and two less in the qq-axis of the feedback compensator, providing tracking and disturbance rejection for current commands. Transition between modes is achieved by dynamic adjustment of closed-loop parameters, subject to Lyapunov-based ramp constraints ensuring transient stability.

Data-driven modeling techniques, such as Sparse Identification of Nonlinear Dynamics (SINDy) and Deep Symbolic Regression (DSR), have been successfully deployed to identify overarching GFL converter dynamics directly from input–output data in grid-connected operation, without recourse to full first-principles derivation (Javadi et al., 5 Nov 2025). DSR yields near-perfect model recovery, but at significantly higher computational cost compared to SINDy, suggesting a hybrid approach for offline/online control model adaptation.

7. Performance Metrics and Experimental Validation

Experimental benchmarks for state-of-the-art GFL controllers include:

  • DC bus regulation: bandwidth up to 7πrad/s7\pi\,\mathrm{rad}/\mathrm{s}, phase margin 72\sim 72^\circ, response/settling time <100ms<100\,\mathrm{ms} (Awal et al., 2020).
  • Current tracking error: RMS 2%\approx 2\%, insensitive to ±100%\pm 100\% grid impedance variation (Chakraborty et al., 2022).
  • Harmonic rejection and LCL resonance damping: TDD <5%<5\%, with sensitivity peaks suppressed via robust or E-GFL architectures (Askarian et al., 2023).
  • Synchronization and stability under weak grid: SCR down to 1.9, phase tracking error <0.3<0.3^\circ (Fateh, 31 Dec 2024).
  • Support for critical contingencies: rapid transition into droop/inertia-mimicking support reduces RoCoF by 50%\sim 50\% relative to fixed GFL mode (Park et al., 22 Mar 2024).

Simulation and hardware-in-the-loop tests confirm that advanced GFL modes can robustly maintain current-injection performance and stable synchronization across a wide range of operating conditions, grid strengths, and during transitions to and from grid-forming modes.


Grid-following control mode forms the backbone of grid-tied converter operation in modern power systems. It is characterized by PLL-based synchronization (or advanced variants), multi-loop current and power regulation, and robust handling of grid impedance uncertainties and dynamic grid events. Ongoing research expands its capabilities via robust control synthesis, unified oscillator-based schemes, data-driven adaptive models, coordinated hybrid operations, and seamless mode transitions within multi-modal control architectures.

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