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Three-Terminal Electrochemical Ionic Synapses

Updated 7 July 2026
  • Three-Terminal Electrochemical Ionic Synapses are devices that use a dedicated control terminal to modulate ionic transport, decoupling write and read functions.
  • They leverage ionic state variables such as plated charge, proton coverage, or oxide-ion stoichiometry to enable both volatile and nonvolatile memory modes.
  • The platform spans wet, solid-state, and organic designs, demonstrating reliable analog control, scalable integration, and potential for biointerfaces.

Three-Terminal Electrochemical Ionic Synapses (EIoS) are electrochemical memory and signal-processing devices in which a third terminal modulates ionic transport or interfacial electrochemistry, while a separate source–drain or anode–cathode path reads the resulting electronic or electrochemical output. Across the reported literature, the internal state is an ionic variable—such as interfacial charge, proton coverage, oxide-ion stoichiometry, plated charge, or intercalated-ion concentration—that controls conductance, current, voltage, or magnetic response. This three-terminal partition decouples write and read operations, distinguishes EIoS from two-terminal resistive switches, and supports both volatile electric-double-layer operation and nonvolatile electrochemical state storage (Mouttet, 2010, Melianas et al., 2021, Langner et al., 2024).

1. Conceptual definition and formal description

The most general analytical framework in the supplied literature is the mem-transistor formalism, which extends two-terminal memristive systems to three-terminal, non-passive devices (Mouttet, 2010). In voltage-controlled form, it is written as

dwdt=f(w,Vg,Va),ig=g(w,vg,Va),id=h(w,vg,Va),\frac{dw}{dt}=f(w,V_g,V_a),\quad i_g = g(w,v_g,V_a),\quad i_d = h(w,v_g,V_a),

where ww is the internal state, VgV_g is the control-terminal bias, VaV_a is an auxiliary terminal bias, and igi_g and idi_d are the gate and drain currents. In EIoS, ww maps naturally onto an ionic or electrochemical state: plated charge in a memistor, ionic composition in an electrochemical random-access memory, proton coverage in hydrogenated graphene, oxygen stoichiometry in oxide-ion synaptic transistors, or electrolyte polarization in gated electrochemical cells.

This formulation is consequential because mem-transistors do not obey the zero-crossing restriction of passive two-terminal memristive systems. The data explicitly state that dropping zero crossing “eliminates the passivity requirement” and permits devices with gain and transconductance (Mouttet, 2010). That description aligns with several EIoS realizations in which a low-energy gate pulse modulates a larger source–drain or cell output, including gated wet-cell batteries, OECT-based synapses, MXene ECRAMs, and oxide-ion transistors (Grebel, 2016, Padinhare et al., 2024, Melianas et al., 2021, Langner et al., 2024).

The same framework also yields a small-signal transconductance,

gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},

and the local stability condition

f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,

which the paper identifies as the criterion preventing a growing exponential in the impulse response (Mouttet, 2010). In EIoS terms, these expressions formalize the frequency-dependent gain, phase lag, and stability constraints associated with finite ionic relaxation times.

Historically, the same paper places the Widrow memistor, floating-gate memory cells, and nano-ionic FETs inside this broader class (Mouttet, 2010). The Widrow memistor is especially close to later EIoS language because its conductance is linear in plating charge,

G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,

so the programming current directly encodes synaptic weight. This suggests that contemporary EIoS are best understood not as a single materials family, but as a common three-terminal electrochemical architecture with device-specific state variables and kinetics.

2. Electrochemical mechanisms and state variables

The recurring physical principle is gate control of the local electrochemical landscape. In the gated battery and intermediate-capacitor architectures, a permeable gate between anode and cathode modifies the local electrolyte potential and thereby changes ionic flux and overpotential at both electrodes (Grebel et al., 2015, Grebel, 2016). In the graphene electrochemical transistor, the gate drives proton accumulation and reversible hydrogenation/dehydrogenation of graphene carbons (Yu et al., 2023). In CoPt, MXene, and LSFO channels, gate bias drives insertion or extraction of ions into a mixed ionic–electronic conductor, altering conductance and, in CoPt, magnetic coercivity as well (Li et al., 2022, Melianas et al., 2021, Langner et al., 2024).

Three equations recur across the data. First, ionic transport is described by Nernst–Planck drift–diffusion. In the wet-cell ion-transistor formulation,

ww0

and in the graphene transistor,

ww1

(Grebel, 2016, Yu et al., 2023). Second, interfacial redox is described by Butler–Volmer kinetics, for example

ww2

or the analogous current-density form reported in multiple papers (Grebel, 2016, Yu et al., 2023, Grebel et al., 2015). Third, equilibrium electrode or reaction potentials are described by Nernst relations, used conceptually or explicitly in the battery, graphene, and oxide-ion cases (Grebel, 2016, Yu et al., 2023, Langner et al., 2024).

The literature differentiates two limiting operating regimes. One is volatile electric-double-layer gating, in which ions accumulate at interfaces but are not durably trapped; this regime underlies the short-term responses in EGOS, sub-threshold CoPt gating, and many OECT synapses (Desbief et al., 2016, Li et al., 2022, Padinhare et al., 2024). The other is nonvolatile electrochemical state change, including proton insertion into CoPt, protonation of WOww3 or IZO, oxide-ion exchange in LSFO, hydrogenation of graphene, or electropolymerization in organic electrochemical synapses (Wan et al., 2013, Li et al., 2022, Langner et al., 2024, Yu et al., 2023, Padinhare et al., 2024).

A recent theoretical development sharpens this distinction for protonic WOww4 synapses. The 2025 theory paper argues that in polycrystalline, phase-separating WOww5, a gate pulse can nucleate a high-conductivity filament whose local polarization stabilizes a reproducible interfacial reaction environment, so that ww6 even in a diffusion-limited regime (Li et al., 31 Jul 2025). The same paper contrasts that behavior with amorphous WOww7, which behaves as a solid solution and requires slower, reaction-limited operation. This suggests that ultrafast EIoS need not eliminate ion transport limitations uniformly across the bulk; instead, they can exploit controlled multiphase polarization near the active interface.

3. Device architectures and material platforms

The supplied papers span wet electrochemical cells, solid-state ECRAMs, electrolyte-gated organic devices, ferromagnetic electrochemical transistors, protonic oxide synapses, graphene hydrogenation transistors, and liquid filamentary ionotronic systems. Despite that diversity, all retain the same architectural separation between a control terminal that sets ionic state and a read path that senses the resulting conductance or cell output.

Platform Mobile species / medium Representative feature
Gated electrochemical cells (Grebel et al., 2015, Grebel, 2016) Ions in wet electrolytes Permeable mid-gate controls cell current and voltage
Protonic and hydrogenation devices (Wan et al., 2013, Yu et al., 2023, Li et al., 31 Jul 2025) Hww8 in solid or liquid electrolytes STDP, neuron/synapse mode switching, phase-separating ultrafast updates
Organic electrolyte-gated synapses (Desbief et al., 2016, Padinhare et al., 2024, Stefani et al., 2024) Ions in aqueous or nonaqueous electrolytes Low-voltage STP, electropolymerization, polaronic state control
Inorganic ECRAM and oxide-ion transistors (Melianas et al., 2021, Langner et al., 2024) Hww9 or OVgV_g0 in solid electrolytes Linear symmetric updates, multilevel states, ANN deployment
Spin and multifunctional transistors (Li et al., 2022) Ionic liquid ions in CoPt Conductance and coercivity co-modulation
Liquid reconfigurable filaments (Madurawala et al., 25 Nov 2025) Metal ions in DMSO or 1 M HCl Multi-terminal 3D filament growth and dissolution

At the architectural level, the wet-cell implementations are the most direct realization of a literal three-terminal electrochemical cell. In one case, a 10 VgV_g1m Teflon filter with Au/Pd films forms a permeable capacitor between Zn and Pt electrodes, modulating electrolyte potential inside the cell (Grebel et al., 2015). In the later ion-transistor battery, the conventional salt bridge is replaced by a TS80 polyamide membrane sputtered with a 60:40 Au–Pd thin film, with a 7 mm aperture in PMMA support plates and a reported sheet resistance of approximately VgV_g2 (Grebel, 2016).

Solid-state EIoS emphasize thin-film integration. MXene ECRAMs use TiVgV_g3CVgV_g4TVgV_g5/TAPA multilayers bridged by a solid PVA–HVgV_g6SOVgV_g7 proton gel, with a standard channel geometry VgV_g8 and VgV_g9 (Melianas et al., 2021). The oxide-ion synaptic transistor uses a planar LSFO/BICUVOX/LSFO stack on LSAT, with a 140 nm BICUVOX electrolyte, 35 nm LSFO channel, a 3 VaV_a0m channel–reservoir gap, and a VaV_a1 channel (Langner et al., 2024). CoPt synaptic transistors use a Ta(2 nm)/CoVaV_a2PtVaV_a3(9 nm) Hall bar gated through DEME-TFSI ionic liquid, enabling anomalous Hall readout alongside conductance modulation (Li et al., 2022).

Organic and hybrid platforms occupy a different design space. EGOS combines pentacene with 10 VaV_a4 1 nm Au nanoparticles and a Pt wire gate in 0.1 M NaCl, operating below VaV_a5 V to avoid water electrolysis (Desbief et al., 2016). OECS devices are all-printed OECTs with Ag/AgCl gates, carbon/silver source–drain contacts, PET substrates, and poly(ETE-PC) channels formed electrochemically in situ (Padinhare et al., 2024). The PCPDT-BT electrochemical transistor places a three-electrode electrochemical cell on top of a source–drain–gate solid-state layout so that PCPDT-BT serves simultaneously as gate and working electrode (Stefani et al., 2024).

4. Synaptic, neuronal, and logic behaviors

EIoS literature is organized not only by materials but also by the neuromorphic functions realized. The oxide-based protonic/electronic synaptic transistor gated by phosphosilicate SiOVaV_a6 is one of the most explicit demonstrations of biologically inspired plasticity. A 1.0 V, 50 ms presynaptic spike increased postsynaptic current from a resting value of approximately 7.5 nA to approximately 68 nA; paired-pulse facilitation reached approximately 137% at VaV_a7 ms; STDP under ten spike pairs produced VaV_a8, VaV_a9 ms, igi_g0, and igi_g1 ms; and 50 pulses at 8.0 V, 50 ms yielded a maximum current of approximately 164 igi_g2A and retention extrapolated to exceed 100 years (Wan et al., 2013).

EGOS operates in a different regime, where EDL gating is combined with nanoparticle charge trapping and detrapping. On Si/SiOigi_g3, it shows short-term plasticity at igi_g4 mV with spike width 1 ms, a best-fit time constant of approximately 10 ms, and igi_g5; on quartz, the same mechanism slows to igi_g6 s because of longer channel length and lower mobility (Desbief et al., 2016). The same work reports that the presence of SH-SY5Y cells does not abolish the synaptic response: one device changed from igi_g7 s and igi_g8 before seeding to igi_g9 s and idi_d0 after adhesion, while another changed from idi_d1 s and idi_d2 to idi_d3 s and idi_d4 after differentiation (Desbief et al., 2016).

Several later platforms add either multifunctionality or reconfigurability. In CoPt, single 30 s pulses of idi_d5 V produce EPSC or IPSC, paired-pulse facilitation reaches 135% at idi_d6 s with fitted idi_d7 s and idi_d8 s, high and low conductance states are 999.5 idi_d9S and 997.8 ww0S, and coercivity switches reversibly between approximately 400 Oe and approximately 342 Oe under ww1 V and ww2 V gating (Li et al., 2022). In the graphene electrochemical transistor, gate-controlled protonation allows a nonvolatile synapse mode for ww3–1.6 V and a volatile neuron mode for ww4 V; the same device shows an on/off resistance ratio of at least ww5, stable multilevel retention for at least 5 minutes at ww6 mV, and threshold spiking in which a 2.8 V, 15 ms pulse spikes whereas a 2.8 V, 10 ms pulse does not (Yu et al., 2023).

Organic electrochemical synapses further demonstrate that full neuron–synapse systems can be built within the same ionic technology. OECS devices show short-term plasticity with paired-pulse facilitation and long-term plasticity with retention greater than 1000 s, and 150 distinct nonvolatile states are reported for electropolymerization-based potentiation (Padinhare et al., 2024). PCPDT-BT transistors, by contrast, encode state in the polymer polaronic population: source–drain impedance drops from approximately ww7 in the pristine state to approximately ww8–ww9 on the relaxed doped plateau, with a threshold near 0.7 V and saturation between approximately 0.8 and 0.9 V versus Ag/AgCl (Stefani et al., 2024).

Not all EIoS demonstrations are framed as neural primitives. The gated ion-transistor battery realizes XOR and OR functions using two three-terminal electrochemical cells. With an Au–Pd gate referenced to the anode, the cell has gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},0 V, gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},1 mA, and a stopping bias near gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},2 V, enabling deterministic logic interconnects from self-powered cells (Grebel, 2016). This establishes that the same gating principle can support both synaptic analog modulation and logic-level functionality.

5. Performance metrics and computing relevance

For in-memory computing, the most emphasized figures of merit are linearity, symmetry, update noise, programming energy, speed, endurance, and integration compatibility. MXene ECRAMs are a leading example in the supplied data. With gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},3 V, 4 gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},4s write pulses, a 1 gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},5s write–read delay, and 0.1 V, 10 gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},6s read pulses, the devices exhibit 50 distinct conductance states, an essentially constant gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},7 nC per write step, and an energy per update gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},8 nJ or approximately 80 fJ gm(s)=h(w0,Vg0)vg+h(w0,Vg0)wf(w0,Vg0)vgsf(w0,Vg0)w,g_m(s) = \frac{\partial h(w_0,V_{g0})}{\partial v_g} + \frac{\partial h(w_0,V_{g0})}{\partial w}\,\frac{\frac{\partial f(w_0,V_{g0})}{\partial v_g}}{s - \frac{\partial f(w_0,V_{g0})}{\partial w}},9; write noise satisfies f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,0 for both potentiation and depression; 200 ns writes at f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,1 V yield approximately f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,2 dynamic range for (MXene/TAPA)f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,3; retention follows a bi-exponential decay with f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,4 s and f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,5 s; and the channel remains functional after annealing to 400 f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,6C (Melianas et al., 2021).

The oxide-ion synaptic transistor emphasizes deterministic analog updates under entirely solid-state operation. With f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,7 to f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,8 V and f(w0,Vg0)w0,\frac{\partial f(w_0,V_{g0})}{\partial w} \le 0,9 ms, it shows more than 100 stable conductance states, dynamic range G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,0 over extended cycling, nonlinearity factors G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,1 for 50-pulse trains in the mid-range, asymmetric ratio approximately 0.03 for 50 pulses and approximately 0.1 for 100 pulses, and endurance beyond 5000 operations with no dynamic-range degradation (Langner et al., 2024). The average writing currents are approximately 4.6(0.1) nA for potentiation and 6.2(0.1) nA for depression, and an example pulse energy at 0.7 V, 0.22 s, and 5 nA is approximately 0.77 nJ (Langner et al., 2024). When mapped into a three-layer MLP with 64–54–10 topology for MNIST, the measured device behavior yields 96% test accuracy (Langner et al., 2024).

The graphene system prioritizes switching window control and mode reconfiguration. The set and reset voltages vary linearly with gate bias according to G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,2 and G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,3, with G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,4 V and G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,5 V; G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,6 is tunable from about 0.6 V to about 2.4 V, and G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,7 from about G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,8 V to about 0.4 V (Yu et al., 2023). Narrow histograms over 100 cycles indicate low cycle-to-cycle variation, and prior work on the same platform reported up to G(w)idva=(104 mhos/C)qg,G(w) \equiv \frac{i_d}{v_a} = (10^{-4}\ \text{mhos/C})\,q_g,9 cycles and on/off ratios up to ww00 (Yu et al., 2023).

The theoretical WOww01 analysis is significant because it reframes the speed bottleneck. It identifies a polycrystalline case with ww02 s, ww03 s, and ww04 s, and argues that nanosecond-scale linear and symmetric modulation can emerge from phase separation and multiphase polarization rather than from uniformly fast bulk diffusion (Li et al., 31 Jul 2025). A plausible implication is that future EIoS optimization will increasingly target thermodynamic phase behavior and interfacial field control, not only ionic mobility.

6. Integration, biointerfaces, and open challenges

Several supplied papers frame EIoS as a route to direct biointegration. EGOS was explicitly interfaced with human neuroblastoma stem cells, and short-term plasticity remained qualitatively and quantitatively intact in their presence (Desbief et al., 2016). Organic electrochemical neurons and synapses go further: printed OECNs operating below 0.6 V were integrated with Venus flytrap, and at 10 ww05A neuron input the OECN output of approximately 100 mHz action-potential-like spikes triggered trap closure, whereas at 2 ww06A input and approximately 44 mHz closure was not induced (Padinhare et al., 2024). These results make bio-compatible ion-mediated signal transduction a concrete rather than merely aspirational use case.

At the system level, EIoS also enable unconventional connectivity. The gated battery work demonstrates self-powered ionic XOR and OR gates (Grebel, 2016). The 2025 ionotronic liquid systems show dynamically reconfigurable conductive filaments in DMSO and 1 M HCl, including three-terminal and higher-order configurations with a vertically inserted Pt needle, 260 ww07m planar electrode gaps, and open-circuit dissolution over approximately 140 s in HCl; the paper explicitly states that these systems can be configured as three-terminal EIoS by dedicating a third electrode as a gate that steers growth and dissolution between a source–drain pair (Madurawala et al., 25 Nov 2025). This suggests that EIoS need not be planar thin-film transistors; they can also be volumetric, liquid, and structurally reconfigurable.

The principal limitations are equally consistent across the literature. Speed remains strongly dependent on ionic path length and material choice: seconds-scale behavior appears in gated wet cells, CoPt, and many organic systems, whereas microsecond to nanosecond operation currently belongs to specialized protonic ECRAM platforms and theoretical WOww08 regimes (Grebel, 2016, Li et al., 2022, Melianas et al., 2021, Li et al., 31 Jul 2025). Selectivity is often absent in barrier-potential gates and liquid filaments, which may matter for biointerfaces or chemically specific computation (Grebel, 2016, Madurawala et al., 25 Nov 2025). Retention can be intentionally volatile, as in EGOS or HCl filaments, or only moderately nonvolatile, as in ambient MXene ECRAMs with ww09 s and ww10 s (Desbief et al., 2016, Melianas et al., 2021). Integration challenges include moisture sensitivity in ionic liquids, encapsulation of liquid or gel electrolytes, long-term electrode degradation, cross-talk in shared electrolytes, and the need for low-leakage readout lines (Li et al., 2022, Langner et al., 2024, Yu et al., 2023).

Taken together, the supplied literature defines EIoS as a mature device concept rather than a single experimental curiosity. The common structure is a third terminal that writes an ionic or electrochemical state and a decoupled path that reads the resulting electronic, electrochemical, or even magnetic response. The main unresolved question is not whether such devices can realize synaptic functions—they clearly can—but which combinations of electrolyte, channel thermodynamics, geometry, and interfacial kinetics will best reconcile linear analog programmability, low energy, long retention, high endurance, and scalable integration (Mouttet, 2010, Melianas et al., 2021, Langner et al., 2024, Li et al., 31 Jul 2025).

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