Surface Participation Ratio in Qubits

• Surface Participation Ratio (SPR) is a metric that quantifies the portion of electric-field energy stored in nanometer-scale, lossy surface layers at material interfaces in superconducting qubits.
• SPR is evaluated using advanced numerical simulations, including two-step finite-element and surface integral methods, to link geometric design with dielectric loss and qubit performance.
• Empirical studies demonstrate a linear relationship between SPR and qubit relaxation rates, driving design optimizations to reduce dielectric loss and improve T1 times.

The surface participation ratio (SPR) is a quantitative measure of the fraction of a superconducting qubit’s total electric-field energy that is stored in lossy, nanometer-scale surface layers at material interfaces. In transmon and related qubit architectures, such surface layers—especially at metal–substrate (MS), substrate–air (SA), and metal–air (MA) interfaces—are principal contributors to dielectric loss, and thus play a dominant role in limiting device relaxation times ($T_1$). The SPR provides the central metric for associating geometry and interface preparation with energy decay, making it a critical concept for both the characterization and optimization of superconducting quantum circuits (Wang et al., 2015, Wang et al., 30 Mar 2026).

1. Mathematical Definition of Surface Participation Ratio

For any lossy dielectric region $i$ with permittivity $\epsilon_i$ and loss tangent $\tan\delta_i$, the participation ratio $p_i$ is defined as: $$p_i = \frac{\int_{V_i} \epsilon_i |E(\mathbf{r})|^2 dV}{\int_{\mathrm{all}} \epsilon(\mathbf{r}) |E(\mathbf{r})|^2 dV}$$ For a thin surface layer of thickness $t$ along an interface, the SPR takes the form: $$p_{\mathrm{surf}} = \frac{\int_{\mathrm{surf~layer}} \epsilon |E|^2 dV}{\int_{\mathrm{all}} \epsilon |E|^2 dV}$$ The total qubit relaxation rate is then given by: $$\frac{1}{T_1} = \omega \sum_i p_i \tan\delta_i + \Gamma_0$$ where $\omega$ is the device frequency, $i$0 are the loss tangents of each participating region, and $i$1 accounts for geometry-independent loss channels (Wang et al., 2015). In numerical electrostatics, an equivalent definition is

$i$2

where $i$3 is the stored energy in region $i$4, and $i$5 is the total electric-field energy of the device (Wang et al., 30 Mar 2026).

2. Physical Origins and Importance of SPR

Lossy surface layers of nanometric thickness arise from native oxides, adsorbates, and other material imperfections at interfaces in superconducting device fabrication. These layers often possess a loss tangent $i$6 on the order of $i$7, several orders of magnitude higher than that of bulk crystalline substrates. In 3D transmons fabricated with standard Al/AlO$i$8/Al shadow-mask technology, the MS participation ratio can range from $i$9 (large pads) to $\epsilon_i$0 (small pads). Variation of qubit geometry over these regimes has established an approximately proportional relationship between $\epsilon_i$1 and SPR, validating dielectric dissipation at material surfaces as the primary $\epsilon_i$2-limiting mechanism in such circuits (Wang et al., 2015).

3. Numerical Simulation Techniques for SPR

Two-step Finite-Element Simulation

Full 3D finite-element modeling across all relevant scales (mm-size electrodes, nm-size surface layers) is computationally prohibitive. To address this, a two-step simulation procedure is used (Wang et al., 2015):

• Coarse Global 3D Simulation: The entire qubit-cavity system is simulated with zero-thickness metal films on a bulk substrate; this captures the global boundary conditions and low-energy features.
• Fine Local Simulations: Edge cross-sections (2D electrostatics) resolve singular field enhancements at electrode edges, while full 3D simulations zoom into sub-micron neighborhoods near Josephson junction leads.
• Stitching and Scaling: Results from local edge simulations are used as multiplicative corrections to the global mesh, enabling evaluation of field energy stored in the nm-scale surface layer without excessive meshing.

Boundary Integral Simulation (SesQ)

Recent advances utilize surface integral equation (SIE) methods, such as the SesQ simulator, to compute SPR directly on 2D surfaces (Wang et al., 30 Mar 2026). Key features include:

• Surface meshing with non-conformal refinement to resolve the $\epsilon_i$3 divergence of surface charge near conductor edges.
• Semi-analytical multilayer Green’s functions to capture electrostatic fields in arbitrarily stacked dielectrics.
• Accelerated capacitance and participation extraction, outperforming commercial 3D finite-element tools by 1–2 orders of magnitude in both speed and accuracy for SPR evaluation, particularly in treating edge singularities.

Outline of the SIE-Based SPR Computation Pipeline

Step	Purpose	Output
Capacitance extraction	Finds full $\epsilon_i$4 matrix via surface meshing	$\epsilon_i$5
Total energy estimate	Computes $\epsilon_i$6 via charge-potential reciprocity	$\epsilon_i$7
Surface energy sampling	Integrates energy in thin layers using Legendre–Gauss points	$\epsilon_i$8
SPR calculation	Computes $\epsilon_i$9	$\tan\delta_i$0

4. Empirical Correlation with Qubit Relaxation Time

Experimental sweeps of planar transmon geometry (varied pad width, shape, or lead geometry) have shown that $\tan\delta_i$1 increases linearly with SPR. For devices with suppressed quasiparticle and radiative losses, the observed relationship is: $\tan\delta_i$2 with an effective combined surface loss tangent determined by weighted contributions of MS, SA, and MA interfaces: $\tan\delta_i$3 A negligible geometry-independent offset $\tan\delta_i$4 is observed, consistent with non-surface loss channels (Wang et al., 2015). If participation within 1 μm of the junction leads is included, the modeled intercept becomes negative, which is unphysical—this motivates the exclusion of these nano-volumes from SPR analysis.

5. Spatial Discreteness and Physical Limits of Surface Loss

Local simulations highlight that, especially in small-footprint qubits, SPR in nm$\tan\delta_i$5-scale regions near junction leads can dominate the calculated $\tan\delta_i$6—however, such small volumes statistically contain $\tan\delta_i$7 resonant two-level-system (TLS) defect at typical areal densities. The spatial discreteness of microscopic loss is thus reflected in empirical $\tan\delta_i$8 measurements, necessitating a participation cutoff: energy in regions within $\tan\delta_i$9m of the junction is excluded from the SPR sums used to correlate with loss (Wang et al., 2015). This approach restores a physically meaningful linear fit and demonstrates that loss is not uniformly distributed at the nm scale.

6. Design Implications, Optimization, and Future Directions

The strong, linear dependence of $p_i$0 on SPR implies that increasing electrode size, modifying pad shape, and optimizing lead routing can reduce participation. Simulation pipelines incorporating tools such as SesQ enable rapid, automated geometric optimization by:

• Parameterizing design variables (interdigitated gap, pad aspect ratio, etc.)
• Performing surface mesh refinement, especially near edges
• Iteratively extracting $p_i$1 and $p_i$2 to target performance metrics (e.g., charging energy, minimal $p_i$3)
• Enabling geometry updates via optimization or grid search, with guideline settings for mesh refinement and integration order

For example, in a rectangular dumbbell transmon, SesQ optimization finds minimal $p_i$4 at a specific pad aspect ratio. Devices with etch-defined pads (e.g., MBE Al or TiN) achieve lower surface loss tangents, but in practice, long shadow-mask junction leads continue to limit $p_i$5 unless their participation is also minimized. Looking forward, further improvements in both surface chemistry (lowering $p_i$6) and advanced 3D or suspended wiring (reducing $p_i$7) are projected to enable qubit quality factors $p_i$8 (Wang et al., 2015, Wang et al., 30 Mar 2026).