Rotated Surface Code

• Rotated Surface Code is a planar CSS stabilizer code that encodes one logical qubit on a d×d lattice with alternating X and Z stabilizers, offering reduced qubit overhead.
• It features dual representations—a checkerboard layout and a 45° rotated diamond patch—that optimize boundary check weights and streamline syndrome extraction.
• The code achieves resource efficiency by lowering physical qubit counts relative to unrotated codes, improving logical error rates and practical fault-tolerance under circuit-level noise.

The rotated surface code (RSC) is a planar CSS stabilizer code that realizes one logical qubit on a square patch with reduced qubit overhead relative to the standard unrotated planar surface code at the same code distance. Across the literature, it is described either as a checkerboard of data qubits on a $d\times d$ vertex lattice with alternating $X$- and $Z$-type plaquettes, or as a 45-degree-rotated restriction of the edge-qubit planar code; these descriptions are equivalent at the level of encoded topology but differ in local bookkeeping of boundary checks and ancillas. In the most commonly used resource count for a distance-$d$ patch, the code parameters are $[[d^2,1,d]]$, with weight-4 bulk stabilizers and reduced-weight boundary stabilizers, and with logical $X$ and $Z$ implemented by minimal boundary-to-boundary strings of Pauli operators (Chen et al., 2024, Haruna et al., 24 May 2025, Forlivesi et al., 2023).

1. Definitions, lattice conventions, and code parameters

In the checkerboard formulation, the RSC is a planar patch of $d^2$ data qubits arranged on a $d\times d$ lattice, with $X$-type and $X$0-type stabilizers placed on alternating plaquettes. A standard presentation writes

$X$1

with weight-4 bulk checks and reduced-weight boundary checks. The logical operators are minimal strings spanning opposite like-type boundaries; equivalently, the code distance is the minimum length of any nontrivial boundary-to-boundary logical chain (Chen et al., 2024, Haruna et al., 24 May 2025, Chongder, 7 Jul 2026).

A second common presentation starts from the planar edge-qubit surface code and restricts to a central diamond, producing the “rotated” patch. In that language, site checks $X$2 and plaquette checks $X$3 remain local, while the boundary structure changes relative to the unrotated planar code. This representation is useful for comparing encoders and for discussing biased-noise behavior, because it makes explicit how the rotated geometry alters boundary terms and logical-path geometry (Higgott et al., 2020, Tuckett et al., 2018).

The basic parameters used repeatedly across the literature are consistent: a symmetric rotated patch encodes one logical qubit with $X$4 data qubits and distance $X$5. When ancillas are counted explicitly with one measurement ancilla per stabilizer, the commonly used total physical-qubit count is $X$6 (O'Rourke et al., 2024, Katsuda et al., 2022). The lower-layer choice $X$7 in concatenated constructions therefore gives $X$8 for the data block itself (Haruna et al., 24 May 2025).

Different papers adopt different boundary conventions. Some vertex-based checkerboard treatments describe weight-2 boundary checks, while some edge-qubit or alternative rotated depictions describe weight-3 boundary checks or additional boundary stabilizers. This suggests that boundary weight statements should be interpreted relative to the specific lattice representation and measurement convention, not as a contradiction in the encoded code family (Higgott et al., 2020, O'Rourke et al., 2024, Tsai et al., 4 Jun 2025).

2. Resource efficiency relative to unrotated surface codes

A central motivation for the RSC is lower qubit overhead at fixed distance. For the rotated patch, the exact formulas reported for total qubits are

$X$9

while for the unrotated planar code

$Z$0

These formulas count one measurement ancilla per stabilizer and assume no ancilla reuse (O'Rourke et al., 2024).

Code	Data qubits	Total qubits
Rotated surface code	$Z$1	$Z$2
Unrotated surface code	$Z$3	$Z$4

At equal logical error rate under circuit-level noise, the resource advantage is smaller than the naive factor-of-two comparison at fixed distance, but it remains substantial. For $Z$5 and target $Z$6 per $Z$7 rounds, the rotated code was reported to use $Z$8 of the qubits used by the unrotated code under standard depolarizing noise, and $Z$9 under superconducting-inspired noise; rounded to integer distances, the example given is $d$0 for RSC versus $d$1 for the unrotated code, corresponding to $d$2 (O'Rourke et al., 2024). The same work states that the $d$3 ratio persists for physical error rates within a factor of two of $d$4 across practically relevant logical error rates (O'Rourke et al., 2024).

The rotated layout is therefore not merely a constant-distance reformulation. It changes the qubit-vs-reliability tradeoff in a quantitatively favorable way under realistic circuit-level noise, while retaining the planar, local structure needed for standard syndrome extraction and lattice surgery (O'Rourke et al., 2024).

3. Syndrome extraction, schedules, and hook-error control

Syndrome extraction in the RSC is typically ancilla mediated. A representative schedule resets ancillas, performs four ordered layers of CNOTs between ancillas and neighboring data qubits, and then measures ancillas to obtain $d$5- and $d$6-type syndromes (Chen et al., 2024). Stim’s rotated-surface-code circuit generator is likewise described as compiling one full round of all $d$7 and $d$8 checks per code cycle, with four entangling steps for bulk weight-4 checks and two for boundary checks (Chongder, 7 Jul 2026).

A recurring circuit-level issue is the control of hook errors, namely ancilla-originated correlated two-qubit data faults produced mid-syndrome-extraction. Traditional rotated-code scheduling uses geometry-dependent N-shaped and Z-shaped CNOT orderings so that hooks are oriented away from logical operators (O'Rourke et al., 2024, Kishony et al., 9 Feb 2026). The diagonal schedule replaces this with a globally uniform rule: all $d$9-plaquettes use one diagonal ordering and all $[[d^2,1,d]]$0-plaquettes another, causing hooks to lie along plaquette diagonals instead of horizontal or vertical logical directions. The reported consequence is preservation of full circuit-level distance together with a minimal period of 6 time steps on hardware that supports parallel measurement, reset, and gate operations, compared to 7 for traditional mixed-orientation schedules (Kishony et al., 9 Feb 2026).

This scheduling simplification matters beyond memory experiments. The same diagonal-scheduling paper reports applicability to spatial junctions, spatial Hadamard gates, and patch rotation, with equivalent or improved logical error rates and simplified circuit construction (Kishony et al., 9 Feb 2026). In modular settings, optimized interface geometry plays a comparable role: for rotated patches coupled across noisy links, a zigzag boundary is used to avoid 2–2 splits of weight-4 checks, thereby mitigating boundary hook errors and preserving full $[[d^2,1,d]]$1- and $[[d^2,1,d]]$2-distance under direct links, gate teleportation, and CAT-state gadgets (Shalby et al., 6 Mar 2025).

4. Logical operators, Clifford operations, and encoding circuits

At the logical level, the RSC supports the standard surface-code operator structure: $[[d^2,1,d]]$3 connects rough or $[[d^2,1,d]]$4-type boundaries, $[[d^2,1,d]]$5 connects smooth or $[[d^2,1,d]]$6-type boundaries depending on convention, and minimal logical weight is $[[d^2,1,d]]$7 (Chen et al., 2024, Katsuda et al., 2022). Several recent works focus on implementing logical Clifford operations while preserving the rotated patch’s lower qubit overhead.

One direction uses reconfigurable neutral-atom arrays to realize a transversal Clifford set on rotated patches. A logical $[[d^2,1,d]]$8 is implemented by transversal Hadamards on all data qubits followed by an effective $[[d^2,1,d]]$9 patch rotation realized as two reflections, using horizontally aligned and diagonally aligned 2D-AODs. A logical $X$0 is implemented as a fold-transversal operation embedded inside a single syndrome-extraction round, exploiting a half-cycle state in which the joint data-plus-ancilla system is equivalent to an unrotated surface code plus a few unentangled boundary qubits. Together with transversal logical CNOT between patches, this yields a transversal logical Clifford set $X$1 on the RSC in that hardware model (Chen et al., 2024).

A distinct experimental route uses code deformation and lattice surgery on distance-three rotated patches. Merge and split, patch expansion and shrinkage, and domain-wall/twist-defect deformations have been composed into logical routing, logical CNOT, and single-qubit $X$2 and $X$3 gates on a 107-qubit superconducting processor, all with multi-round syndrome extraction and neural-network decoding and without post-selection (Lin et al., 1 Jul 2026). In that deformation picture, corners of the rotated patch function as twist defects, and boundary-frame permutations implement the geometric action of Clifford gates (Lin et al., 1 Jul 2026).

Encoding has also become a topic in its own right. Earlier local unitary encoders for the rotated code used a 4-layer inductive growth step $X$4, giving total depth $X$5 under nearest-neighbor locality (Higgott et al., 2020). More recent work reduces this to depth $X$6 for a distance-$X$7 rotated code by using depth-2 inductive growth circuits $X$8 with only nearest-neighbor CNOTs, and proves $X$9 optimality within the inductive construction paradigm (Claes, 11 Sep 2025). A separate non-local unitary encoder uses a code conversion $Z$0 in four parallel CNOT layers, achieving logarithmic-in-$Z$1 growth depth for repeated distance doubling and enabling preparation of logical $Z$2-eigenstates and other Clifford eigenstates (Tsai et al., 4 Jun 2025).

5. Decoding, noise models, and logical-error behavior

The RSC has been analyzed under code-capacity, phenomenological, and circuit-level noise, with decoders ranging from MWPM to belief-propagation hybrids and neural decoders. Under code-capacity depolarizing noise, concatenating random $Z$3-HGP codes with lower-layer rotated patches of $Z$4 yields an average pseudo-threshold $Z$5, compared with the rotated-surface-code pseudo-threshold $Z$6 used in that work; the hierarchical scheme is reported to outperform plain RSC in both qubit efficiency and logical error rate for $Z$7, $Z$8, and physical error rates around or less than $Z$9 (Haruna et al., 24 May 2025).

Under circuit-level memory noise, the low-$d^2$0 scaling of the rotated code has been fitted as

$d^2$1

with different fit parameters for standard depolarizing and superconducting-inspired models. The rotated code uses fewer qubits than the unrotated code at equal $d^2$2, but the unrotated code can have lower $d^2$3 at the same $d^2$4, which is why equal-error-rate rather than equal-distance comparison is operationally relevant (O'Rourke et al., 2024).

Several decoder developments are specifically RSC-oriented. Progressive-Proximity Bit-Flipping achieves a threshold of about $d^2$5 on the rotated planar code over the binary symmetric channel with perfect measurements, with $d^2$6 complexity and no dynamic memory allocation (Pacenti et al., 2024). A distributed neural-network decoder under depolarizing code-capacity noise with perfect measurements partitions the syndrome into overlapping $d^2$7 tiles and was reported to match Blossom and monolithic neural decoders at $d^2$8 while addressing training-space explosion (Varsamopoulos et al., 2019). More recently, an adaptive confidence-gated decoder combines a neural fast path with MWPM refinement; at $d^2$9, routing only $d\times d$0 to $d\times d$1 of syndromes to MWPM improves end-to-end logical accuracy from $d\times d$2 to $d\times d$3 depending on confidence threshold, with neural throughput saturating near $d\times d$4 shots/s at batch size 512 on CPU (Chongder, 7 Jul 2026).

Realistic-noise simulation has also been carried out for a distance-5 rotated code under local stochastic noise plus coherent over-rotations. In that setting, the low-$d\times d$5 logical error rate was fitted as $d\times d$6 with $d\times d$7, $d\times d$8, and $d\times d$9, after reducing the explicit simulation from 49 physical qubits to 26 by delaying syndrome measurements and reusing ancillas in the simulation (Katsuda et al., 2022).

6. Variants, architectural roles, and current research directions

The RSC functions both as a standalone code and as a building block inside broader fault-tolerant architectures. In hierarchical quantum error correction, it appears as a nearest-neighbor-compatible lower layer under qLDPC upper layers, with lattice surgery mediating inter-block operations on planar hardware (Haruna et al., 24 May 2025). In the Hierarchical Logical Processor, standard rotated patches act as level-0 cores while elongated rotated patches act as shuttle buses; at $X$0, an HLP based on the $X$1 code is reported to achieve 3–4 times higher qubit efficiency than standard RSC and to reduce space overhead relative to the yoked surface code by 100–200 physical qubits per logical qubit while shortening the logical error-correction cycle time by a factor of 20–30 (Chen et al., 21 Jun 2026).

The RSC is also a baseline against which denser planar codes are compared. A recent hex-grid twist-defect architecture uses rotated patches as the compute and hot-storage baseline, while claiming up to $X$2 the encoding rate of a rotated patch for dense cold storage and retaining rotated patches for low-latency surgery and factories (Low et al., 28 May 2026). In magic-state distillation analyses, rotated patches with rectilinear twist defects are arranged into compact rectangular factories, including a $X$3-by-$X$4 $X$5 factory requiring up to $X$6 error-correction cycles and a $X$7-by-$X$8 $X$9 factory requiring up to $X$00 cycles (Moussa, 5 Mar 2026).

Under biased noise, the rotated geometry has further distinctive behavior. For highly biased dephasing-equivalent noise, closely related rotated layouts can achieve a $X$01 threshold in the infinite-bias limit with polynomial-time decoding, and the sub-threshold logical-failure rate depends strongly on geometry and boundary conditions (Tuckett et al., 2018). Analytic small-$X$02 studies of rotated and XZZX variants also show that combining rotation with XZZX on rectangular lattices can collapse asymmetric distances to $X$03, making the combined modification suboptimal in that setting (Forlivesi et al., 2023).

A plausible implication is that the RSC has become less a single fixed code than a reference geometry around which scheduling, decoding, code deformation, modular interfaces, and concatenated architectures are now co-designed. The common thread across these developments is that the rotated patch retains the local syndrome-extraction structure and low data-qubit overhead of the surface-code family while admitting unusually rich boundary engineering and hardware-aware transformations (Chen et al., 2024, Kishony et al., 9 Feb 2026, Lin et al., 1 Jul 2026).