Provable Circuit Discovery & Formal Guarantees

• Provable circuit discovery is the study of algorithms that extract circuit subgraphs from complex systems with certified properties like robustness, minimality, and completeness.
• It spans quantum and superconducting hardware design as well as neural network mechanistic interpretability, employing methods such as differentiable masking and iterative greedy search.
• Recent work leverages verifier-backed search and complexity-theoretic analysis to balance heuristic success with rigorous certification of circuit behaviors.

Provable circuit discovery is the study of algorithms that identify circuits together with formal guarantees about what has been found. In current literature, the term spans at least two settings. In quantum and superconducting hardware design, it refers to automated discovery of circuit structures and parameters satisfying specified physical objectives. In mechanistic interpretability, it refers to discovering subnetworks or computational subgraphs inside neural networks that preserve a target behavior under explicit interventions. Across both settings, the central distinction is between heuristic search that returns plausible or empirically strong circuits and methods that certify properties such as completeness, optimality, identifiability, input-domain robustness, robust patching, minimality, or tractable approximations of these notions (Potoček et al., 2018, Menke et al., 2019, Conmy et al., 2023, Hadad et al., 18 Feb 2026).

1. Scope and formal object of discovery

A recurring formalization treats a model as a graph $G=(V,E)$ and a circuit as a subgraph $C \subseteq G$. In mechanistic interpretability, the graph may be defined over attention heads, MLPs, query/key/value components, neurons, or token-position-specific units; in more formal work on MLPs, circuits are subsets of neurons and their induced connections (Conmy et al., 2023, Adolfi et al., 2024). In differentiable masking approaches, the discovered object can be even more explicit: a binary-masked computation graph over both weights and edges, together with its complement, so that one can evaluate the candidate explanation and the residual remainder separately (Yu et al., 2024).

The same broad pattern appears outside neural networks. In automated quantum circuit discovery, candidate circuits are variable-length gate sequences with discrete structural choices and continuous parameters, specified only by the number of qubits, permitted gate types, and fitness objectives (Potoček et al., 2018). In superconducting-circuit inverse design, a candidate circuit is a parameter vector $\mathbf{x}$ listing component values between node pairs, with topology encoded by zero or nonzero entries, and evaluated through Hamiltonian simulation against a scalar merit function (Menke et al., 2019). This suggests that “circuit discovery” is best understood not as one algorithmic paradigm, but as a family of search-and-verification problems over structured computational objects.

For provability, the crucial issue is not merely whether a method returns a sparse or interpretable subgraph, but what semantic claim that subgraph supports. A circuit may be intended to be sufficient for a behavior, necessary across all sufficient circuits, robust to patching perturbations, or minimal under some faithfulness predicate. The literature increasingly separates these targets rather than treating “the circuit” as a single unambiguous object (Adolfi et al., 2024, Hadad et al., 18 Feb 2026).

2. Heuristic foundations and empirical baselines

Most automated circuit-discovery methods remain heuristic, even when mathematically explicit. A canonical example is ACDC, which represents a model as a DAG over abstract units and greedily prunes edges using activation patching while preserving a behavioral criterion. It recovered 5/5 of the component types in a GPT-2 Small Greater-Than circuit and selected 68 of the 32,000 edges, all of which were manually found by previous work, but it does not prove soundness, completeness, minimality, or order-invariant recovery (Conmy et al., 2023). The same paper explicitly notes sensitivity to corruption distribution, metric choice, abstraction level, and pruning order, and highlights failure modes such as missing negative components and failing on OR-gate-like structures (Conmy et al., 2023).

Later work often strengthens formalization without reaching theorem-level recovery guarantees. “Functional Faithfulness in the Wild: Circuit Discovery with Differentiable Computation Graph Pruning” defines circuits and complements through masks over weights and edges and optimizes functional faithfulness, completeness, and sparsity jointly, but it still provides no guarantees of identifiability, global optimality, or exact recovery (Yu et al., 2024). “Unveiling Language Skills via Path-Level Circuit Discovery” introduces a lossless additive decomposition with compensation terms and path-level scoring, yet explicitly does not prove correctness, identifiability, or minimality of the recovered skill paths (Chen et al., 2024). “Position-aware Automatic Circuit Discovery” makes circuits token-position-specific and introduces dataset schemas for variable-length examples, but it remains approximation-based and gives no theorem linking extracted circuits to causal-abstraction semantics (Haklay et al., 7 Feb 2025).

The same heuristic character appears in adjacent domains. “Multi-objective evolutionary algorithms for quantum circuit discovery” searches directly over gate sequences and continuous angles from behavioral specifications, often recovering textbook QFT and Grover circuits or lower-cost approximations, but it provides no completeness, convergence, or optimality guarantees (Potoček et al., 2018). “Automated discovery of superconducting circuits and its application to 4-local coupler design” defines an unusually explicit inverse-design loop over circuit topologies and parameters and validates discovered designs by Hamiltonian analysis, yet it remains a hybrid heuristic search without completeness or global-optimality proofs (Menke et al., 2019).

The empirical success of these methods is therefore not trivial, but their outputs should be interpreted as search results under particular objectives and interventions rather than as formally certified mechanisms. This distinction is foundational for the later theory-oriented literature.

3. Guarantee families in formal mechanistic interpretability

The clearest direct treatment of provable circuit discovery appears in “Formal Mechanistic Interpretability: Automated Circuit Discovery with Provable Guarantees” (Hadad et al., 18 Feb 2026). That work defines a model $f_G : \mathbb{R}^n \to \mathbb{R}^d$ with computation graph $G=(V,E)$, a circuit $C \subseteq G$, and a faithfulness predicate $\Phi(C,G)$ that can itself encode certification goals. The paper focuses on three guarantee families: input-domain robustness, robust patching, and minimality (Hadad et al., 18 Feb 2026).

Input-domain robustness requires the circuit to agree with the full model over an entire continuous region rather than a finite sample. For a union of balls $Z = \bigcup_{j=1}^k B_p^\varepsilon(x_j)$, fixed patching vector $a$, and tolerance $\delta$, a circuit is certified if

$C \subseteq G$0

Robust patching strengthens ordinary patching tests by quantifying over all reachable patching activations from a continuous domain. For reference inputs $C \subseteq G$1, the guarantee requires

$C \subseteq G$2

Both properties are reduced to neural-network verification through siamese encodings that compare the full model and the patched circuit inside a single verification query (Hadad et al., 18 Feb 2026).

Minimality is treated as a family rather than a single criterion. The paper distinguishes quasi-minimality, local minimality, subset-minimality, and cardinal minimality. Quasi-minimality requires only one indispensable element; local minimality requires every single remaining element to be indispensable; subset-minimality requires that no strict subgraph remain faithful; cardinal minimality requires globally smallest size among all faithful circuits (Hadad et al., 18 Feb 2026).

The algorithmic side is organized around verifier-backed search. Greedy iterative removal yields quasi-minimal circuits in general and subset-minimal circuits under a monotonicity condition on $C \subseteq G$3. Repeated greedy passes yield locally minimal circuits. A binary-search-style procedure finds quasi-minimal circuits with $C \subseteq G$4 predicate evaluations. For cardinal minimality, the paper introduces a blocking-set duality and solves a minimum hitting-set problem over discovered blocking sets, using RC2 together with a verifier; for sufficiently large blocking-set search depth, this converges to a cardinally minimal circuit (Hadad et al., 18 Feb 2026).

A central theoretical link is that monotonicity of the faithfulness predicate can itself arise from robustness assumptions. If $C \subseteq G$5 encodes both input robustness and patching robustness, $C \subseteq G$6, and the reachable activation space $C \subseteq G$7 is closed under concatenation, then $C \subseteq G$8 is monotonic. Under that condition, the simplest greedy algorithm already converges to a subset-minimal circuit (Hadad et al., 18 Feb 2026). This is the paper’s most direct bridge between certified robustness and certified minimality.

Experiments with state-of-the-art verifiers on vision models are used to show that the resulting circuits enjoy substantially stronger robustness guarantees than standard circuit-discovery methods (Hadad et al., 18 Feb 2026). The article’s significance lies less in a universal recovery theorem than in establishing a verification-based template for what “provable” can mean operationally in mechanistic interpretability.

4. Complexity-theoretic limits of circuit discovery

A complementary line of work shows that provable circuit discovery is constrained not only by current tooling but by worst-case complexity. “The Computational Complexity of Circuit Discovery for Inner Interpretability” develops what is, in effect, a complexity-theoretic foundation for mechanistic circuit queries on ReLU MLPs with thresholded binary outputs (Adolfi et al., 2024). Its contribution is to formalize a range of queries—sufficient circuits, necessary circuits, ablation, clamping, patching, robustness, gnostic neurons, and quasi-minimal variants—and classify their classical, parameterized, counting, and approximation complexity (Adolfi et al., 2024).

The paper’s central separation is between local and global faithfulness. Local sufficient-circuit variants are NP-complete, whereas the global sufficient-circuit problem is $C \subseteq G$9-complete (Adolfi et al., 2024). The rise from local to global comes from quantifier alternation: a local query asks whether there exists a circuit faithful on a fixed input, while a global query asks whether there exists a circuit faithful on all inputs. This formally explains why sampled agreement does not scale automatically to domain-level guarantees.

A concise view of the main landscape is as follows.

Query family	Representative complexity	Representative positive result
Local sufficient circuit	NP-complete	Quasi-minimal local sufficient circuit in PTIME
Global sufficient circuit	$\mathbf{x}$0-complete	None at full strength
Local ablation / clamping / patching	NP-complete	Quasi-minimal local patching in PTIME
Local robustness	coNP-complete	FPT when parameterized by $\mathbf{x}$1
Gnostic neurons	—	PTIME

Many of these problems remain fixed-parameter intractable relative to natural structural parameters such as depth, requested circuit size, weights, biases, or input/output counts; sufficient circuits and necessary circuits are W[1]-hard under natural parameter sets, while circuit patching is W[2]-hard (Adolfi et al., 2024). Counting versions are $\mathbf{x}$2-complete or $\mathbf{x}$3-hard, and many optimization forms are inapproximable under additive, multiplicative, and probabilistic approximation schemes (Adolfi et al., 2024). The negative result is therefore stronger than “hard in practice”: it blocks broad families of approximation strategies as well.

Yet the same paper identifies tractable relaxations that retain useful affordances. Gnostic-neuron queries are in PTIME. Unbounded quasi-minimal local sufficient circuits and quasi-minimal local circuit patching are also in PTIME, because they only require a witness “breaking point” component rather than full minimality (Adolfi et al., 2024). Robustness becomes fixed-parameter tractable when the perturbed region $\mathbf{x}$4 is small. The practical implication is that provable mechanistic explanation is not uniformly hopeless, but the tractable region lies in carefully relaxed query classes rather than in exact minimal or globally faithful discovery.

5. Partial formal advances short of full provability

Between heuristic search and verifier-backed certification lies a substantial body of work that improves formal structure without proving full circuit recovery. One prominent example is “Demystifying Variance in Circuit Discovery of LLMs,” which introduces CEAP, a conductance-based replacement for EAP-IG. Its central theorem states that conductance satisfies additive order preservation whereas integrated gradients does not (Wu et al., 15 Jun 2026). This is a genuine formal guarantee about the scoring rule: in additive settings, conductance ranks branches according to their true contribution changes. Empirically, CEAP reduces resampling variance while keeping unfaithfulness comparable to EAP-IG. However, the paper does not prove exact recovery of true circuits, bounded unfaithfulness after greedy pruning, or robustness across paraphrases, and in fact argues that rephrasing variance may make a single comprehensive task circuit unattainable (Wu et al., 15 Jun 2026).

IBCircuit advances a different formal direction by casting circuit discovery as an Information Bottleneck problem. It defines

$\mathbf{x}$5

and derives tractable variational surrogates: output KL divergence for faithfulness and KL-to-prior regularization for compression (Bian et al., 26 Feb 2026). This yields a principled end-to-end objective over continuous gates on nodes or edges and empirically improves edge-level discovery on IOI and Greater-Than. Yet the paper does not prove that optimizing the relaxed objective recovers the true minimal causal circuit, that the relaxation is tight, or that thresholding the learned gates preserves optimality (Bian et al., 26 Feb 2026).

Systems work also contributes limited formal value. PAHQ accelerates ACDC by computing the currently investigated attention head in FP32 while using lower precision elsewhere, thereby preserving intervention-based semantics much better than linearized surrogates in practice. Its strongest evidence is empirical similarity to full ACDC across standard tasks, but it explicitly provides no theorem bounding circuit-discovery error under mixed precision (Wang et al., 27 Oct 2025). This is useful for scalable experimentation, but it is not itself a provable-discovery method.

The common pattern is that partial guarantees usually concern one layer of the pipeline—scoring rules, variational objectives, or numerically faithful intervention execution—rather than end-to-end correctness of the discovered circuit. These results matter because they formalize parts of the search process, but they stop short of certifying the final mechanism.

6. Scope conditions, misconceptions, and open directions

A major theme in recent work is that the target of discovery is often more ambiguous than “the circuit for task $\mathbf{x}$6.” “Data-driven Circuit Discovery for Interpretability of LLMs” shows that small, semantics-preserving dataset changes can yield circuits with low edge overlap and low cross-dataset faithfulness, and that even a mixed dataset of two distinct tasks can produce a single high-faithfulness circuit that is in fact a merger of distinct mechanisms (Rai et al., 9 May 2026). The paper therefore argues that current methods often discover dataset-specific circuits rather than general task circuits, and proposes clustering examples by computational similarity before discovering one circuit per cluster (Rai et al., 9 May 2026). This directly weakens identifiability claims for any theorem that aims to recover a unique task-level circuit without latent-mixture assumptions.

Variance and scope problems appear elsewhere as well. CEAP’s rephrasing analysis suggests that different prompt templates activate different circuits, challenging the existence of a single template-invariant task circuit (Wu et al., 15 Jun 2026). CircuitProbe localizes contiguous layer blocks whose duplication improves reasoning, but it explicitly studies a coarse operational object—a layer interval under a specific intervention—not a provably identified causal subgraph (Panuganti, 1 Apr 2026). MechRL discovers single-head bottlenecks under zero-ablation, which is valuable for identifying causally non-redundant heads, but it does not recover full circuits, edges, or sufficient subgraphs and provides no theorem-level guarantees (Khadka, 25 May 2026).

These results suggest that provable circuit discovery is as much about specifying the target object as about designing the solver. A theorem about sufficient circuits over a continuous input domain, a theorem about robust patching under all reachable activations, and a theorem about a mechanism-specific circuit within a latent cluster address different explanatory scopes. Conflating them produces misleading claims.

Two further directions are repeatedly implied by the literature. First, stronger provability often requires explicit restrictions on search space and specification. The quantum-circuit literature makes this especially clear: direct evolutionary discovery works over mixed discrete-continuous, open-ended spaces, and the authors explicitly note that proof-oriented generalization would require detecting a rule connecting fixed-size solutions and then proving the extrapolation to arbitrary numbers of qubits (Potoček et al., 2018). Second, certified discovery benefits from verification-compatible representations. The most direct progress so far uses user-chosen graph granularities, verifier-call reductions, monotonic faithfulness predicates, and blocking-set duality (Hadad et al., 18 Feb 2026).

Provable circuit discovery is therefore best understood as a layered research program rather than a solved problem. One layer asks what circuit queries are computationally possible at all. Another asks how to certify robustness and minimality for concrete candidate circuits. A third asks how to define the explanatory scope—local, global, intervention-specific, or cluster-conditional—so that the recovered object is identifiable. Current work has established all three layers as distinct and nontrivial.