Memory-Locked Synthesis

• Memory-locked synthesis is a framework where explicit memory structures (e.g., ownership predicates, temporal taps, or physical states) constrain the generation process.
• It underpins diverse applications—from software verification and synchronized code synthesis to grounded question answering and dynamical pulse formation in lasers.
• Key insights include validation via executable checkers, optimality trade-offs, and the challenge of balancing fluency with precise, context-dependent correctness.

Memory-locked synthesis is used here as an Editor’s term for synthesis procedures in which the generated artifact is constrained by an explicit memory representation, a memory-access pipeline, a finite-memory restriction, or a physical memory state. In the surveyed literature, the term spans several technically distinct settings: CN contracts that encode ownership and permissions for C code, retrieval-augmented answer generation over semantic and episodic memory, feed-forward speech synthesis with explicit sequential memory blocks, fence and lock synthesis for concurrent programs, finite-memory controller synthesis in multidimensional graph games, seeded pulse formation in a Mamyshev oscillator, and a theoretical synthesis in which synapses and intracellular molecules play different memory roles (Byrnes et al., 20 Jun 2026, Du et al., 2024, Bi et al., 2018, Singh et al., 2022, Varanasi et al., 2023, Velner, 2012, Cao et al., 2023, Gershman, 2022).

1. Domain scope and technical meanings

The surveyed work does not present a single shared formalism for memory-locked synthesis. Instead, it presents several concrete meanings of “memory” and several corresponding meanings of “synthesis.” In software verification, memory is ownership, allocation, deallocation, and aliasing structure, and synthesis produces executable specifications or synchronization code. In question answering, memory is an external bundle of retrieved personal facts and events, and synthesis produces a grounded response. In speech synthesis, memory is an explicit architectural mechanism for aggregating temporal context. In graph games, memory is a restriction on implementable strategies. In the Mamyshev oscillator, memory is a dynamical property of seeded coherence. In the molecular-memory literature, synthesis denotes a reconciliation of synaptic and intracellular storage theories rather than artifact generation.

Domain	Memory formalism	Synthesized outcome
CNnotator (Byrnes et al., 20 Jun 2026)	CN ownership and permission contracts	Memory-safety annotations for C
PerLTQA (Du et al., 2024)	Semantic and episodic personal memories	Grounded QA responses
DFSMN TTS (Bi et al., 2018)	Explicit sequential memory blocks	Acoustic-feature sequences
FenSying (Singh et al., 2022)	C11 event orderings and fences	Fence placements and orders
Locksynth (Varanasi et al., 2023)	Lock sets over shared heap nodes	C++ synchronization code
Mean-payoff games (Velner, 2012)	Finite-memory strategies	Finite-state controller synthesis
Mamyshev oscillator (Cao et al., 2023)	Seed coherence and inverse population	Dissipative soliton molecules and pulse patterns
Molecular memory code (Gershman, 2022)	Synaptic posterior parameters and molecular generative parameters	A computational synthesis of memory theories

Taken together, these works suggest that memory-locked synthesis is not defined by a common application domain, but by a common dependency: synthesis is constrained by a memory structure that is explicit enough to be queried, optimized, validated, or physically steered.

2. Memory-usage specification synthesis in software verification

In "CNnotator: LLM-Guided Memory Safety Annotation Synthesis" (Byrnes et al., 20 Jun 2026), the synthesized object is a CN contract that makes implicit C memory usage explicit. CNnotator is a “guess-and-check” system that uses an LLM as the guesser and CN as the checker. CN is described as a separation-logic-based contract language with preconditions and postconditions, and the paper emphasizes two properties that make it suitable for this task: its specifications explicitly represent memory ownership in a way analogous to Rust’s borrow checker, and its specifications are executable as tests. In the configuration used in the paper, Fulminate instruments the C code so that annotations become runtime checks, and Bennet generates concrete heap states satisfying the precondition. Generated specifications are checked against 100 generated memory states, and the system retries up to six times on test failure. If the first answer has invalid CN syntax, it retries the original prompt up to two more times rather than attempting syntax repair. The prompt contains a roughly 400-line CN annotation guide, the full project source, the target function, and JSON formatting instructions. Before synthesis, CNnotator preprocesses the project by merging files and inserting CN macros and libraries so that allocation and deallocation work correctly. It also asks an initial gating question: whether a function is inherently unsafe, for example because of use-after-free or double-free (Byrnes et al., 20 Jun 2026).

A canonical example is the CN contract for a pointer increment function:

$q$7

The paper explicitly distinguishes the ownership component RW<int>(p) from the functional postcondition y == x + 1i32. CNnotator focuses on the former: the memory safety annotations that specify what memory a function may read, write, allocate, or free.

The benchmark contains 34 total functions: 31 annotatable functions across 28 files and 3 intentionally unannotatable unsafe functions across 3 more files. Fourteen annotatable examples came from the CN benchmark suite; 17 harder functions were generated by Claude Sonnet and o3 as adversarial examples. The evaluation used o3, o4-mini, GPT-4.1, GPT-4o, and o3-mini. The main results were 96.8% overall success and 90.3% first-attempt success for o3, with average 1.10 attempts; 83.9% overall and 74.2% first attempt for o4-mini; 77.4% overall and 74.2% first attempt for GPT-4.1; 71.0% overall and 64.5% first attempt for GPT-4o; and 64.5% overall and 61.3% first attempt for o3-mini. For the three inherently unsafe functions, all models detected the problems immediately and refused to annotate them (Byrnes et al., 20 Jun 2026).

The paper is careful about failure modes. One is ordinary failure to generate a passing annotation. Another is an annotation that passes CN’s tests but is still wrong on untested inputs. Another is “cheating” by requiring more ownership than strictly necessary. The authors treat such over-approximation as acceptable if the specification is valid and reflects actual usage within the program context. CN itself is not designed to prove unsafety, so unsafe-code identification remains heuristic. A plausible implication is that this form of memory-locked synthesis is strongest when synthesis is paired with an executable checker but still weaker than full proof.

3. Synchronization synthesis under memory and heap constraints

The same lockstep between synthesis and explicit memory structure appears in concurrency repair. "Fence Synthesis under the C11 Memory Model" (Singh et al., 2022) treats execution as a trace $\tau = \langle E_\tau, hb, mo, rf\rangle$, with happens-before, modification order, and reads-from relations defining validity under C11. The synthesis problem is: given a program and its buggy traces, find a set of fence insertions that eliminates all buggy traces using as few fences as possible and making each fence as weak as possible. Optimality is lexicographic: first minimize fence count, then minimize total weight, with rel and acq assigned weight 1, ar weight 2, and sc weight 3. FenSying is the optimal method; fFenSying is a near-optimal scalable alternative. FenSying detects weak cycles in coherence-condition compositions and strong cycles involving sc order, reduces the resulting constraint system to a SAT/min-model problem, and assigns the weakest sound memory order to each selected fence. The paper proves FenSying optimal and fFenSying sound, reports that synthesis is NP-hard even for straight-line programs, and finds that on 1389 litmus tests fFenSying was on average 67x faster and added no extra fences in over 99.5% of cases (Singh et al., 2022).

"Locksynth: Deriving Synchronization Code for Concurrent Data Structures with ASP" (Varanasi et al., 2023) operates on a different memory formalism: shared heap nodes manipulated by destructive updates. The system assumes shared memory is sequentially consistent, each destructive update step atomically modifies one heap cell, condition checks may be non-atomic, and operations have a constant number of shared heap writes. The paper states four correctness requirements explicitly: R1 every thread must lock all heap cells it will modify; R2 after acquiring locks, a thread must revalidate its precondition; R3 every heap cell in the precondition must be locked; R4 locks must be acquired and released in a uniform order to avoid deadlock. Locksynth uses Answer Set Programming for deduction and abduction, chooses a “maximally applicable” heap instance, guesses locks from the precondition by a precondition locking strategy, checks lock adequacy against possible interference, and also checks whether the order of pointer writes must be permuted to preserve invariants. It can synthesize code for linked lists and external BSTs, can check lock adequacy for internal BSTs, and can check lock adequacy but not synthesize full code for External AVL, External RB, and Chromatic trees (Varanasi et al., 2023).

The contrast between the two systems is instructive. FenSying synthesizes ordering constraints over memory events in weak memory; Locksynth synthesizes critical sections over shared heap cells in sequential consistency. In both, synthesis is guided by an explicit memory model rather than by purely syntactic source transformation. In both, optimality or adequacy depends on excluding interfering executions rather than on matching a reference implementation. This suggests that, in concurrent programming, memory-locked synthesis is less about code generation in the narrow sense than about deriving the minimum memory discipline under which the original computation becomes correct.

4. External memory and explicit architectural memory in machine learning

In "PerLTQA: A Personal Long-Term Memory Dataset for Memory Classification, Retrieval, and Synthesis in Question Answering" (Du et al., 2024), the synthesis stage is explicitly defined as

$r' = LLM(z, q, m),$

where $q$ is the question, $m$ is the retrieved memory bundle, $z$ is a prompt template, and $r'$ is the generated response. The framework has three stages: Memory Classification, Memory Retrieval, and Memory Synthesis. PerLTQA includes 8,593 questions for 30 characters and spans semantic memory—profiles and social relationships—and episodic memory—events and dialogues. The dataset statistics include 141 character profiles, 1,339 social relationship descriptions, 4,501 events, 3,409 event-related dialogues, and 23,697 memory anchors. Retrieval is performed from both memory types, with $k$ memories retrieved from each category. The candidates are reranked by

$$s'_i = \alpha \cdot P(\pi \mid m_i) + \beta \cdot \mathrm{sigmoid}(s_i),$$

with $\alpha = 0.5$ and $\beta = 0.5$. The paper emphasizes that this uses classification as a soft prior rather than a hard routing decision (Du et al., 2024).

The central empirical result is that retrieval is decisive for grounded generation. Under W-MC+R, gpt-3.5-turbo reached MAP 0.756, Corr. 0.573, and Coh. 0.969. Under W/o-MC+R, the same model reached MAP 0.156, Corr. 0.088, and Coh. 0.961. The ablation with NR, IR, and CR shows the same pattern: for ChatGPT, NR gives MAP 0.156 and Corr. 0.088, IR gives MAP 0.375 and Corr. 0.252, and CR gives MAP 0.842 and Corr. 0.609. The paper therefore distinguishes fluent generation from grounded generation: coherence remains high even when grounding collapses (Du et al., 2024).

"Deep Feed-forward Sequential Memory Networks for Speech Synthesis" (Bi et al., 2018) uses “memory” in an architectural rather than retrieval sense. DFSMN replaces recurrent state with explicit memory blocks. For a cFSMN layer, a projected hidden state $r' = LLM(z, q, m),$0 is augmented by weighted sums of past or past-and-future frames, and DFSMN further adds skip connections between consecutive memory blocks: $r' = LLM(z, q, m),$1 The paper positions DFSMN as a feed-forward alternative to BLSTM for statistical parametric TTS. The input is 754-dimensional linguistic features; the outputs are WORLD-derived acoustic features, including 60-dim mel-cepstral features, 3-dim log F0, 11-dim band aperiodicity, and an unvoiced/voiced indicator. The corpus contains 38,600 training utterances and 1,400 validation utterances from a single male Mandarin speaker. The strongest subjective system is system E, with 6 DFSMN layers + 2 fully connected layers and order/stride 10,10,2,2, achieving MOS 4.23. The BLSTM baseline has size 295 MB and 21.09 G FLOPS; system H has size 120 MB and 7.10 G FLOPS; system E generates one second of speech with 5.35 G FLOPS, about 4× faster than BLSTM (Bi et al., 2018).

These two machine-learning cases instantiate two different forms of memory-locked synthesis. PerLTQA locks synthesis to externally retrieved evidence. DFSMN locks synthesis to explicit temporal taps encoded in the network architecture. In one case, memory is a retrieved conditioning set; in the other, memory is a learnable feed-forward operator over context windows.

5. Dynamical memory and pulse synthesis in mode-locked lasers

In "Coherence memory and amnesia in a mode-locked laser" (Cao et al., 2023), memory-locked synthesis is a physical phenomenon rather than a software or model-design procedure. The system is a Mamyshev oscillator operating at 1030 nm and 8.4 MHz repetition rate. Because the lasing threshold is above the mode-locking threshold, the cavity accumulates inverse population before the seed arrives. External pulse seeds are injected, and the amount of accumulated inverse population determines whether the seed’s coherence is remembered or forgotten. The paper defines two regimes. In the coherence memory regime, initial inverse population is not very large, the seed is only moderately amplified, spectral phase coherence is preserved, and the oscillator converges in only a few round trips. In the coherence amnesia regime, high inverse population produces strong amplification, strong Kerr nonlinearity, random changes in spectral amplitude and phase, waveform distortion, and a chaotic transition lasting about 400–500 round trips before stabilization (Cao et al., 2023).

To measure these dynamics, the authors developed a heterodyne technique. The output is filtered, combined with a CW laser at 1030 nm, detected by a balanced photodetector, and processed with a Hilbert transform to recover amplitude and phase. Spectral coherence is defined by

$r' = LLM(z, q, m),$2

In the amnesia regime, the heterodyne signal is irregular for the first hundreds of round trips and $r' = LLM(z, q, m),$3 remains low before rising after about 350 round trips; in the memory regime, the beat is regular immediately and $r' = LLM(z, q, m),$4 throughout buildup (Cao et al., 2023).

The same seeded control enables dissipative soliton molecule synthesis. Using a fiber Mach–Zehnder interferometer, the authors prepared pulse-pair seeds with controllable spacing. In the memory regime, a seed spacing of 8.7 ps yields a stabilized DSM spacing of 8.7 ps. In the amnesia regime, the chaotic transient breaks the pulse pair and the laser ends in a single-pulse state. For small seed spacings, the final spacing becomes pinned to a plateau of 6.2 ps independent of the seed spacing; when pump power is increased, the plateau decreases slightly from 6.21 ps to 6.15 ps. A seed spacing of 4.7 ps evolves toward the 6.2 ps plateau over thousands of round trips. The paper also demonstrates pulse writing, erasing, transport, and storage of a pulse sequence representing “THUDPI” (Cao et al., 2023).

This literature uses “memory” in a strictly dynamical sense: the system remembers or forgets properties of the seed. Synthesis is therefore pathway-dependent. The final pulse form cannot be separated from the transient route by which the oscillator reaches it.

6. Finite-memory synthesis and the dual-memory view in theory

"Finite-Memory Strategy Synthesis for Robust Multidimensional Mean-Payoff Objectives" (Velner, 2012) addresses memory-locked synthesis at the level of controller realizability. The setting is a two-player graph game

$r' = LLM(z, q, m),$5

with player 1 minimizing a quantitative objective. The relevant restriction is to strategies implementable by a finite Moore machine $r' = LLM(z, q, m),$6. The paper distinguishes quantitative analysis,

$r' = LLM(z, q, m),$7

from boolean analysis, which asks whether some finite-memory strategy can guarantee a threshold $r' = LLM(z, q, m),$8. For mean-payoff expressions, the paper proves that the quantitative analysis problem is computable, but the boolean analysis problem is inter-reducible with Hilbert’s tenth problem over the rationals and is $r' = LLM(z, q, m),$9-hard even for sum-free LimInfAvg-only expressions (Velner, 2012).

The conceptual importance of this result is that memory is not a resource added after synthesis; it is part of the synthesis specification itself. The paper explicitly notes that unrestricted optimal strategies may require infinite memory, whereas synthesis is typically interested in a finite-state controller. The positive result is therefore computability of the best finite-memory value, not equivalence with the unrestricted optimum.

In a different sense, "The molecular memory code and synaptic plasticity: a synthesis" (Gershman, 2022) uses “synthesis” to reconcile two theories of memory storage. The paper proposes that synapses store parameters of an approximate posterior distribution over latent causes, whereas intracellular molecules store parameters of the generative model. It writes the joint model as

$q$0

and adopts a factorized variational family

$q$1

The biological interpretation is that $q$2 is implemented by neural activity with $q$3 stored at synapses, while $q$4 is implemented by intracellular molecular or nuclear states with $q$5 stored in RNA, DNA methylation, histone modifications, proteins, or related biochemical codes. The paper presents this division of labor as a response to empirical and conceptual objections to a purely synaptic memory theory, including temporal mismatch, selectivity, structured content, persistence, savings, and evidence for transfer and single-cell learning (Gershman, 2022).

Although this work does not synthesize code or signals, it is relevant to the topic because it formalizes memory as a heterogeneous computational substrate. A plausible implication is that “memory-locked” behavior in other domains can likewise arise from a division of labor between fast inference mechanisms and slower, more durable state variables.

7. Recurring mechanisms, limitations, and points of dispute

Several recurring mechanisms appear across these papers. First, the relevant memory object is explicit: CN ownership predicates, retrieved memories, sequential memory taps, C11 order relations, lockable heap nodes, finite-state memory, or seed coherence. Second, synthesis is rarely unconstrained generation. It is usually embedded in a loop that validates a candidate against an executable checker, a retrieval score, a satisfiability condition, an interference model, or an experimentally measured transient. Third, the literature repeatedly distinguishes plausibility or fluency from correctness or grounding.

This distinction is sharp in PerLTQA, where coherence remains high even when grounding collapses without retrieval (Du et al., 2024). It is equally sharp in CNnotator, where annotations that pass 100 generated memory states are useful but do not amount to a proof, and unsafe-code detection remains heuristic because CN is not designed to prove unsafety (Byrnes et al., 20 Jun 2026). In fence synthesis, not every memory bug is fence-fixable: the paper explicitly notes that sc fences cannot in general restore sequential consistency, and some violations require strengthening accesses rather than inserting fences (Singh et al., 2022). In Locksynth, the synthesis scope is bounded to operations with a constant number of shared heap writes, and for several balanced-tree families the system can infer locks without synthesizing the complete code (Varanasi et al., 2023). In DFSMN, more context is not monotonically better: performance improves up to system E, and further increases in order or depth may introduce noise (Bi et al., 2018). In the laser work, the same seeded architecture supports both coherence memory and coherence amnesia, so memory-locked synthesis is not synonymous with deterministic retention of the seed; forgetting is itself one of the experimentally established regimes (Cao et al., 2023). In mean-payoff games, computability of quantitative synthesis does not imply decidability of boolean threshold synthesis, because the latter is tied to $q$6 (Velner, 2012). In the molecular-memory paper, the major point of dispute is the adequacy of a purely synaptic theory of durable storage (Gershman, 2022).

The most general conclusion supported by these sources is therefore narrow but robust. Memory-locked synthesis is best understood not as a single algorithmic paradigm, but as a family of synthesis regimes in which the admissible output is determined by an explicit memory substrate and a corresponding validation discipline. The technical meaning of “memory” varies widely, but the structural pattern is stable: synthesis succeeds when the memory representation is sufficiently explicit to constrain generation and sufficiently operational to support checking, reranking, or controlled evolution.