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DART-VLN: Test-Time Memory Decay and Anti-Loop Regularization for Discrete Vision-Language Navigation

Published 1 Jul 2026 in cs.RO and cs.AI | (2607.01043v1)

Abstract: Memory-based discrete vision-language navigation (VLN) agents must act under partial observability, yet even strong frozen backbones remain vulnerable at test time. Two common failure modes are stale historical evidence at memory readout and inefficient local backtracking during action selection. We present DART-VLN, a training-free test-time control framework for discrete VLN. DART-VLN combines Test-Time Memory Decay, a read-side memory reweighting rule that suppresses stale and redundant evidence without rewriting stored content, with Anti-Loop Regularization, a lightweight next-hop penalty that discourages immediate reversals during action selection. The framework introduces no new learnable parameters and leaves the learned backbone unchanged. Experiments on R2R and REVERIE show a consistent pattern: decay-only provides stable read-side gains, while decay+anti-loop achieves the best overall quality-efficiency trade-off, yielding shorter trajectories, lower runtime, and improved navigation performance in key settings. Behavioral analysis further confirms that anti-loop regularization reduces local backtracking and improves path efficiency under frozen backbones. Overall, the results show that modest test-time control can make memory-based discrete VLN more reliable and efficient without retraining.

Authors (3)

Summary

  • The paper introduces a test-time memory decay mechanism that reweights memory slots to mitigate stale and redundant visual cues.
  • It further includes an anti-loop regularization technique that penalizes immediate backtracking and looped actions, enhancing navigation efficiency.
  • Empirical results on R2R and REVERIE benchmarks show reduced trajectory lengths and runtime while maintaining or improving success rates.

DART-VLN: Test-Time Memory Decay and Anti-Loop Regularization for Discrete Vision-Language Navigation

Introduction

DART-VLN addresses the reliability challenges inherent in memory-based discrete vision-language navigation (VLN) models operating under partial observability and frozen parameters. The work isolates two persistent failure modes within these systems: (1) the accumulation and misaggregation of stale or redundant evidence during memory readout, and (2) the prevalence of local action inefficiencies—particularly immediate reversals and short loops—during action selection. The observed vulnerabilities persist despite the use of high-performing, pretrained backbones and remain largely unmitigated without retraining or architectural augmentation. DART-VLN provides a lightweight, training-free test-time control framework, which enhances inference behavior while preserving the original model structure and parameters.

Methodology

Read-Side Memory Decay

The first component, Test-Time Memory Decay, operates by reweighting the contributions of explicit memory slots at inference, using timestamp and usage-based metadata—specifically, slot age, visit count, and exponentially-smoothed feature novelty. The readout weight for each slot is a product of recency, repetition suppression, and novelty, clipped to a suitable range:

  • Recency decay: Penalizes memory slots not refreshed recently, using an exponential decay based on age.
  • Repetition suppression: Reduces influence of slots repeatedly observed in the trajectory to mitigate overfitting to non-informative states.
  • Novelty factor: Favors evidence with recent significant visual changes, as measured by cosine distance between feature representations.

This strategy suppresses stale and redundant information at read time without directly modifying stored slot contents, offering a conservative denoising mechanism that is fully compatible with existing explicit memory designs. Aggressive write-side memory update variants were also evaluated; these proved less stable and are presented only as ablation boundaries.

Anti-Loop Regularization

The second component, Anti-Loop Regularization, introduces a next-hop based penalty into the candidate action score adjustment at each decision step:

  • Immediate backtracking penalty: Penalizes actions that transition directly back to the previous node in the trajectory graph.
  • Revisit penalty: Weakly penalizes transitions to viewpoints revisited beyond a threshold.

The penalty is incorporated as a local regularizer acting only during argmax-based action selection, yielding lower trajectory inefficiency without interfering with the overall navigation or requiring retraining. The method is local in scope—it affects only current step transitions and does not implement global planning or learned correction policies.

The combination of these two components forms the DART-VLN inference pipeline, intervening solely at test time without modifying the underlying navigation agent or requiring any additional learnable parameters.

Experiments

Benchmarks and Evaluation Protocol

DART-VLN was extensively evaluated on the Room-to-Room (R2R) and REVERIE benchmarks, with a consistent baseline based on GridMM. All interventions are performed post hoc, using the same pretrained models and differing only in test-time inference control.

Primary metrics include Success Rate (SR), Success weighted by Path Length (SPL), Remote Grounding Success (RGS and RGSPL for REVERIE), Navigation Error (NE), and trajectory length (TL). Runtime is also assessed to benchmark quality-efficiency trade-offs.

Empirical Results

Results consistently indicate that:

  • Decay-only: Yields immediate, dependable improvements over the GridMM baseline. For instance, on R2R test unseen, it reduces NE (3.35 → 3.19) and runtime (2312.52s → 1621.34s) while maintaining or slightly improving SR and SPL.
  • Decay + Anti-loop: Achieves the most favorable balance between quality and efficiency. On R2R val unseen, TL is reduced from 13.27 to 12.41 and SPL is increased, with backtrack rate decreased from 2.3% (baseline) to 2.0%. On REVERIE, TL is reduced from 23.20 to 21.57 and RGSPL increased from 24.56 to 25.44, with runtime nearly halved.

Aggressive write-side variants provided less consistent gains, highlighting the robustness and practical value of the conservative, read-side decoupled approach.

Behavioral Diagnostics

Anti-loop regularization demonstrates a direct reduction in oscillatory local behaviors—immediate backtracking and short loops—thus consistently shortening paths and reducing unnecessary action steps across both R2R and REVERIE. The module's effect is localized: decay-only does not mitigate local reversals while decay+anti-loop leads to notably cleaner paths.

Theoretical and Practical Implications

DART-VLN highlights the meaningful impact of fine-grained test-time control in explicit-memory-based VLN systems under a frozen backbone, decoupling improvements in inference behavior from the necessity for retraining or architectural complexity. The evidence supports the claim that, in strong baseline settings, post-hoc inference-time interventions—properly scoped and interpretable—provide not only runtime and efficiency improvements but also foster more reliable local behavioral patterns. From a practical perspective, these interventions can be adopted with minimal integration overhead for deployed systems, offering a route to enhance operational reliability without incurring the cost associated with the full retrain-test cycle or increased model complexity.

Future Directions

Several avenues are implicated by this study:

  • Extension to alternative backbone architectures, especially in open-ended embodied navigation or continuous environment settings.
  • Exploration of more adaptive or context-aware test-time regularizers, e.g., for dynamically adjusting decay parameters based on task complexity or environment topology.
  • Deeper behavioral analysis connecting local regularization effects to longer-term success/failure cascades in navigation and object grounding.

Conclusion

DART-VLN introduces principled, training-free test-time memory control and action regularization strategies for discrete VLN. The combination of read-side memory decay with anti-loop regularization demonstrably improves both path efficiency and navigation reliability on standard benchmarks, without retraining or increased model capacity. These results affirm that well-designed inference-time interventions can robustly augment frozen navigators, and set the stage for further research into lightweight, interpretable control mechanisms for embodied AI.

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