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Compiler Framework for Directional Transport in Zoned Neutral Atom Systems with AOD Assistance: A Hybrid Remote CZ Approach

Published 13 Apr 2026 in quant-ph and cs.AR | (2604.11000v1)

Abstract: We present a directional-transport (DT)-based remote CZ gate and compiler for zoned neutral-atom arrays that overcomes movement-bound entanglement limitations. Current AOD-based shuttling faces row/column non-crossing constraints, device-speed limits, and hardware-restricted range - bottlenecks for long-distance connectivity. Our approach reserves AODs for channel setup and micro-tuning while making DT the default for remote entanglement. Under antiblockade, a detuning-modulated pi-pulse sequence drives directional transport of a Rydberg excitation along a dynamic and resettable ancilla corridor, realizing a CZ gate between stationary, non-adjacent qubits. This cuts entangling-stage duration by approximately 50 to 90 percent versus AOD-only baselines and enables long-distance connectivity beyond objective-limited shuttling.

Summary

  • The paper introduces a hybrid compiler framework that combines directional transport and AOD initialization to enable rapid remote CZ gate operations in neutral atom arrays.
  • It employs detuning-modulated Ï€-pulse sequences for coherent Rydberg excitation transfer, reducing entangling duration by up to 90% versus AOD-only schemes.
  • The framework's static and dynamic channel planning boosts scalability and end-to-end fidelity, outperforming state-of-the-art neutral atom compilers.

Compiler Framework for Directional Transport in Zoned Neutral Atom Systems with AOD Assistance: A Hybrid Remote CZ Approach

Introduction and Motivation

The paper presents a hybrid compiler framework for neutral atom quantum architectures, leveraging directional transport (DT) as a basis for remote controlled-Z (CZ) gates, in concert with acousto-optic deflector (AOD)-mediated atomic shuttling. This approach fundamentally addresses the bottleneck posed by slow, resource-intensive qubit movement—an issue that plagues large-scale, zoned neutral atom arrays when attempting nonlocal entanglement. In contrast to traditional schemes, which rely on extensive AOD-based transport for remote entangling gates, the hybrid protocol reserves AODs primarily for initial channel setup and micro-tuning, relegating the majority of remote entanglement actions to the DT-based protocol. Figure 1

Figure 1: The compiler’s directional-transport framework, showing the integration of DT channels with AOD control for neutral atom arrays.

The compiler aligns with practical constraints in neutral atom hardware by making DT the default for remote interactions. It employs detuning-modulated π\pi-pulse sequences (antiblockade mechanism) to propagate a Rydberg excitation coherently along a configurable corridor of ancilla atoms, establishing entanglement between qubits with minimal physical movement. Empirical results highlight an entangling-stage duration reduction of approximately 50–90% relative to state-of-the-art (SOTA) AOD-only baselines.

Theory of Directional Transport-Based Remote CZ

The remote CZ implementation utilizes Rydberg antiblockade facilitation for quantum information propagation. Executing a remote CZ involves four steps:

  1. Encoding: A local π\pi-pulse maps the ∣1⟩c|1\rangle_c state of control qubit cc to a Rydberg excitation.
  2. Transport: The excitation is relayed along an ancilla chain via a fast, directionally-tuned swap of Rydberg population.
  3. Entanglement: A 2Ï€2\pi-pulse is applied to the target qubit tt, incurring a conditional phase only if the adjacent ancilla is excited; antiblockade resonance ensures selectivity.
  4. Retrieval: The DT sequence is reversed, returning the excitation to the control and mapping it back to the ground state.

The protocol's execution time is dominated by the number of ancilla-assisted hops. With realistic experimental parameters, a DT-based remote CZ can be completed in a few microseconds, drastically faster than the tens to hundreds of microseconds required for typical AOD-based shuttling. Figure 2

Figure 2: (a) Antiblockade-based remote CZ protocol; (b) Extension to 2D geometries; (c) Hardware-aligned geometric constraints informed by compiler; (d) DT-mediated excitation and entanglement temporal sequence.

This behavior contrasts with established architectures, where mechanical qubit shuttling incurs significant latency. The proposed framework exploits DT to mitigate cumulative transport time, curbing both idle-induced decoherence and execution cost for large circuits.

Compiler Architecture and Algorithmic Innovations

The DT-aware compiler pursues an integrated static and dynamic channel planning strategy. The overall methodology is structured as follows:

  • Priority-driven initial placement concentrates AOD movement into a single pre-compilation phase. Qubits with high temporal engagement are mapped preferentially to locations conducive to efficient DT routing, minimizing future migration overhead.
  • Static channel configuration optimally aligns each set of DT-eligible qubits with dedicated one-dimensional ancilla chains.
  • MIS-based conflict graph routing enables bulk parallelization of AOD moves, maximizing channel utilization and preventing deadlock.
  • Dynamic channel management, especially for QFT-like circuits, incrementally updates the DT backbone to accommodate shifting interaction patterns without resorting to global channel reconfiguration. Figure 3

    Figure 3: Flowchart depicting the DT-aware dynamic compiler’s logic, including stage-wise channel planning and resource assignment.

Notably, the compiler classifies all two-qubit gates at compile-time (or per-stage, dynamically) as DT-eligible or AOD-direct based on routability and channel cost. The dynamic mode, critical for sparse interaction circuits (e.g., QFT), maintains a compact, high-reuse DT backbone across stages, with local AOD rearrangements restricted to active ancilla assignments.

Numerical Evaluation and Comparative Analysis

The framework is evaluated on multiple benchmarks (QFT, Ising, BV, cat, adder), with explicit comparison to leading neutral atom compilers (ZAC, ZAP, Enola). The proposed strategy demonstrates:

  • Entanglement-stage duration reduction of 29–82% compared to SOTA, with average improvement above 70% for large-scale circuits.
  • End-to-end fidelity improvements: For Ising circuits with n=150–200n=150–200 qubits, final output fidelity outpaces SOTA by factors of 5.9×5.9\times and 15.9×15.9\times respectively. Average fidelity gain is 17.6% over the best baseline. Figure 4

    Figure 4: Duration comparison between the proposed static compiler and state-of-the-art neutral atom compilers.

    Figure 5

    Figure 5: Fidelity comparison between the proposed static compiler and SOTA for various Ising benchmarks.

For QFT-like workloads, comparison between static and dynamic compilers reveals a tradeoff curve:

  • Dynamic compilation achieves higher fidelity, increasing success probability by orders of magnitude in challenging regimes. Duration remains well below prior art, albeit modestly higher than static mode due to incremental channel reshaping.
  • Scalability: Gains from the DT-static approach amplify with system size, while dynamic DT mitigates fidelity loss in deep, sparse interaction workloads. Figure 6

    Figure 6: Static vs dynamic DT compilation performance on QFT benchmarks—fidelity and entanglement-stage duration trends.

Practical and Theoretical Implications

This work validates the efficacy of integrating DT as a compilation and execution primitive in zoned neutral atom quantum processors. Practically, it suggests a route to multi-microsecond, long-range entangling gates compatible with leading large-scale NA hardware. Channel planning algorithms accommodating both dense and sparse interaction topologies support flexible circuit classes and varying workload structures.

Theoretically, the analysis supports a model where excitation-based transport (rather than atom movement) serves as a scalable entanglement backbone, provided that ancilla resource provisioning and AOD reconfiguration are managed cost-effectively by the compiler. Extensions to higher-dimensional or fault-tolerant circuits are feasible; future developments could target automated co-optimization with error mitigation and calibration, or adapt the framework to hybrid analog-digital gate protocols.

Conclusion

The directional-transport hybrid compiler framework presents a robust solution to the movement-induced bottlenecks in zoned neutral atom quantum processors. By tightly coupling AOD-driven initialization with DT-mediated remote entanglement, it delivers substantial speedups and fidelity gains—especially as system size increases. The synergy of static and dynamic channel management enables efficient scaling for both regular and irregular circuit classes. This approach establishes groundwork for both NISQ-era algorithms and the architectural foundations required for future logical quantum processors.

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