R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII

Abstract: Graph neural networks (GNNs) are increasingly applied to physical design tasks such as congestion prediction and wirelength estimation, yet progress is hindered by inconsistent circuit representations and the absence of controlled evaluation protocols. We present R2G (RTL-to-GDSII), a multi-view circuit-graph benchmark suite that standardizes five stage-aware views with information parity (every view encodes the same attribute set, differing only in where features attach) over 30 open-source IP cores (up to $10^6$ nodes/edges). R2G provides an end-to-end DEF-to-graph pipeline spanning synthesis, placement, and routing stages, together with loaders, unified splits, domain metrics, and reproducible baselines. By decoupling representation choice from model choice, R2G isolates a confound that prior EDA and graph-ML benchmarks leave uncontrolled. In systematic studies with GINE, GAT, and ResGatedGCN, we find: (i) view choice dominates model choice, with Test R$^2$ varying by more than 0.3 across representations for a fixed GNN; (ii) node-centric views generalize best across both placement and routing; and (iii) decoder-head depth (3--4 layers) is the primary accuracy driver, turning divergent training into near-perfect predictions (R$^2$$>$0.99). Code and datasets are available at https://github.com/ShenShan123/R2G.

• The paper introduces five standardized graph views that isolate representation effects in physical design benchmarks.
• It demonstrates that node-centric views, particularly view (b), outperform edge-centric alternatives in placement and routing experiments.
• It reveals that optimized decoder-head depth significantly improves model stability and accuracy, achieving nearly perfect R2 scores.

R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII

Motivation and Background

The emergence of GNN-based approaches for key EDA tasks such as cell placement, routing, and congestion/timing prediction has led to a strong demand for standardized, physically meaningful circuit-graph datasets that support controlled benchmarking. However, current resources entangle the choices of graph representation, circuit, and downstream model, confounding objective evaluation. Most datasets fix a single EDA-centric graph view, neglecting the variety of signal, geometric, and semantic information that circuits can provide in late-stage physical design.

"R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII" (2604.08810) addresses these structural and protocol deficiencies by releasing a comprehensive, multi-view benchmark suite for physical design with five rigorously standardized, information-parity graph views across 30 open-source designs. This suite decouples representation effects from architectural factors, enabling fine-grained investigation of graph view selection—a dimension rarely interrogated in prior EDA or graph ML work.

Figure 1: Benchmark and dataset evolution in EDA and graph ML, with R2G bridging domain specificity and graph benchmarking with stage- and view-awareness.

Benchmark Design and Multi-View Representation

R2G's key advance is the provision of five circuit-graph representations, each with identical features and labels but differing in which physical or logical elements are encoded as nodes or edges. This allows isolation of representation effects:

• (b) All-elements-as-nodes: Gates, pins, nets, and IOs as nodes; maximal semantic coverage.
• (c) Pins-as-edges: Pins are typed edges, reducing graph order without losing incidence/direction.
• (d) Nets-as-edges: Nets are edges between gates (pairwise view).
• (e) Net–gate incidence edges: Bipartite net–gate formulation.
• (f) Net edges without pin nodes: Pin nodes pruned, yielding small-world/hub graphs.

These typed, attributed graph constructions are extracted from DEF output of a complete OpenROAD RTL-to-GDSII flow, supporting both placement and routing experiments. Supervision attaches to either nodes or edges as dictated by the graph, ensuring strict parity of signals across all views while the entity location of each attribute (node or edge) is the only variable.

Figure 2: The OpenROAD post-end flow with R2G’s focus on placement and routing, leveraging DEF for lossless, feature-rich graph construction.

Figure 3: Original schematic (a) and five complementary graph views (b–f), each supporting different inductive biases and supervision granularities.

Controlled Evaluation Protocol

R2G circumvents representation-model entanglement by enforcing:

• Unified splits and loaders
• Reproducible baselines with classic GNNs (GINE, GAT, ResGatedGCN)
• Stage- and resolution-matched metrics (e.g., HPWL for placement, routed wire length for routing)
• Identical features and labels across all views

Systematic experiments show that graph view selection dominates model capacity: for fixed GNNs, test $R^2$ can vary by more than 0.3 solely due to representation. Node-centric views generalize substantially better in both placement and routing tasks, with view (b) being consistently strongest.

Experimental Observations

View-Dependent Performance

Strong, view-conditioned results are as follows:

• View choice supersedes model choice: For a fixed GNN, $R^2$ can move from negative values (underfit or label-view mismatch) to nearly perfect ($>$0.99) solely by changing representation.
• Node-centric views (especially (b)) are optimal for both placement and routing, aligning with the physical design signal structure.
• Decoder-head design is pivotal: Increasing head depth from 1 to 3-4 layers transforms models from unstable or divergent to highly accurate ($R^2 > 0.99$).

The experiments further show that moderate message passing depth (3–4 GNN layers) suffices, while deeper stacks reduce performance due to over-smoothing. In contrast, decoder-head depth drives the largest accuracy gains and optimization stability.

Statistical and Topological Analysis

R2G provides a granular statistical comparison across all views and circuit categories, confirming:

• View (b) exhibits moderate degree and long paths: Ideal for capturing both local and global dependencies without over-mixing, explaining its robustness.
• Dense/small-world views (c, f): Tend toward hub bias and reduced physical interpretability.
• Edge-centric bipartite and net-edge views (d, e): Best for routing-centric tasks but less robust overall compared to node-centric views.

Implications and Future Directions

R2G’s findings have important consequences:

• Benchmark and reporting protocols: Studies must control for graph representation. Claiming model superiority without view-constant baselines is misleading.
• Architecture design: Efforts to increase GNN depth yield diminishing returns versus relatively simple increases in head complexity.
• Transferability and task alignment: Practitioners should tailor graph view to supervision granularity, use view (b) as default, and prioritize head depth tuning.
• Benchmark development: Future research should further decouple other confounds—such as technology node, timing, and power label fidelity—and extend to hetero-GNNs and transformer-based read-outs.

Conclusion

R2G establishes a rigorous foundation for reproducible, controlled, and informative circuit graph learning research. The isolation of representation effects reveals that view selection is the primary accuracy determinant, node-centric graphs robustly support EDA tasks, and decoder-head capacity is critical for practical performance, outweighing moderate changes in GNN depth. These insights are indispensable for future EDA benchmark, model, and ML-for-EDA system design.