Papers
Topics
Authors
Recent
Search
2000 character limit reached

XACC: Hybrid Quantum-Classical Computing

Updated 9 March 2026
  • XACC is a hybrid quantum-classical framework defined by a modular, service-oriented architecture that decouples quantum kernel definition from compilation, optimization, and execution workflows.
  • It employs a unified intermediate representation with extensible plugins to support various quantum devices and simulation paradigms while ensuring language and hardware independence.
  • The infrastructure supports advanced simulation, parallel execution, and pulse-level control, providing scalable and efficient solutions for cutting-edge quantum computational research.

The eXtreme-scale ACCelerator (XACC) Framework is a service-oriented, modular software infrastructure for hybrid quantum-classical computing, targeting language and hardware independence, high extensibility, and efficient execution workflows on platforms ranging from laptops to exascale HPC clusters. XACC provides well-defined interfaces that decouple quantum kernel definition from compilation, optimization, and execution, supporting multiple quantum computing and simulation paradigms—including gate-model devices, quantum annealers, and tensor-network simulators—through a unified intermediate representation and a versatile plugin system (McCaskey et al., 2017, McCaskey et al., 2019, Nguyen et al., 2021).

1. Architectural Foundations and Core Principles

XACC is structured as a three-layer system distinguishing frontend (language/DSL parser), middle-end (IR transformations, optimizations), and backend (execution via hardware or simulator). Its primary abstractions are:

  • Compiler Interface: Ingests quantum kernel source (OpenQASM, Quil, XASM, or DSL) and parses it into the XACC Intermediate Representation (IR), which can be manipulated, transformed, serialized, or visualized.
  • Intermediate Representation (IR): Composed of Instruction and CompositeInstruction nodes, yielding a directed acyclic graph of quantum operations. Each node specifies gate type, operand qubit indices, and parameters, and supports the visitor pattern for extensibility.
  • Accelerator Interface: Abstracts devices (physical or simulated QPUs) and is realized through plugins (e.g., IBM, Rigetti, D-Wave, TNQVM). Accelerators are registered and instantiated by symbolic name. The execute method consumes an IR and quantum buffer, dispatching native vendor calls or in-process simulation.
  • AcceleratorBuffer: Encapsulates quantum/classical registers, measurement outcomes, and metadata.
  • Service Registry: Dynamically loads and binds plugins implementing abstract interfaces (Accelerator, Compiler, IRTransformation, Optimizer, Algorithm), supporting OSGi/CppMicroServices for discoverability.

This layered and service-oriented architecture allows “write once, run anywhere” capabilities, with seamless transitions between hardware and simulator targets and between quantum languages (McCaskey et al., 2017, McCaskey et al., 2019).

2. Intermediate Representation and Compilation Workflow

The XACC IR is an in-memory polymorphic tree (or forest) of Instruction and CompositeInstruction nodes. Mathematical formalism:

  • Each instruction: (g,Q,θ),gGateSet,Q{0,,N1},θRk(g, Q, \theta),\quad g \in \mathrm{GateSet}, Q \subset \{0,\ldots,N{-}1\}, \theta \in \mathbb{R}^k
  • Supports full circuit manipulation: traversal, optimization passes (gate fusion, commutation, basis transforms), and static analysis.

The compilation pipeline is modular and typically consists of the following stages:

  1. Parsing: Compiler plugin parses language source into IR.
  2. Preprocessing: Device-specific or error-mitigation preprocessing (e.g., SPAM correction circuit injection).
  3. Optimization: Gate cancellations, simplifications, native gate mapping.
  4. Transformation: Qubit placement, routing, and hardware-aware conversion.
  5. Execution: Backend code generation/dispatch.
  6. Postprocessing: Measurement error correction, observable re-scaling.

The IR can be rendered to various views: human-readable assembly, GraphViz visualization, or exported/imported as JSON/XML files (McCaskey et al., 2019, McCaskey et al., 2018).

3. Extensibility: Plugin and Service Infrastructure

XACC leverages a dynamic plugin registry, modeled after OSGi (CppMicroServices), to enable new hardware, compilers, optimizers, algorithms, and IR transformations. Each plugin provides:

  • Explicit registration under an interface and a unique symbolic name (e.g., XACC_REGISTER_ACCELERATOR).
  • Runtime discoverability, allowing user code to select plug-in services strictly by name without code changes.
  • Decorator pattern: Enables orthogonal extension, e.g., error-mitigation decorators or resource-virtualization layers.

Plugin types include:

Interface Examples Functionality
Accelerator "ibm", "tnqvm", "dwave", "QuaC" Hardware simulation/abstraction
Compiler "openqasm", "xasm", "quil" Source parsing and IR generation
Optimizer "nlopt", "quantum-control" Classical and pulse-level optimization
IRTransformation "quantum-control", "gate-fusion" IR rewriting: gate-to-pulse, optimization passes
Algorithm "vqe", "adapt", "qeom", "qcmx" High-level quantum-classical workflow automation

To add a backend or language, subclass and register the corresponding interface, provide any necessary passes, and drop the shared-object library into the plugin directory (McCaskey et al., 2019, Claudino et al., 2021).

4. Simulation, Virtualization, and Parallelization Capabilities

XACC supports advanced simulation and scalable parallel execution:

  • Tensor Network Quantum Virtual Machine (TNQVM): Accelerator plugin for tensor-network circuit simulation, supporting exact (full contraction) and approximate (e.g., MPS, locally-purified MPO) representations, with ExaTN or ITensor backends (Nguyen et al., 2021, McCaskey et al., 2018). Modes:
    • Full contraction: Contract entire circuit tensor network for amplitude/expectation evaluation.
    • MPS/truncated TN: Local application of gates, SVD-based truncation to control bond dimension.
  • ExaTN Integration: Distributed storage and execution of tensor contractions, automatic contraction-path selection (METIS), and out-of-core support for tensors exceeding device memory. Strong scaling demonstrated up to 64 Summit nodes for 53-qubit, depth-14 Sycamore circuits, achieving 4–8 TFlop/s (FP32) per GPU and 2.3× speedup in TF32 (Nguyen et al., 2021).
  • Noise Modeling: Kraus operator tensors model quantum channels, enabling density-matrix simulations and stochastic noise processes in circuit simulation (Nguyen et al., 2021).
  • Virtual QPU Parallelization: The HPCVirtDecorator abstracts each classical HPC node (CPU/GPU) as a virtual QPU via MPI communicator partitioning, supporting parallel execution over large circuit batches. Experiments demonstrate nearly linear strong scaling for thousands of circuit simulations on both CPU and GPU clusters (Claudino et al., 2024).

5. Advanced Features: Pulse-Level Compilation and Optimal Control

XACC natively supports pulse-level quantum programming and quantum optimal control:

  • Pulse IR Extension: The IR includes analog instruction types (Pulse), carrying complex envelope samples, start times, channels, and durations. OpenPulse-compliant Hamiltonian representation is adopted via JSON schemas, mapping symbolic parameters to numeric device values (Nguyen et al., 2020).
  • Gate-to-Pulse Lowering: Two-pass algorithm traverses digital IR nodes, replaces gates with pulse-level composites using backend-provided cmd-defs, and applies global/scheduler passes to assign precise time coordinates for execution (Nguyen et al., 2020).
  • Pulse Simulation Backend (QuaC): Implements Lindblad master-equation time evolution for user-specified Hamiltonians, leveraging PETSc MPI-parallel linear algebra for strong scaling on multi-node clusters (Nguyen et al., 2020).
  • Optimal Control Integration: IRTransformation plugins implement GRAPE, GOAT, and Krotov methods, supporting analytic and gradient-based pulse search with full extensibility at the plugin level (C++ and Python APIs) (Nguyen et al., 2020).
  • Hardware-Specific Gate and Pulse Optimization: Multi-level compilation pipelines (e.g., for ion traps) inject hardware-aware decomposition passes, numerically optimize single-qubit gates, and batch parallel rotations, demonstrating up to 6.13× gate-count and cycle reductions (Adams et al., 2021).

6. Practical Workflows and Scientific Applications

XACC enables end-to-end hybrid quantum-classical workflows through standardized APIs, facilitating rapid development of domain science solutions:

  • Quantum Chemistry: Modular interfaces for observable construction (e.g., Jordan–Wigner mapping), ansatz generation, cross-platform execution, and high-level algorithms (VQE, ADAPT-VQE, QITE, QCMX, QEOM) (Claudino et al., 2021).
  • Machine Learning/Optimization: Data-driven circuit learning and MC-VQE workflows leverage XACC's circuit batching and parallel execution features (Claudino et al., 2024).
  • Hybrid Algorithm Prototyping: Flexible kernel definition, runtime parameter sweeps, and expectation value extraction enable swift VQE and other variational workflow implementations.
  • QIR/LLVM Integration: Frontends generating QIR/LLVM IR can target XACC for downstream execution, leveraging the QirCompiler plugin and GlobalMappingAssociator for instruction mapping and custom extension (Wong et al., 2024).

Workflow scripting is accessible via both C++ and Python, with single-line changes to switch between hardware simulators or optimize for specific devices (McCaskey et al., 2018, McCaskey et al., 2019, Claudino et al., 2021).

7. Limitations, Current Challenges, and Prospective Extensions

Current limitations are as follows:

  • Pulse Model Vendor Support: The pulse IR primarily targets IBM OpenPulse; extensions are needed for Rigetti's Quilt and other proprietary models (Nguyen et al., 2020).
  • Scheduler and Noise Model Sophistication: Pulse scheduling is currently a block-shifting heuristic; more advanced dependency-graph schedulers and colored/non-Markovian noise require new plugin development.
  • Circuit-Level Parallelism: Virtualization currently operates at the circuit level, without intra-circuit quantum communication primitives (e.g., distributed entanglement or gate-level slicing) (Claudino et al., 2024).
  • Adaptive Load-Balance and Heterogeneous Ensemble: Future work aims to integrate dynamic workload repartitioning and heterogeneous backend ensembles rated by fidelity and queue time (Claudino et al., 2024).
  • Integration of Distributed Quantum Protocols: The roadmap includes support for distributed quantum programming via standards such as QMPI, enabling more general distributed quantum computing models (Claudino et al., 2024).

The framework advances are targeted at robust, scalable, and extensible quantum software design, easing the deployment of hybrid, device-agnostic, and performance-portable workloads in quantum computational science (McCaskey et al., 2019, Nguyen et al., 2021, Claudino et al., 2021).

Topic to Video (Beta)

No one has generated a video about this topic yet.

Whiteboard

No one has generated a whiteboard explanation for this topic yet.

Follow Topic

Get notified by email when new papers are published related to XACC Framework.