Hardware-Efficient VQE Strategies

• Hardware-efficient VQE is a quantum simulation framework that designs shallow, connectivity-aware variational circuits to operate efficiently on NISQ devices.
• It utilizes adaptive ansatz construction, pulse-level control, and measurement grouping to optimize energy evaluation while mitigating noise.
• Hybrid strategies, including evolutionary algorithms and error mitigation techniques, achieve order-of-magnitude reductions in resource requirements compared to traditional methods.

A Hardware-efficient Variational Quantum Eigensolver (VQE) is a class of quantum algorithms and circuit designs that minimize computational resource overhead—most critically, circuit depth and two-qubit gate count—by tightly tailoring variational ansätze and measurement schemes to the physical constraints and native operations of current quantum hardware. This paradigm departs from chemically-motivated, theoretically expressive ansätze (such as unitary coupled cluster) and instead prioritizes shallow circuits, connectivity-aware entanglement mechanisms, and pulse-level analog control, thereby enabling ground-state estimation of molecular and correlated electronic systems on noisy intermediate-scale quantum (NISQ) devices. Numerous hardware-efficient VQE methodologies have been developed, including gate-free, pulse-optimized state preparation (ctrl-VQE), adaptive sparse ansatz growth (qubit-ADAPT-VQE), cyclic measurement-driven reference expansion (CVQE), photonic and measurement-based architectures, and hybrid quantum-evolutionary construction. These approaches demonstrate order-of-magnitude reductions in circuit depth and CNOT count, robust noise resilience, and scalability to experimentally relevant system sizes.

1. Motivation for Hardware-efficient VQE

The original VQE protocol involves preparing a trial quantum state $$\ket{\psi(\boldsymbol\theta)} = U(\boldsymbol\theta)\ket{\psi_0}$$ with a parameterized circuit $U(\boldsymbol\theta)$, then iteratively minimizing the energy expectation $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$ by combining quantum measurements with classical optimization. However, current NISQ devices are limited by short coherence times ($T_1, T_2$ on the order of tens to hundreds of microseconds), high two-qubit gate infidelities ($\sim 1\%$), restricted connectivity, and substantial readout overhead. Fixed, chemically-motivated ansätze such as UCCSD entail circuit depths and CNOT counts scaling as $O(n^5)$ for $n$ spin-orbitals, quickly exceeding hardware capabilities even for minimal molecules such as LiH.

Hardware-efficient VQE strategies address this bottleneck by:

• Reducing circuit depth through ansatz designs that exploit native hardware gates or analog device-level controls.
• Leveraging device symmetries (e.g., Z$_2$ tapering) and connectivity to eliminate or compile away superfluous gates.
• Adapting the structure (and even the variational degrees of freedom) of the ansatz to the physical system and measurement feedback during runtime, circumventing the need for deep operator pools and large parameter spaces (Kandala et al., 2017, Tang et al., 2019, Bentellis et al., 2023).
• Using measurement post-processing, cluster decomposition, or hybrid quantum-classical representations to split difficult computations across multiple, shallower subcircuits (Zhang et al., 2021).
• Directly optimizing physical control fields rather than discrete quantum gates (Meitei et al., 2020).

The net result is an empirical and often an order-of-magnitude reduction in total quantum resource requirements per energy evaluation.

2. Circuit-level and Pulse-level Hardware-efficiency

Hardware-efficient ansatz circuits typically alternate layers of parameterized single-qubit rotations $U^{q,l}(\theta)$ with native entangling operations $U_\text{ENT}$. For superconducting architectures, single-qubit gates are $U(\boldsymbol\theta)$0/$U(\boldsymbol\theta)$1 rotations and entanglers are realized via cross-resonance or CZ-type gates along physical couplers. The circuit

$U(\boldsymbol\theta)$2

has parameter count $U(\boldsymbol\theta)$3 for ZXZ single-qubit decomposition per layer (Kandala et al., 2017, Keijzer et al., 2021). Optimal $U(\boldsymbol\theta)$4 is empirically found to be 1–2 for $U(\boldsymbol\theta)$5 on current devices.

Device-level pulse-based VQE (ctrl-VQE) abandons the gate-based circuit model entirely. Instead, the state is prepared by evolving under a time-dependent Hamiltonian $U(\boldsymbol\theta)$6 where $U(\boldsymbol\theta)$7 parameterizes pulse envelopes and frequencies. The target state is:

$U(\boldsymbol\theta)$8

with pulse shapes (e.g., piecewise-constant) chosen for expressivity versus low parameter count and subject to hardware constraints (max drive amplitude, frequency bandwidth). Gradients are computed via GRAPE-style adjoint equations (Meitei et al., 2020).

Both approaches minimize the number of two-qubit gates and total analog runtime—crucial for fitting within $U(\boldsymbol\theta)$9, $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$0 budgets and suppressing cumulative gate errors.

3. Adaptive and Evolutionary Hardware-efficient Ansatz Construction

Several methodologies adaptively build up hardware-efficient ansätze, targeting expressivity only where needed:

• qubit-ADAPT-VQE grows a product of parameterized Pauli exponentials $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$1, selecting $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$2 greedily from a minimal (even $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$3 element) pool of Pauli strings of length $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$4 whose completeness is guaranteed (empirically for $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$5). Compared to fermionic-ADAPT, this reduces CNOT count by $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$6 and circuit depth by an order of magnitude, with the measurement overhead scaling only linearly in $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$7 (Tang et al., 2019).
• MoG-VQE and EVQE employ multiobjective genetic strategies (NSGA-II, CMA-ES) or evolutionary programming to search over both ansatz circuit topology and parameter space, explicitly optimizing the tradeoff between energy error and two-qubit gate count. This approach can yield circuits for, e.g., 12-qubit LiH, that reach chemical precision with only 12 CNOTs—a tenfold resource reduction over standard hardware-efficient layers (Chivilikhin et al., 2020, Rattew et al., 2019).
• ClusterVQE partitions the qubit register into mutually low-entangled clusters using mutual information, dresses the Hamiltonian with a compact set of inter-cluster couplings, and distributes variational minimization to shallow, cluster-local subcircuits. The global energy is assembled via a product formula, and local gradients require no ancilla qubits. This allows for independent optimization and measurement per cluster, significantly reducing circuit depth and hardware width at the expense of modest classical pre-processing (Zhang et al., 2021).

These approaches are robust to noise and amenable to classical error mitigation and shot-frugal optimizers such as SPSA.

4. Measurement Strategies, Optimizer Choices, and Error Mitigation

Hardware-efficient VQE protocols employ several techniques to reduce measurement overhead and mitigate error:

• Measurement grouping: Grouping commuting Pauli terms into tensor-product bases allows for simultaneous estimation, reducing the total number of distinct measurement circuits required (Kandala et al., 2017).
• Shot-frugal optimization: Stochastic optimizers such as SPSA or classical gradient descent with analytic parameter-shift rules expose only $$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$8–$$E(\boldsymbol\theta) = \bra{\psi(\boldsymbol\theta)} H \ket{\psi(\boldsymbol\theta)}$$9 circuit calls per iteration, regardless of parameter count, and are thus suitable for real NISQ experiments (Kandala et al., 2017, Belaloui et al., 2024).
• Hamiltonian-aware natural gradient: Quantum natural gradient (QNG) enhances optimizer convergence, but its standard implementation typically requires $T_1, T_2$0 extra measurements for the Fubini-Study metric. Hamiltonian-aware QNG (H-QNG) restricts this to the subspace spanned by Hamiltonian terms, reducing quantum cost back to $T_1, T_2$1 (same as vanilla gradient) while retaining reparameterization invariance and efficient convergence (Shi et al., 18 Nov 2025).
• Error mitigation: Zero-noise extrapolation (ZNE), measurement-error correction, and techniques such as TREX (twirled readout error extinction) are deployed to further reduce bias below the chemical-accuracy threshold. These strategies, combined with circuit depth minimization, enable reliable VQE performance even under realistic noise models (Pandey et al., 2024, Belaloui et al., 2024).

5. Specialized Hardware Platforms and Architectures

The hardware-efficient VQE concept is adapted to various quantum hardware topologies:

• Superconducting qubits: Gate-based hardware-efficient and pulse-level ctrl-VQE exploit native cross-resonance or CZ entanglers, frequency-tunable pulses, and coherence-time-constrained circuit design (Meitei et al., 2020, Kandala et al., 2017).
• Trapped ions: All-to-all connectivity enables full ring or complete-bipartite entanglers with minimal circuit depth, as demonstrated for VQE benchmarking on H$T_1, T_2$2 (Bentellis et al., 2023).
• Photonic implementations: VQE is implemented by encoding qubits/ qudits into optical modes and programming shallow circuits of beam splitters and phase shifters. Linear-optical interferometers support parameterized SU(2) transformations, and circuit depth is minimized using mesh decompositions and parallel phase layers. Error mitigation explores photonic-specific loss/phase calibration and zero-noise extrapolation (Hu et al., 22 Dec 2025).
• Measurement-based (MBQC) VQE: Shifts circuit depth into the overhead of cluster-state preparation and measurement. Deterministic flow-ensured MBVQE ansätze replace sequential entangler layers with one-shot measurement rounds on higher-dimensional resource states, offering constant-depth realization at increased qubit cost (Schroeder et al., 2023).

Table: Example Resource Metrics (selective, as reported in data)

Molecule	Method	Qubits	2Q Gates / Depth	Error (Ha)	Ref
H$T_1, T_2$3	ctrl-VQE	2	pulse: 9 ns	<3e-5	(Meitei et al., 2020)
LiH	qubit-ADAPT-VQE	12	1,020 CNOTs, O(100)p	<1.6e-3	(Tang et al., 2019)
LiH	MoG-VQE	12	12 CNOTs (Pareto opt.)	≤1e-3	(Chivilikhin et al., 2020)
BeH$T_1, T_2$4	ClusterVQE	10	2$T_1, T_2$55-qb clusters	10$T_1, T_2$6–10$T_1, T_2$7	(Zhang et al., 2021)
BeH$T_1, T_2$8	HEA + SPSA	4	21-depth, 3 CZ	$T_1, T_2$92e-2 (noisy)	(Belaloui et al., 2024)

6. Scalability, Performance, and Limitations

Reported studies consistently demonstrate that hardware-efficient VQE methods:

• Attain chemical accuracy ($\sim 1\%$0 Ha) for benchmark molecules using circuits several times shallower, and CNOT counts reduced by $\sim 1\%$1 or more, compared to conventional ansätze.
• Remain within device coherence times by restricting total state-preparation time, e.g., $\sim 1\%$2 ns for ctrl-VQE on LiH ($\sim 1\%$3s) (Meitei et al., 2020).
• Are robust to parameter or initial-state choices, noise sources (readout, gate, decoherence), and demonstrate graceful degradation under finite sampling and realistic error rates (Belaloui et al., 2024, Wang et al., 2023).
• May shift computational burden to the classical optimization and measurement scheduling layers, but the quantum resource savings are substantial.

Limitations include:

• Expressivity limitations at very low depth may cause convergence to sub-optimal solutions for strongly correlated systems if the ansatz or operator pools are not adaptively expanded.
• Adaptive schemes (e.g., ADAPT-based or evolutionary methods) introduce significant classical and measurement overhead, but their quantum depth/width requirements remain tractable for NISQ-era devices.
• Advanced compilation and optimizer choices remain critical; suboptimal mapping or overparameterization may restore barren-plateau phenomena.

7. Outlook and Future Directions

Hardware-efficient VQE continues to evolve:

• Pulse-level control and optimal quantum control theory (GRAPE, CRAB) are expanding the reach of gate-free protocols, with direct applicability to larger molecular active spaces, as well as to alternative hardware platforms such as trapped ions and spin qubits (Meitei et al., 2020).
• Adaptive measurement-driven reference state growth, as in CVQE, introduces quantum-chemical multireference features natively into hardware-efficient frameworks, systematically evading barren plateaus and achieving superior accuracy-resource tradeoffs (Zhang et al., 16 Sep 2025).
• Integration of classical machine learning (e.g., neural postprocessing in VQNHE) further enhances expressivity at shallow quantum depth (Zhang et al., 2021).
• Measurement-based, cluster-state, and photonic VQE architectures offer a path to constant-depth implementations where circuit depth, not register width, is the primary constraint (Schroeder et al., 2023, Hu et al., 22 Dec 2025).
• Further innovations in error mitigation, resource-frugal optimization, and hybrid quantum–classical hybridization are likely to expand the scale and reliability of hardware-efficient VQE, facilitating quantum advantage once classical simulation becomes infeasible for $\sim 1\%$4–$\sim 1\%$5 qubits.

Hardware-efficient VQE thus encompasses a broad suite of strategies jointly exploiting physical hardware features, problem structure, and algorithmic adaptivity to enable practical and scalable quantum simulation in the NISQ era.