Hybrid QHPC Workflows

• Hybrid Quantum–HPC workflows are integrated computational paradigms combining quantum and classical computing to tackle complex scientific and industrial problems.
• They utilize multi-layered software stacks, resource management, and dynamic scheduling to optimize performance across NISQ processors and HPC systems.
• Applications span quantum simulation, optimization, and machine learning, demonstrating significant speedups and scalable performance improvements.

Hybrid Quantum–High Performance Computing (QHPC) workflows are computational paradigms in which quantum computing resources (quantum processing units, QPUs or their simulators) and classical high-performance computing (HPC) infrastructures are orchestrated to solve scientific, engineering, and industrial problems by exploiting the complementary strengths of both types of hardware. These workflows typically comprise quantum kernels interleaved with classical tasks, leverage task and data parallelism, and rely on sophisticated resource management and workflow automation to overcome architectural, scalability, and performance barriers associated with current noisy intermediate-scale quantum (NISQ) processors and large-scale classical clusters.

1. Software Stack Architectures for QHPC Integration

Recent developments in hybrid QHPC workflow platforms emphasize a multi-layered, hardware-agnostic software stack that abstracts classical and quantum resources while supporting interoperability with existing HPC and quantum programming environments (Shehata et al., 3 Mar 2025, Burgholzer et al., 2 Sep 2025). These stacks generally consist of:

• Application Layer: Encapsulating user-developed hybrid quantum-classical applications, typically written in Python, C++, or HPC languages, and integrating quantum kernels via popular frameworks such as Qiskit or PennyLane.
• Quantum Programming Interface (QPI): An application-facing API standardizing calls for device management, task submission, and result retrieval, abstracting away the details of quantum hardware and middleware.
• Quantum Platform Manager (QPM): The hardware-facing layer, which orchestrates communication with quantum backends and simulators using a plugin architecture to accommodate diverse quantum technologies (e.g., superconducting, neutral atom, trapped ion).
• Quantum Toolchains and Compilers: Modules for transpiling high-level circuit representations (QIR, OpenQASM) into hardware-specific instructions, performing protocol- and hardware-aware optimizations, and managing dynamic calibration or mapping constraints.
• Resource Managers and Schedulers: Seamless integration with established HPC schedulers such as Slurm, enabling both simultaneous (co-scheduled) and interleaved allocation of classical and quantum resources, and supporting dynamic queues, credit-bound gating, and heterogeneous job types (Sitdikov et al., 11 Jun 2025, Mantha et al., 24 Dec 2024).

The layers are designed for modularity and extensibility, facilitating code portability, optimizing execution pipelines for both NISQ and fault-tolerant hardware, and reducing code adaptations when migrating across quantum and HPC platforms.

2. Resource Management, Orchestration, and Scheduling

Efficient utilization of scarce and heterogeneous resources is a central challenge in QHPC workflows. Several platforms (such as Pilot-Quantum (Mantha et al., 24 Dec 2024), Quantum Framework (Chundury et al., 17 Sep 2025), and QMIO (Cacheiro et al., 25 May 2025)) employ resource and workload orchestration techniques, including:

• Pilot Abstraction: Decoupling resource allocation (via 'pilots' or container jobs) from task assignment. Pilots reserve a resource capacity—comprising GPUs, CPUs, and QPUs—and dynamically schedule incoming quantum/classical tasks to maximize throughput and utilization.
• Unified Scheduling via Existing Resource Managers: Registration of quantum devices as generic resources (GRES, e.g., "QPU") within Slurm or other batch systems (Sitdikov et al., 11 Jun 2025). Plugins and middleware manage resource acquisition, credential injection, and exclusive "locking" to ensure isolation, job integrity, and secure lifecycle control.
• Dynamic and Malleable Resource Allocation: Techniques for releasing and reacquiring classical resources during quantum-dominated computational phases, thereby minimizing idle resource consumption (measured in node-seconds) and enabling interleaved or concurrent hybrid job execution (Rocco et al., 6 Aug 2025).
• Asynchronous and Distributed Task Execution: Integration with stateful task engines (e.g., Ray, Dask, MPI, CUDA) to execute ensembles of quantum circuit simulations, circuit cutting subproblems, or quantum machine learning (QML) tasks in parallel across multiple nodes, often coordinated with batch and streaming paradigms (Mantha et al., 24 Dec 2024, Chen et al., 9 Mar 2024).

These systems provide robust foundations for hybrid workflows requiring both rapid feedback loops (e.g., in variational algorithms) and efficient scaling to large batch or ensemble calculations.

3. Programming Models and Workflow Abstractions

Programming models in QHPC workflows emphasize modularity, composability, and abstract task specification. Key features and components include:

• Composable, Object-Oriented Workflows: As in the QuaSiMo library (Nguyen et al., 2021), abstract base classes encapsulate hybrid workflow recipes, system models (Hamiltonians, observables), circuit generators, and cost function evaluators. Developers specialize workflows through inheritance, dynamic composition, and extension points (e.g., plugging in different ansätze, optimizers, or validation procedures).
• Hybrid Workflow Formalism: A hybrid workflow is modeled as a tuple $W = (T, Q, E, D, f)$, where T are classical tasks, Q are quantum tasks, E encodes data/control dependencies, D are dynamic decision nodes, and f maps classical tasks to possible quantum alternatives (Cranganore et al., 16 Apr 2024). Such formalization enables automation, runtime adaptive execution (e.g., based on hardware availability or fidelity), and integration with existing scientific workflow management systems.
• Task Parallelism in Variational and Circuit Cutting Algorithms: Support for decomposing workloads—e.g., parameter sweeps in QAOA/VQE, batch execution in QML, and fragment-based circuit cutting—by orchestrating independent (quantum or classical) tasks for concurrent evaluation and subsequent aggregation (Mantha et al., 24 Dec 2024, Asadi et al., 4 Mar 2024, Chundury et al., 17 Sep 2025).
• Unified APIs for Multiple Backends: Middleware such as QFw (Chundury et al., 17 Sep 2025) and MQSS (Burgholzer et al., 2 Sep 2025) enable backend-agnostic programming; users may select execution backends (state vector simulators, tensor networks, hardware QPUs, or cloud platforms) through configuration, without modifying workflow logic.
• Dynamic Hardware Abstraction: Introduction of platform-agnostic interfaces (e.g., QDMI in MQSS (Burgholzer et al., 2 Sep 2025), QRMI in Slurm (Sitdikov et al., 11 Jun 2025)) ensures consistent interaction patterns across technological modalities (superconducting, neutral atom, ion-trap, etc.), supports real-time hardware property queries, and allows session and job management for multi-user, multi-device environments.

4. Performance, Scaling, and Benchmarking

Hybrid QHPC workflows must manage significant disparities in throughput, fidelity, and latency between classical simulation, quantum emulation, and execution on NISQ devices. Recently reported results include:

• Accelerated Simulation: PennyLane Lightning suite demonstrates simulation of circuits up to 41 qubits on multi-node GPU clusters, supported by explicit SIMD vectorization, multi-threading, and MPI/CUDA parallelism (Asadi et al., 4 Mar 2024). Speedups of up to 10× over classical CPU-only simulations are reported for quantum phase transition prediction, with circuit cutting used to reduce large circuits to tractable subproblems (Chen et al., 9 Mar 2024).
• Task Throughput: Pilot-Quantum achieves up to 87× speedup for GPU-accelerated ensemble simulations and 3.5× speedup in circuit cutting workloads compared to serial execution (Mantha et al., 24 Dec 2024). QML workflows (e.g., for CIFAR-10 classification) report 15× scaling efficiency on 32-node clusters.
• Resource Efficiency: Malleability-based allocation in hybrid clustering workflows reduces total node–seconds and wait time relative to both static and workflow-based strategies, particularly under contention (Rocco et al., 6 Aug 2025).
• Backend Selection: The choice of simulator or hardware backend is critical: Qiskit Aer's MPS excels in low-entanglement Ising models, whereas NWQ-Sim effectively handles highly entangled or distributed optmization subproblems (Chundury et al., 17 Sep 2025). These findings underscore the necessity for dynamic backend selection based on workload structure.
• Reliability and Reproducibility: The hardware maturity probe, based on harmonic analysis of QAOA cost landscapes, provides analytic upper bounds for stationary points and enables grid-based benchmarking of quantum device repeatability and fidelity, directly tying hardware errors to application-level performance (Onah et al., 14 Sep 2025).

5. Key Applications and Workflow Patterns

QHPC workflows are applied to a broad range of domains, characterized by hybrid partitioning of computational workloads:

Application Area	Hybrid Partitioning Scheme	Example Workflows/Benchmarks
Quantum simulation (chemistry, spin models)	Quantum kernels (variational circuits, Trotterized evolution) on QPU/sim; classical optimization, observable processing on HPC	VQE for molecular systems, dynamical Heisenberg evolution, QITE for TFIM (Nguyen et al., 2021, Burgholzer et al., 2 Sep 2025, Asadi et al., 4 Mar 2024, Mantha et al., 24 Dec 2024)
Quantum optimization (QAOA, QUBO)	QUBO or MaxCut problem mapping to quantum subroutines; classical job orchestration	DQAOA subproblem concurrency, QAOA on star graphs, QUBO-based clustering (Mantha et al., 24 Dec 2024, Chundury et al., 17 Sep 2025, Rocco et al., 6 Aug 2025)
Quantum machine learning	Classical pre/postprocessing and gradient optimization; variational quantum classifiers	CIFAR-10 QML pipelines, hybrid CNN-QCNN models, image compression/classification (Chen et al., 9 Mar 2024, Mantha et al., 24 Dec 2024, Bieberich et al., 10 Jul 2024)
Circuit cutting and large-scale simulation	Partitioning of baseline circuits into subcircuits amenable to existing hardware/sim	2,100–45,000 subexperiment orchestration for phase transition circuits, batched execution on GPU clusters (Mantha et al., 24 Dec 2024, Asadi et al., 4 Mar 2024, Chen et al., 9 Mar 2024)
Industrial/scientific benchmarking and validation	Analytic workflow embedding standardized cost-function oracles for hardware maturity	p=1 QAOA cost landscape analysis, MaxCut energy gap benchmarks, reliability evaluation with run-to-failure sampling (Onah et al., 14 Sep 2025, Rocco et al., 6 Aug 2025, Mantha et al., 24 Dec 2024, Burgholzer et al., 2 Sep 2025)

This application diversity is supported by automatic workflow transformation, decision nodes mapping classical tasks to quantum alternatives, and flexible interfacing with heterogeneous quantum backends.

6. Future Directions, Challenges, and Open Problems

Despite substantial progress, QHPC workflows continue to face several critical challenges:

• Scalability and Overhead Mitigation: Efficient scheduling and resource allocation must contend with hardware scarcity, long communication latencies, and overheads arising from context switches between classical and quantum phases (Rocco et al., 6 Aug 2025, Shehata et al., 3 Mar 2025).
• Hardware Diversity and Standardization: Sustaining technology-agnostic interfaces as new quantum modalities emerge (including extensions for mid-circuit measurements, error correction, and pulse-level control) remains a key development priority (Burity et al., 9 Jul 2025, Burgholzer et al., 2 Sep 2025, Elsharkawy et al., 26 Jul 2024).
• Performance Portability: Ensuring that high-level workflows remain portable and performant across changing hardware, simulators, and workflow managers depends on robust plugin architectures and standard IRs such as QIR (Shehata et al., 3 Mar 2025, Burgholzer et al., 2 Sep 2025).
• Reproducibility, Verification, and Benchmarking: Hardware maturity probes, analytic stationary point analysis, and run-to-failure testing deliver practical tools for systematic evaluation of quantum device reliability within QHPC pipelines (Onah et al., 14 Sep 2025).
• Automated Mapping and Workflow Optimization: Development of ML-driven compilers, auto-tuners, and runtime schedulers to dynamically adapt quantum/classical mappings, circuit compilation, and resource allocation is ongoing (Burgholzer et al., 2 Sep 2025, Cranganore et al., 16 Apr 2024).

Anticipated future advances include tighter integration (co-location) of QPUs in supercomputing centers (Schüsler et al., 26 Mar 2024, Cacheiro et al., 25 May 2025), expanded support for live optimization of hybrid applications, and comprehensive lifecycle management for evolving workloads and user profiles (Beck et al., 28 Aug 2024, Mantha et al., 24 Dec 2024).

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Hybrid Quantum–HPC workflows thus comprise a maturing domain grounded in modular, extensible software stacks, efficient scheduling, robust workflow abstractions, and diverse science applications. Their rapid evolution is expected to underpin the practical emergence of quantum advantage in scientific and engineering computation over the coming decade.