Takum Number Format

• Takum number format is a machine number system using tapered precision with a hybrid regime–characteristic–fraction layout to achieve both high precision near unity and a large dynamic range.
• It supports both logarithmic (LNS) and linear modes, enabling efficient arithmetic operations and hardware implementations with reduced LUT utilization.
• Its design overcomes limitations of IEEE 754 and posit formats by ensuring monotonic encoding, bitwise reciprocal closure, and stable error bounds for scientific applications.

Takum number format is a family of tapered-precision machine number representations developed to address limitations of conventional IEEE 754 floating-point and posit formats. Introduced as a theoretically grounded, versatile, and hardware-efficient system, Takum arithmetic leverages a hybrid regime–characteristic–fraction bit layout to provide both uniform high precision near unity and an asymptotically stable, large dynamic range. Takum exists in two main variants: the "logarithmic" (LNS) and "^^^^1^^^^" (floating-point style) forms, both exhibiting distinctive features in encoding, arithmetic operations, and practical numerical performance (Hunhold, 2024, Hunhold, 2024, Hunhold, 2024).

1. Structural Definition and Bit-Level Encoding

Takum numbers partition an $n$-bit word into key fields enabling precise control of dynamic range and precision (Hunhold, 2024, Hunhold, 2024, Hunhold, 2024):

• Sign bit ($S$): 1 bit.
• Direction bit ($D$): 1 bit, encoding the sign of the regime.
• Regime ($R$): 3 bits, encoding a run-length and thereby determining the regime's value $r$.
• Characteristic ($C$): $r$ bits, forming an unsigned value to be interpreted with the regime.
• Fraction/Mantissa ($F$ or $M$): Remaining $p = n-5-r$ bits, determining fine-scale precision.

The bit layout is, from most to least significant: $F$1

Decoding proceeds by:

1. Compute $S$0 from regime bits and $S$1:
   • If $S$2, $S$3
   • If $S$4, $S$5
2. Characteristic $S$6 is computed:
   • $S$7 if $S$8
   • $S$9 if $D$0
3. Fraction/mantissa $D$1.
4. The represented value in ^^^^1^^^^ (floating-point) mode:

$D$2

In LNS mode: $D$3, with $D$4.

Special encodings:

• All-zero: zero
• All "1"s in non-sign bits with $D$5: NaR (Not a Real)

2. Exponent Tapering and Dynamic Range

Takum's tapered-precision design enables exponential scaling of the dynamic range with bit width, with regime–characteristic structure ensuring exponent coverage from $D$6 to $D$7 for $D$8 (max). The key innovation is a flat regime-to-exponent mapping, in contrast to posit’s exponentially growing regime cost:

• For $D$9, the dynamic range in ^^^^1^^^^ mode is $R$0 to $R$1; in LNS, $R$2 to $R$3, with $R$4 (Hunhold, 2024).
• Additional bits beyond $R$5 exclusively increase the fraction length, thus precision.
• Tapered-precision admits fewer fraction bits at high $R$6 but avoids the regime field "explosion" of posit, yielding a dynamic range that saturates early and is stable as $R$7 grows (Hunhold, 2024, Hunhold, 2024).

$R$8	Dynamic range (Takum, approx)	Mantissa min width
8	$R$9	$r$0 bits
16	$r$1	$r$2 bits
32	$r$3	$r$4 bits

Dynamic range and precision trade-off: Takum reduces local fraction precision near $r$5 compared to posit, but accrues large gains for $r$6 or $r$7—a key advantage for scientific computing and general-purpose machine arithmetic (Hunhold, 2024, Hunhold et al., 2024).

3. Encoding, Decoding, and Arithmetic

Both encoding and decoding are combinational and parameterized by $r$8. The canonical decoder (^^^^1^^^^ mode):

1. Read $r$9 as described.
2. Compute $C$0 as above.
3. Recover $C$1 by $C$2.

Arithmetic operations, exploiting Takum's regime structure and monotonic two's-complement ordering, include:

• Addition/Subtraction: Align exponents, perform operation on mantissas/fractions, re-encode.
• Multiplication/Division: Exponentiates add/subtract; mantissas/fractions are multiplied/divided, normalized.
• Reciprocal: Bitwise inversion plus one for nonzero codes (Hunhold, 2024).
• Rounding: Round-to-nearest, ties-to-even, as in IEEE-754 (Hunhold, 2024, Hunhold et al., 2024).

The LNS (logarithmic) variant enables addition/subtraction via Gaussian logarithms and supports perfect reciprocation via a simple bitwise operation (Hunhold, 2024).

4. Hardware Implementation and ISA Unification

Takum arithmetic is directly amenable to efficient FPGA and prospective ASIC realization, featuring:

• Fixed 12-bit "head" (sign, direction, regime, 7-bit characteristic) with variable-length fraction (Hunhold, 2024).
• Purely combinational encoder/decoder, latency scaling primarily with the first 12 MSBs; e.g., 3.19ns at $C$3, 3.66ns at $C$4.
• Dramatically reduced LUT utilization compared to posit codecs (22 LUTs for $C$5, 125 LUTs for $C$6) (Hunhold, 2024).
• Unique benefit in ISA contexts: One "Tn" family replaces a proliferation of ad hoc low-precision floating-point encodings in SIMD extensions (e.g., AVX10.2), unifying opcodes, decoder logic, and achieving identical vector FP group throughput and latency (Hunhold, 18 Mar 2025).
• No gradual underflow by default, though it is possible to assign out-of-band codes for NaN.

Format	Decoder Latency (n=8, ns)	LUT Usage (n=8)
Takum	3.19	22
Posit	3.37	15

5. Comparative Performance in Mathematical and Scientific Kernels

Takum has been evaluated in direct solvers (LU, QR), iterative refinement, GMRES, Arnoldi eigensolvers, and spectral methods (FFT/STFT):

• In sparse direct solvers, ^^^^1^^^^ takum matches or outperforms IEEE 754 and posit at fixed $C$7, especially at low precisions (8–16 bit), with superior stability and reduced iteration counts in indirect solvers (Hunhold et al., 2024).
• In implicitly restarted Arnoldi (eigenvalues/eigenvectors on large sparse matrices), Takum64 yields up to an order-of-magnitude lower error than Float64; Takum16 outperforms Float16 and bfloat16 (Hunhold et al., 29 Apr 2025).
• Spectral methods: Takum's dynamic range enables finite results in low-precision FFT and PDE solution contexts where OFP8 and bfloat16 often fail; at 16 bits, takum closely approaches float16 performance, surpasses bfloat16, and stabilizes the fail-over-prone behavior seen in posit (Hunhold et al., 29 Apr 2025).
• Integer-representation: Takum encodes large consecutive integers more efficiently than posit and matches or exceeds IEEE 754 as $C$8 increases, with $C$9 (Hunhold, 2024).

6. Distinguishing Properties and Theoretical Analysis

Takum arithmetic exhibits a set of formal attributes distinguishing it within the machine number ecosystem (Hunhold, 2024, Hunhold, 2024):

• Monotonicity: Codewords are strictly increasing in two's-complement integer order, permitting direct comparison operations.
• Perfect Reciprocal Closure: Every nonzero takum encodes its reciprocal via simple bitwise negation (and increment)—a property not shared by posits.
• Regime Efficiency: Only 3 bits are reserved for the regime in the canonical forms; regime-to-characteristic mapping is LUT-driven, eliminating the long unary regime runs of posit.
• Uniform Error Bounds: For $r$0 bits of fraction, worst-case relative error is at most $r$1, outperforming IEEE-754 binary floats' $r$2 for the same $r$3 (Hunhold, 2024).
• No subnormal regime explosion: Precision falls gently as $r$4 increases, unlike posit whose fraction field vanishes at large exponents.

Property	IEEE-754	Posit	Takum
Reciprocation closure	No	No (not guaranteed)	Yes (bitwise inversion+1)
Monotonicity	Yes	No (prefix regime)	Yes (two's-complement order)
Consecutive integer T	$r$5	$r$6	$r$7
Dynamic range (16-bit)	$r$8	Useed limited	$r$9

7. Limitations and Ongoing Development

Several limitations and open areas are explicitly noted:

• Takum is relatively new and requires further software and compiler ecosystem support (Hunhold, 18 Mar 2025).
• The hardware encoding does not by default support IEEE 754-style NaN or gradual underflow, though these can be assigned as special out-of-band codes if desired (Hunhold, 18 Mar 2025, Hunhold, 2024).
• While the dynamic range is constant beyond $F$0, fraction width only grows ^^^^1^^^^ly, thus Takum can sacrifice local precision near unity for greatly expanded exponent coverage.
• Domain-specific tuning of the regime–characteristic mapping (e.g., more than 3 regime bits) remains a possibility for special-purpose implementations, though the canonical format is now fixed with 3 (Hunhold, 2024).

Future work includes more extensive application benchmarking, detailed hardware cost modelling, exploration of floating-point exception semantics, and integration into RISC-V and ARM vector extensions (Hunhold, 18 Mar 2025, Hunhold, 2024).

---

References:

• (Hunhold, 2024) "Beating Posits at Their Own Game: Takum Arithmetic"
• (Hunhold, 2024) "Integer Representations in IEEE 754, Posit, and Takum Arithmetics"
• (Hunhold, 2024) "Design and Implementation of a Takum Arithmetic Hardware Codec in VHDL"
• (Hunhold et al., 2024) "Evaluation of Bfloat16, Posit, and Takum Arithmetics in Sparse Linear Solvers"
• (Hunhold et al., 29 Apr 2025) "Numerical Performance of the Implicitly Restarted Arnoldi Method in OFP8, Bfloat16, Posit, and Takum Arithmetics"
• (Hunhold et al., 29 Apr 2025) "Spectral Methods via FFTs in Emerging Machine Number Formats"
• (Hunhold, 18 Mar 2025) "Streamlining SIMD ISA Extensions with Takum Arithmetic: A Case Study on Intel AVX10.2"