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Swap-Enhanced Ansatz Design

Updated 7 July 2026
  • The swap-enhanced ansatz is a variational circuit design that interleaves optimized SWAP networks with hardware-local entangling layers to dynamically create effective all-to-all connectivity.
  • It improves trainability and resource efficiency by co-designing routing schedules with ansatz layers to directly entangle distant logical qubits.
  • This architecture, extendable to fermionic circuits and exchange-native gate families, demonstrates promising numerical performance on constrained quantum devices.

Swap-enhanced ansatz designates, in the variational-circuit literature, a class of parametrized quantum circuits in which local entangling layers are systematically interleaved with a precomputed SWAP network so that sparse hardware connectivity is converted into time-multiplexed effective all-to-all interaction opportunities without abandoning hardware awareness (Parella-Dilmé, 31 Jul 2025). In the most explicit usage, the routing schedule is co-designed with the ansatz itself rather than inserted as a compilation afterthought, with the goal of improving trainability and resource efficiency on constrained devices. Closely related usages extend the idea to fermionic circuits compiled with Majorana swap networks (Fisher et al., 9 Sep 2025) and to exchange-based gate families in which SWAP\sqrt{\mathrm{SWAP}} or more general partial-SWAP operations become native variational primitives (Burkat et al., 30 Mar 2026).

1. Definition and terminological scope

The central meaning of the term is architectural rather than merely gate-theoretic. A swap-enhanced ansatz is not just an ansatz that contains SWAP gates; it is a layered construction in which SWAP structure is embedded so that, over successive layers, logical qubits that are distant in the hardware graph are brought into direct contact and can be entangled by the same local physical gate set (Parella-Dilmé, 31 Jul 2025). The method is therefore a co-design of routing and variational structure.

This usage is not uniform across the literature. In arbitrary-connectivity VQE, the phrase refers to interleaving hardware-local entanglers with an optimized SWAP network (Parella-Dilmé, 31 Jul 2025). In fermionic VQE, it denotes circuit realizations in which Majorana or orbital permutations are fused with UCC-style excitation layers to reduce depth and two-qubit count (Fisher et al., 9 Sep 2025). By contrast, several papers with “swap” in the title are not ansatz papers in the variational sense: work on swap Monte Carlo concerns nonphysical particle-size exchange moves in glass simulations (Shiraishi et al., 2024), replica-theoretic work studies a swap-enhanced molecular ansatz for glass formers rather than quantum circuits (Ikeda et al., 2017), and moiré-enhanced swap spectroscopy uses SWAP-like dynamics as a sensing primitive for non-Markovian noise rather than as a variational architecture (Niu et al., 2019).

Context Meaning of “swap-enhanced” Representative paper
Variational circuits on constrained graphs Entangling layers interleaved with optimized SWAP networks (Parella-Dilmé, 31 Jul 2025)
Fermionic VQE UCC-style circuits compactified by Majorana or orbital swap structure (Fisher et al., 9 Sep 2025)
Exchange-native gate families SWAP\sqrt{\mathrm{SWAP}} or partial-SWAP used as native entangling primitives (Burkat et al., 30 Mar 2026)
Non-ansatz usages Swap Monte Carlo, replica ansatz, or swap spectroscopy (Shiraishi et al., 2024, Ikeda et al., 2017, Niu et al., 2019)

A persistent misconception is that any ansatz containing SWAP gates is swap-enhanced. The more precise usage requires that SWAPs alter the variational architecture itself by changing the logical-to-physical mapping over time, thereby modifying which logical pairs are directly entangled at each layer (Parella-Dilmé, 31 Jul 2025).

2. Routing formalism on arbitrary connectivity graphs

In the arbitrary-connectivity formulation, the hardware is represented as a labelled undirected graph

G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),

where V={vi}i=1nV=\{v_i\}_{i=1}^n are physical sites, E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\} are hardware edges, and L:VL\mathcal{L}:V\to L is a bijective labelling of physical vertices by logical qubits L={1,,n}L=\{1,\dots,n\} (Parella-Dilmé, 31 Jul 2025). A SWAP along an edge ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E is treated as graph relabelling, so the topology remains fixed while the logical labels move.

A depth-1 swap layer is a composition of commuting swaps on disjoint edges,

R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,

and a depth-kk swap block is

SWAP\sqrt{\mathrm{SWAP}}0

The emphasis on SWAP\sqrt{\mathrm{SWAP}}1 reflects a structural point: after a single swap layer, swapped qubits remain neighbors, whereas deeper routing produces new adjacency opportunities.

The optimization is governed by a history matrix SWAP\sqrt{\mathrm{SWAP}}2. At iteration SWAP\sqrt{\mathrm{SWAP}}3, SWAP\sqrt{\mathrm{SWAP}}4 means logical pair SWAP\sqrt{\mathrm{SWAP}}5 has already been adjacent at some step SWAP\sqrt{\mathrm{SWAP}}6, while SWAP\sqrt{\mathrm{SWAP}}7 means it has not. Initially, neighboring logical pairs are marked as already visited. The routing cost is

SWAP\sqrt{\mathrm{SWAP}}8

with SWAP\sqrt{\mathrm{SWAP}}9 the shortest-path distance between labels G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),0 and G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),1 in the current labelled graph. This objective rewards both immediate creation of new adjacencies and progressive shortening of distances among still-unvisited pairs.

Candidate swap blocks are optimized by simulated annealing. The algorithm iteratively updates a candidate list of G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),2 swap layers by randomly adding or removing allowable disjoint edges within a selected layer, subject to layerwise vertex disjointness. The ideal termination condition is

G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),3

which certifies that every logical qubit pair has become adjacent at least once. The resulting protocol is the operational meaning of effective all-to-all connectivity in this framework. No optimality theorem or approximation ratio is proved; for larger systems, the same machinery can be stopped early to yield a partial swap network rather than a complete one (Parella-Dilmé, 31 Jul 2025).

3. Embedding swap structure into layered ansätze

Once a routing schedule is obtained, the ansatz is built by interleaving entangling layers with swap blocks. In abstract form, a swap-enhanced ansatz with G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),4 entangling layers is written as

G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),5

where G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),6 is the logical-to-physical permutation induced after the first G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),7 swap blocks (Parella-Dilmé, 31 Jul 2025). The essential point is that the physical edge pattern of the entangler layer may remain unchanged while the logical pairs acted upon by that same pattern change from layer to layer.

For spin-system benchmarks, the base circuit is the CRy-HEA. Each two-qubit entangling gate G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),8 consists of G=(V,E,L),\mathcal{G}=(V,E,\mathcal{L}),9 on one qubit, V={vi}i=1nV=\{v_i\}_{i=1}^n0 on the other, followed by a controlled-V={vi}i=1nV=\{v_i\}_{i=1}^n1. An entangling layer applies these V={vi}i=1nV=\{v_i\}_{i=1}^n2 blocks in parallel on a hardware-compatible edge set, after which the optimized swap layer is inserted. The next entangling layer uses the same physical edges but, because the labels have moved, acts on a different set of logical qubit pairs (Parella-Dilmé, 31 Jul 2025).

For electronic-structure problems, the architecture is excitation-based rather than hardware-efficient in the usual sense. Qubits are grouped into adjacent pairs corresponding to the two spin-orbitals of a molecular orbital, and the qubit connectivity graph is coarsened into a molecular-orbital graph. The entangling gate between two adjacent molecular orbitals is

V={vi}i=1nV=\{v_i\}_{i=1}^n3

with a double excitation gate followed by a single excitation gate. Routing is performed by orbital-swap layers, where an orbital swap is constructed from three fermionic swaps. The resulting chemistry circuit has the same alternating structure as the CRy-HEA case—excitation layer, orbital-swap layer, excitation layer—but preserves the fermionic organization of the degrees of freedom (Parella-Dilmé, 31 Jul 2025).

A more specialized extension appears in fermionic VQE with Majorana swap networks. There the objective is not arbitrary-connectivity routing per se, but reorganization of mapped fermionic operators so that nonlocal excitations become local when needed. In this setting, the swap-enhanced realization is better viewed as an improved compilation of UCCGSD or UpCCGSD, rather than as a new ansatz manifold with altered formal operator content (Fisher et al., 9 Sep 2025).

4. Trainability, resource accounting, and numerical performance

The primary claim attached to swap enhancement is practical trainability rather than bare expressibility. Without swaps, a connectivity-constrained layered ansatz can only build long-range correlations indirectly, so many local parameters must align simultaneously before distant logical qubits become strongly correlated. With swap enhancement, distant logical qubits are made physically adjacent and can be directly correlated by a small number of local parameters. The literature explicitly frames this as an empirical trainability improvement, not as a theorem-level barren-plateau mitigation result (Parella-Dilmé, 31 Jul 2025).

The resource tradeoff is nontrivial because SWAP insertion is itself expensive. In the routing-aware formulation, a SWAP is counted as V={vi}i=1nV=\{v_i\}_{i=1}^n4 CNOTs, or equivalently V={vi}i=1nV=\{v_i\}_{i=1}^n5 CZ plus V={vi}i=1nV=\{v_i\}_{i=1}^n6 Hadamards. In the CRy-HEA resource model, the controlled-V={vi}i=1nV=\{v_i\}_{i=1}^n7 gate is counted as V={vi}i=1nV=\{v_i\}_{i=1}^n8 CNOTs. For chemistry circuits, a single excitation uses V={vi}i=1nV=\{v_i\}_{i=1}^n9 CNOTs and a double excitation uses E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}0 CNOTs. The argument for swap enhancement is therefore not that SWAPs are cheap, but that the added routing overhead is more than compensated by faster access to useful long-range correlations (Parella-Dilmé, 31 Jul 2025).

The spin-glass benchmarks use E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}1 random instances of a E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}2-spin all-to-all Hamiltonian

E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}3

with random E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}4, on linear, heavy-hex, and square-lattice connectivities. The reported findings are consistent across metrics: the non-swapped CRy-HEA tends to saturate as depth increases, whereas the swap-enhanced ansatz achieves lower median energy errors not only versus entangling-layer count, but also at fixed CNOT count and fixed circuit depth. Highlighted points corresponding to one, two, and three complete applications of the optimized swap network show progressive improvement (Parella-Dilmé, 31 Jul 2025).

The chemistry benchmark uses the E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}5-orbital active space of p-benzyne in the cc-pVDZ basis on E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}6 qubits/spin-orbitals, optimized with L-BFGS-B for up to E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}7 iterations and parameters initialized close to zero. The non-swapped excitation ansatz struggles to reach chemical precision, and increasing depth up to the tested E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}8 entangling layers does not substantially improve it. The swapped ansatz converges rapidly as resources increase and consistently outperforms the non-swapped baseline as a function of entangling layers, CNOT count, depth, and parameter count (Parella-Dilmé, 31 Jul 2025).

A subtle conclusion drawn in this literature is that the non-swapped ansatz may be more expressive in theory at equal depth, because fine-tuned parameter settings may reproduce what the swapped circuit does. The practical point, however, is that these settings are hard to find. Swap enhancement is therefore presented as a trainability intervention: it changes the optimization landscape by changing which correlations are directly available at shallow depth (Parella-Dilmé, 31 Jul 2025).

5. Specialized variants: fermionic swap networks and exchange-based gate families

In fermionic VQE, swap enhancement has acquired a more specialized meaning centered on Majorana-mode permutations. A Majorana swap gate is defined as

E{(x,y)V×Vxy}E\subseteq\{(x,y)\in V\times V\mid x\neq y\}9

and acts as a signed permutation on Majorana operators. This finer-grained primitive allows nonlocal fermionic terms to be localized more efficiently than with ordinary fermionic SWAP alone (Fisher et al., 9 Sep 2025).

Two constructions are prominent. The first is a cyclic compilation algorithm for general fermionic Hamiltonians with L:VL\mathcal{L}:V\to L0 two-particle terms. Under all-to-all connectivity, the algorithm localizes all such terms using only L:VL\mathcal{L}:V\to L1 auxiliary Majorana-swap gates. The second is a dedicated Majorana swap network for L:VL\mathcal{L}:V\to L2-UpCCGSD on a L:VL\mathcal{L}:V\to L3 geometry, where synchronized permutations across the L:VL\mathcal{L}:V\to L4- and L:VL\mathcal{L}:V\to L5-spin rows preserve the paired-double structure of UpCCGSD. In that case the reported asymptotic reductions relative to fermionic-swap-network implementations are approximately L:VL\mathcal{L}:V\to L6 in circuit depth and L:VL\mathcal{L}:V\to L7 in two-qubit gate count for all-to-all connectivity, and about L:VL\mathcal{L}:V\to L8 in depth and L:VL\mathcal{L}:V\to L9 in gate count for L={1,,n}L=\{1,\dots,n\}0 connectivity (Fisher et al., 9 Sep 2025).

The key conceptual continuity with the arbitrary-connectivity literature is that swap structure is fused into the ansatz realization. Routing is not treated as external overhead. What changes is the relevant locality notion: in general-purpose routing it is physical adjacency on a qubit graph, whereas in the Majorana setting it is the locality of mapped fermionic operators after a dynamically chosen permutation of encoded modes (Fisher et al., 9 Sep 2025).

A broader gate-theoretic generalization arises in exchange-only circuit models. There the basic family is

L={1,,n}L=\{1,\dots,n\}1

with special points

L={1,,n}L=\{1,\dots,n\}2

Within this family, the average entangling power is

L={1,,n}L=\{1,\dots,n\}3

and the maximum linear-entropy entangling power on product states is

L={1,,n}L=\{1,\dots,n\}4

so L={1,,n}L=\{1,\dots,n\}5 is the maximally entangling member of the exchange family (Burkat et al., 30 Mar 2026). The same work shows that L={1,,n}L=\{1,\dots,n\}6, the model generated solely by integer powers of L={1,,n}L=\{1,\dots,n\}7, is semi-universal over the L={1,,n}L=\{1,\dots,n\}8-invariant unitary manifold and remains hard to simulate to multiplicative error in the postselected setting (Burkat et al., 30 Mar 2026). This suggests that swap-enhanced circuit design need not always take the form of explicit SWAP-network insertion; on exchange-native platforms, the variational primitive itself may already combine partial routing and entanglement generation.

6. Hardware realizability, competing strategies, and limitations

Hardware studies show that the usefulness of a swap-enhanced ansatz depends strongly on whether the physical SWAP-like primitive is clean, anisotropic, or leakage-prone. In double quantum dots at the L={1,,n}L=\{1,\dots,n\}9 interface, the SWAP operation is governed by exchange splitting

ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E0

The reported representative SWAP times are approximately ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E1 for ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E2, ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E3 for ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E4, and ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E5 for ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E6, with the intermediate regime ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E7 identified as the best compromise between strong exchange and orbital purity (Sierant et al., 5 Jun 2026). Small dots suffer from ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E8-induced orbital leakage and beating, while large dots suffer from Rashba-induced anisotropic precession accumulated over the longer exchange window. The hardware lesson is that a SWAP-rich architecture is viable only within a constrained operating window rather than uniformly across device parameter space.

Neutral-atom work makes a complementary point from the opposite direction: SWAP and CSWAP may be available as native holonomic gates rather than as decomposed overhead. In a selective-Rydberg-pumping scheme with Gaussian soft control, a two-qubit holonomic SWAP gate is generated directly on the computational subspace with reported ideal fidelity ei,j=(vi,vj)Ee_{i,j}=(v_i,v_j)\in E9 and total gate time R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,0, while a three-qubit holonomic controlled-SWAP gate is reported at R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,1 ideally and R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,2 with spontaneous emission and Förster defect included (Sun et al., 2024). Because the same work explicitly identifies the CSWAP construction as valuable for “a variational quantum algorithm in neutral atom systems,” it supplies a hardware-native route to swap-enhanced circuit layers on Rydberg platforms (Sun et al., 2024).

These hardware results also clarify a broader limitation: swap enhancement is not always the right response to constrained connectivity. A contrasting VQE study for the antiferromagnetic R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,3-R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,4 model on rectangular lattices argues that diagonal next-nearest-neighbor couplings need not be represented by explicit diagonal two-qubit gates. On rectangular-grid hardware, omitting those diagonal gates eliminates the need for the associated SWAP routing, and the no-diagonal ansatz performs comparably, and sometimes slightly better, than the variant with diagonal entanglers in the tested R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,5-, R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,6-, and R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,7-qubit systems (Feulner et al., 2022). This establishes an important counterpoint: the best swap strategy may be to avoid SWAP-requiring interactions altogether if the target state can be represented variationally with a hardware-local manifold.

Several open limitations recur across the literature. The routing algorithm on arbitrary graphs is heuristic, with simulated annealing but no optimality guarantee (Parella-Dilmé, 31 Jul 2025). The strongest numerical evidence is still at modest system size: R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,8-qubit spin glasses and R1=SmSm1S1,\mathcal{R}^{1}=\mathcal{S}_m\circ \mathcal{S}_{m-1}\circ\cdots\circ \mathcal{S}_1,9-qubit p-benzyne in the arbitrary-connectivity study, and small molecular benchmarks in the Majorana-network work (Parella-Dilmé, 31 Jul 2025, Fisher et al., 9 Sep 2025). Noise is usually accounted for through depth and two-qubit count, but not through full noisy-hardware simulation in the arbitrary-connectivity setting (Parella-Dilmé, 31 Jul 2025). In hardware-native SWAP studies, performance depends on platform-specific microscopic conditions such as orbital purity, spin-orbit anisotropy, Förster resonance, or control-pulse shaping (Sierant et al., 5 Jun 2026, Sun et al., 2024).

Taken together, these works define swap-enhanced ansatz design as a family of co-design principles rather than a single circuit template. The common principle is that permutation operations, SWAP-like exchange, or native exchange gates are elevated from compilation overhead to a structural component of the variational architecture. The practical value of that elevation depends on graph connectivity, fermionic mapping, symmetry sector, optimizer behavior, and the microscopic cleanliness of the underlying SWAP primitive.

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