Regenerative Rectifier with Dual-Band Resonator

• Regenerative rectifier is a specialized RF-dc converter that uses a compact dual-band resonator to recycle harmonics and achieve impedance matching.
• The integrated microstrip-coupled-line DBR replaces cascaded filters by presenting a DC short and inductive reactance, thereby minimizing insertion loss.
• Experimental results at 2.2 GHz demonstrate improved harmonic suppression and enhanced power conversion efficiency, paving the way for compact RF front-end designs.

A regenerative rectifier, specifically one employing a compact dual-band resonator (DBR), is a specialized RF-dc conversion circuit topology that targets enhanced power conversion efficiency (PCE) by recycling harmonics generated during rectification. Harmonic power, if not managed, results in parasitic loss and degrades circuit efficiency. By integrating a microstrip-coupled-line DBR between the rectifying diode and ground, the system simultaneously delivers harmonic suppression and impedance matching. This approach eliminates conventional cascaded harmonic-reject filters, yielding reduced insertion loss and a compact PCB layout. The following sections consolidate the design principles, theoretical methods, empirical results, and practical guidelines from "Harmonic-Recycling Rectification Based on Novel Compact Dual-Band Resonator" (Wu et al., 4 Jan 2026).

1. Dual-Band Resonator Topology and Circuit Implementation

The regenerative rectifier’s core is a microstrip-coupled-line DBR inserted between the Schottky diode and ground. The DBR fulfills three electrical requirements:

• Presents a DC short for extracted rectified current,
• Yields an inductive reactance at the fundamental frequency $f_0 = 2.2$ GHz for compensating the diode’s junction capacitance,
• Realizes open-circuits at the second and third harmonics ($2f_0$, $3f_0$) for harmonic recycling.

The physical structure comprises:

• TL1 (series microstrip): Width $W_1 = 0.3$ mm, length $L_1 = 15.3$ mm, characteristic impedance $Z_1 \approx 107.6$ Ω, electrical length $\theta_1 \approx 15.9^\circ$ at $f_0$.
• CTL1 (coupled-line pair): Line width $W_2 = 0.3$ mm, gap $S = 0.2$ mm, even-/odd-mode impedances $Z_{oe} \approx 148.6$ Ω, $Z_{oo} \approx 55.6$ Ω, half-length $\theta_2 \approx 18.6^\circ$ at $f_0$.
• Shunt capacitor $C_1$ ($\approx 0.4$ pF): Tunes the first resonance.

In system integration, the TL1+CTL1 structure supersedes the input band-stop or low-pass filters typical of harmonic suppression networks. The remainder of the RF-dc conversion chain, including the quarter-wave transformer and DC-pass filter, is left unmodified.

2. Theoretical Analysis and Resonator Conditions

The DBR’s electrical behavior is characterized by cascading ABCD matrices of TL1 and CTL1, terminated by the capacitive reactance of $C_1$: $$Z_{DBR}(\omega) = \frac{A Z_c + B}{C Z_c + D}, \quad Z_c = \frac{1}{j\omega C_1}$$ where $[A,B;C,D]$ results from multiplying the matrices for TL1 and CTL1. For open-circuit conditions at $2f_0$ and $3f_0$, and DC short at $0$ Hz, the design enforces: $$Z_{DBR}(\omega_n) \to \infty \text{ for } \omega_n = n\omega_0,\, n=2,3; \quad Z_{DBR}(0) \to 0,$$ where the total electrical length at harmonic $n$ is

$$\theta_{tot}(n) = \theta_1(n) + 2\theta_2(n) = (2m+1)\frac{\pi}{2}$$

with $\theta_i(n) = n\theta_i(1)$. Practical implementation utilizes $\theta_1 \approx 15.9^\circ$ and $\theta_2 \approx 18.6^\circ$ to place harmonic transmission zeros at 4.4 GHz and 6.6 GHz, thereby establishing resonant open-circuits at $2f_0$ and $3f_0$.

3. Harmonic-Recycling Mechanism and Efficiency Enhancement

During RF-dc rectification, the nonlinear Schottky diode generates substantial current harmonics, most notably at $2f_0$ and $3f_0$. In standard architectures, separate filters reject these harmonics, but in the DBR-based approach, the resonator reflects this energy back into the diode. By presenting very high impedance (much greater than 1 kΩ) at harmonic frequencies, the DBR forces harmonic currents into the diode’s nonlinear element, allowing partial conversion of harmonic energy into additional DC. At $f_0$, the series inductive reactance assists in resonance with the diode capacitance, facilitating matching and precluding the need for discrete inductors. At DC, the network is a short, maximizing power delivery to the load.

4. Experimental Results: Harmonic Suppression and PCE

Empirical measurements performed at $f_0 = 2.2$ GHz with $R_{load} = 400\,\Omega$ and $P_{in} = 10$ dBm demonstrate the performance benefits of the DBR design:

Metric	Conventional Rectifier	DBR Rectifier	Improvement
2nd Harmonic Power (@10 dBm input)	–6.7 dBm	–25.1 dBm	18.4 dB suppression
3rd Harmonic Power (@10 dBm input)	–24.8 dBm	–32.4 dBm	7.6 dB suppression
Measured PCE (@10 dBm input)	71.6%	73.2%	+1.6% PCE
Simulated PCE (@10 dBm input)	73.4%	76.2%	+2.8% PCE

Across the 0–14 dBm input range, the DBR topology consistently yields PCE gains of approximately 1–2% over the reference design. This confirms that harmonic recycling is not only theoretically viable but also effective in practical hardware (Wu et al., 4 Jan 2026).

5. Comparative Evaluation with Conventional Rectifiers

Traditional harmonic suppression employs discrete low-pass or band-stop filters, resulting in increased insertion loss and larger PCB footprints. The DBR replaces both types of filters and a matching inductor, delivering:

• Elimination of cascaded input filters,
• Insertion loss at $f_0$ of only ~0.1 dB (TL1 + CTL1 structure),
• Circuit footprint reduction to 34 × 12 mm (approximately $0.073\,\lambda_0^2$ at 2.2 GHz), which is comparable to or smaller than extant solutions (evidenced by Table I in the source).

This integrated approach supports simpler, lower-loss, and more compact rectifier designs as compared to the conventional multi-component approach.

6. Design Guidelines and Trade-Offs

For adaptation to differing frequencies or power levels, the following rules are observed:

• Frequency scaling: All microstrip lengths scale as $l_{new} = l_{ref} \cdot (f_{ref}/f_{new})$. Maintain $\theta_1, \theta_2$ in the $15^\circ$–$20^\circ$ range at $f_0$.
• Impedance selection: Optimize for $Z_1 \approx 100$–$120\,\Omega$, $Z_{oe} \approx 140$–$160\,\Omega$, $Z_{oo} \approx 50$–$70\,\Omega$ to create two distinct transmitting zeros; adjust gap $S$ and trace width $W$ accordingly.
• Capacitor tuning: $C_1$ (typically 0.4–1.0 pF) sets the $2f_0$ notch; excessive $C_1$ shifts the notch toward $f_0$, which can degrade matching.
• Power handling: For higher input power, use Schottky diodes rated for elevated breakdown and current (e.g., HSMS-286B upgraded to HSMS-2820/2850 series) and increase substrate thickness or trace width to reduce current density.
• Trade-offs: Wide coupled lines increase bandwidth at $f_0$ but reduce harmonic notch $Q$; oversizing $C_1$ sharpens the $2f_0$ notch but risks $f_0$ mismatch.

These guidelines are derived explicitly from the empirical and theoretical findings of (Wu et al., 4 Jan 2026).

7. Significance and Implications

The regenerative rectifier employing a microstrip-coupled-line DBR introduces a single-element solution to dual challenges: harmonic suppression and matching. By exploiting frequency-selective impedance properties inherent in the DBR geometry, both circuit simplification and measurable performance gains are achieved. The demonstrated increase in PCE from 71.6% to 73.2% at 10 dBm exemplifies the approach’s efficacy. A plausible implication is the potential for further miniaturization and integration in energy-harvesting and compact RF front-end applications, provided component scaling and harmonic management principles are maintained (Wu et al., 4 Jan 2026).