Quantum Data Centers (QDCs)

• Quantum Data Centers are unified infrastructures that combine quantum memory (QRAM) with quantum networks to enable quantum-parallel data access and computation.
• They use modular distributed QPU architectures with switch-centric and server-centric topologies to overcome monolithic processor limitations.
• Research in QDCs focuses on cross-layer co-design, integrating compilation, scheduling, and error mitigation to optimize entanglement fidelity and execution efficiency.

Quantum Data Centers (QDCs) are quantum-era data-center architectures that centralize quantum resources, networking, and control for storage, communication, and computation. In the earliest formal definition, a QDC is a unified quantum hardware system combining a database, Quantum Random Access Memory (QRAM), and a quantum communication network; in later systems work, the term is used for modular distributed quantum computing infrastructures that interconnect multiple Quantum Processing Units (QPUs) inside a localized network, often a Quantum Local Area Network (QLAN), and expose them as a shared computing platform (Liu et al., 2022, Liu et al., 2023, Cacciapuoti et al., 3 Jun 2025). A related deployment literature studies quantum-safe data-center interconnects based on Quantum Key Distribution (QKD), treating secure optical connectivity as an enabling layer for future QDC operation (Alia et al., 2024, Qiu et al., 2024).

1. Definitions, scope, and conceptual evolution

The minimal QDC definition couples QRAM with a quantum network. In that formulation, the QDC stores classical or quantum data, receives quantum queries from clients, processes them through QRAM, and returns quantum registers over the network. The canonical QRAM access map for classical data is

$$\sum_{i=0}^{N-1}\alpha_i |i\rangle_{Q_1}|0\rangle_{Q_2} \to \sum_{i=0}^{N-1}\alpha_i |i\rangle_{Q_1}|x_i\rangle_{Q_2},$$

with superposed addresses enabling quantum-parallel data access (Liu et al., 2022, Liu et al., 2023). Within this line of work, QDCs are proposed for quantum computation, quantum communication, quantum sensing, machine learning, and big data.

A second, now dominant, usage treats QDCs as modular distributed quantum computing systems. Here, multiple quantum computers, possibly based on different physical qubit technologies, are integrated into a single controlled environment and interconnected via a QLAN. This model is explicitly motivated by the limits of monolithic processors, including small qubit count, cross-talk, and engineering constraints, and positions QDCs as the medium-term architecture between today’s single-device or multi-core systems and a broader Quantum Internet (Shapourian et al., 9 Jan 2025, Cacciapuoti et al., 3 Jun 2025, Liaqat et al., 8 Mar 2025).

These definitions are not identical. A plausible implication is that QDC has become an umbrella term for quantum data-center infrastructures whose common feature is the concentration of quantum resources behind a networked service interface. In QRAM-centered papers, the service abstraction dominates; in modular-QPU papers, the primary concern is scalable distributed execution, entanglement distribution, and network control (Liu et al., 2022, Liaqat et al., 8 Mar 2025).

2. Architectural models and network topologies

The architectural literature divides QDC networks into switch-centric and server-centric topologies. In switch-centric designs, QPUs are grouped within racks and optical switches provide direct all-to-all or near all-to-all connectivity at multiple levels, with representative examples including Clos, Fat-tree, and HyperX. Shared Bell-state measurement (BSM) devices, entanglement sources, and quantum memories are placed at or integrated with switches, and intra-rack links can operate at native QPU frequencies while inter-rack communication uses telecom wavelengths via quantum frequency converters or non-degenerate entanglement sources (Shapourian et al., 9 Jan 2025).

In server-centric designs, QPUs act not only as compute nodes but also as routers or repeaters. BCube, DCell, linear, and 2D networks fall in this category. Communication between some QPUs requires entanglement swapping through intermediate QPUs, making performance depend on QPU port counts, deterministic entangling gates, routing, and scheduling. The design space therefore trades switch complexity against repeater complexity, and hardware cost against orchestration difficulty (Shapourian et al., 9 Jan 2025).

A distinct orchestrator-centric view emphasizes the separation between physical and artificial topology. In this model, QDCs often adopt a sparse, star-like physical QLAN with one or more entanglement orchestrators at the center. Those orchestrators generate, distribute, and manipulate multipartite entangled states using local operations and classical communication (LOCC), thereby reconfiguring an artificial topology without rewiring the underlying physical network. The graph-state formalism used for this purpose is

$$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$

Single-qubit Pauli measurements at the orchestrator then induce graph operations that extract Bell pairs or reshape client connectivity (Cacciapuoti et al., 3 Jun 2025).

Comparative benchmarking shows that no single topology is uniformly optimal. A 2026 study of QFly, BCube, Clos, and Fat-Tree reports that distributed performance is jointly shaped by topology, scheduling policies, and physical-layer parameters such as optical-loss-induced EPR pair generation delays, coherence-limited retry windows, switch insertion loss, and BSM contention (Pouryousef et al., 4 Jan 2026). A more focused emulation of ring, star, and line topologies under transduction and fiber noise found that the star topology provided the best trade-off between cost and fidelity for GHZ benchmarks, with line exhibiting the highest cost and lowest fidelity and ring occupying an intermediate regime (Elyasi et al., 21 May 2026). This suggests that topology selection is workload- and metric-dependent rather than purely structural.

3. Entanglement, remote gates, transduction, and noise

Distributed execution in QDCs is organized around remote gates, entanglement generation, entanglement distribution, and entanglement utilization. The foundational communication paradigms are TeleData and TeleGate, and the remote-gate literature repeatedly contrasts cat-state communication with teleportation-based schemes. In noise-aware simulations of two-QPU QDCs, cat-comm and TP-comm exhibited different robustness profiles even when gate counts or inter-QPU entangled-link counts were similar; the paper concludes that counting gates or ebits is often inadequate to predict output fidelity and that error propagation in distributed circuits offers a significant optimization opportunity for compilation (Campbell et al., 2024).

A central hardware bottleneck is quantum transduction, required to interface heterogeneous systems such as microwave-domain superconducting qubits and optical photonic channels. The literature distinguishes Direct Quantum Transduction (DQT), which attempts direct domain conversion of a data-carrying qubit, from Entanglement Generation Transduction (EGT), which instead generates hybrid entanglement and relies on heralding and entanglement swapping. Representative states used in this discussion are

$$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$

and

$$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$

The emphasis throughout is that transduction inefficiency and added noise directly limit entangled-resource fidelity (Cacciapuoti et al., 3 Jun 2025).

To study these effects experimentally before large multi-QPU facilities are common, several works emulate interconnect-induced noise with a collisional model. One formulation uses the amplitude-damping Hamiltonian

$$\hat{H}_{j} = \kappa \left( \hat{\sigma}_{+}^{S} \otimes \hat{\sigma}_{-}^{E_j} + \hat{\sigma}_{-}^{S} \otimes \hat{\sigma}_{+}^{E_j} \right),$$

with the number of collision steps mapped to distance by

$D(n) = \frac{\gamma n}{\alpha}.$

A 2025 framework partitions the coupling map of IBM’s 127-qubit ibm-brisbane device into logical QPUs, uses this model to emulate fiber-connected QPUs, and validates remote gates, Bell-state generation across QPUs, distributed Grover’s search, and a 5-qubit distributed QFT on real hardware (Elyasi et al., 4 Sep 2025).

Noise suppression has also moved from analysis to experiment. In 2026, experiments on IBM’s 156-qubit Heron r2 processor quantified layered error suppression for fiber-connected superconducting QPUs using entanglement purification, Pauli twirling, and readout mitigation. The setup used 10,000 shots per experiment, and the reported improvement in operational fidelity across interconnected QPUs exceeded $20\%$ in the high-noise regime; purification delivered the dominant gains when communication noise was the bottleneck (Elyasi et al., 1 Jul 2026). This supports the view that QDC performance depends not only on topology and scheduling but also on where mitigation is inserted in the entanglement lifecycle.

4. Compilation, scheduling, and cross-layer control

QDCs require orchestration layers that jointly reason about circuit partitioning, placement, switch configuration, entanglement generation, and resource allocation. One architectural treatment formalizes this with a quantum orchestrator that integrates physical-layer resources, optical-switch control, and higher-level circuit requirements. It models per-round latency as

$T_r = \max(t_1, t_2, \dots, t_{n_r}),$

and total execution time as

$T_{\text{tot}} = \sum_r (\tau_{\text{sw}} + T_r),$

with integer linear programming used for circuit partitioning, QPU-to-rack mapping, and path or switch allocation (Shapourian et al., 9 Jan 2025).

Compiler work seeks to reduce distribution cost, typically measured by entangled-pair consumption. The araQne compiler distributes monolithic circuits over multiple QPUs by qubit allocation, non-local gate scheduling, circuit reordering, and hypergraph partitioning. Its cost function is

$$\mathcal{D}(\Omega_\mathcal{C}) = \sum_{\mathcal{P} \in \Omega_\mathcal{C}} \left[ |\mathcal{A}(R_\mathcal{P})| - 1 \right],$$

where each gate packet $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$0 spanning $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$1 QPUs consumes $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$2 EPR pairs under TeleGate execution. Reported reductions in EPR-pair demand include about $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$3 for random circuits on 2 QPUs, about $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$4 on 4 QPUs, and about $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$5 on 8 QPUs, with larger savings on many QASMBench circuits (Mengoni et al., 1 Jul 2025).

Scheduling studies add realistic constraints: probabilistic entanglement generation, limited communication qubits, finite coherence time for held EPR pairs, BSM bottlenecks, and photonic switch reconfiguration delay. Under these assumptions, dynamic scheduling outperformed static scheduling in scenarios with high entanglement parallelism, while aggressive lookahead could degrade performance when coherence time was short because pre-generated entanglement had to be discarded before use (Pouryousef et al., 28 Apr 2025). Related work on reconfigurable optical networks introduced a compilation and scheduling framework that parallelizes cross-rack communication and batches in-rack communication, reducing overall latency by a factor of $$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$6 while incurring small overhead (Zhang et al., 2024).

This cross-layer emphasis extends to memory management. A three-layer fat-tree architecture with Q-Leaf and swapping spine switches models quantum memory as an M/M/C/K queue with reneging, where fidelity decays as

$$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$7

the maximum tolerable storage time is

$$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$8

and throughput is

$$\big|G\big\rangle = \prod_{\{a,b\}\in E} CZ_{ab}\left|+\right\rangle^{\otimes n}.$$9

NetSquid and queueing-theoretic evaluation indicate that small quantum memories can be sufficient when queue management is efficient, and that dephasing rather than raw buffer size quickly becomes the limiting factor (Xin et al., 11 Sep 2025).

5. Emulation, benchmarking, and software ecosystems

Because physically networked QDCs remain limited, emulation and end-to-end simulation have become core research instruments. The single-QPU emulation framework described above is one example, but the toolchain is broader. GsOQDC, presented in 2026 as an open-source graphical framework, integrates optical-network design, distributed quantum-circuit compilation, scheduling, and discrete-event simulation of remote-gate execution. It exposes QPUs, optical switches, entanglement-generation resources, memories, and links in a GUI and supports cross-layer evaluation of entanglement-resource dynamics and system-level metrics such as job execution time and fidelity (Elyasi et al., 1 Jul 2026).

For near-term workloads, QDC software stacks also include cloud and HPC orchestration. A 2025 study of QAOA in quantum datacenters introduced Divi for problem decomposition and batch generation, Maestro for unified simulation and automated backend selection, and a cloud platform for queueing, scheduling, and dynamic resource allocation. The workflow targets MaxCut-type QAOA circuits, automates partitioning and batch execution, and reports that QAOA partitioning does not significantly degrade optimization performance and often outperforms classical solvers (Liaqat et al., 8 Mar 2025).

Benchmarking efforts have consequently shifted from isolated circuit studies to architecture-wide comparisons. The 2026 comparison of QFly, BCube, Clos, and Fat-Tree quantifies distributed-to-monolithic latency, EPR-generation delay, contention, and scalability under realistic optical and memory constraints (Pouryousef et al., 4 Jan 2026). The 2026 topology-emulation study based on GHZ-state generation uses communication-cost formulas for line, ring, and star networks and identifies transduction noise as the dominant source of fidelity degradation, with optical fiber noise secondary (Elyasi et al., 21 May 2026). Taken together, these tools turn QDC evaluation into a cross-layer discipline spanning circuit mapping, network design, photonic loss, buffer management, and mitigation.

6. Security-oriented interconnects and quantum-safe data-center networking

A parallel strand of QDC-related work focuses on quantum-safe data-center interconnects. In 2024, a field deployment between two JPMorgan Chase data centers in Singapore demonstrated 100 Gbps site-to-site IPsec tunnels secured with QKD over $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$0 km of deployed telecom fiber and $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$1 days of continuous operation. Two configurations were reported: a single QKD-secured VPN tunnel with maximum throughput $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$2 Gbps outbound and inbound, and a multi-VPN configuration with $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$3 QKD-secured tunnels at $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$4–$$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$5 Gbps per tunnel for an aggregate throughput of $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$6 Gbps. The QKD system achieved an average SKR of $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$7 kbps, an average QBER of $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$8, and an average visibility of $$\big|\Psi_{m,o}\big\rangle = \alpha \big|0_m 1_o\big\rangle + \beta \big|1_m 0_o\big\rangle$$9; keys were delivered through the ETSI-QKD-014 REST API and used with AES-256-GCM at a key refresh rate of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$0 seconds (Alia et al., 2024).

A separate 2024 field trial in a commercial data-center environment deployed the ID Quantique Cerberis XGR series over an existing production-grade fiber span of about $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$1 km with $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$2 dB loss and seven fiber hops. Over $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$3 days it achieved an average secret key rate of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$4 kbps, an average QBER of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$5, and average visibility of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$6, then used the keys in a quantum-secured VPN to transfer files between data centers. The deployment relied on containerized control software and the ETSI GS QKD 014 REST API, and required only minimal modifications to the fiber infrastructure (Qiu et al., 2024).

Security-oriented optical-interconnect work has also targeted AI-driven data centres. A 2025 architecture combined self-homodyne coherent DSP-Lite transmission, BB84 QKD, and space-division multiplexing over a 7-core multicore fiber. Reported metrics include an expandable transmission capacity of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$7 Tb/s, a quantum SKR of $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$8 kb/s, a QBER of approximately $$\big|\Psi_{m,m}^{s,d}\big\rangle = \frac{1}{\sqrt{2}} \left(\big|0_m^s 1_m^d\big\rangle + \big|1_m^s 0_m^d\big\rangle\right).$$9, and power consumption of $$\hat{H}_{j} = \kappa \left( \hat{\sigma}_{+}^{S} \otimes \hat{\sigma}_{-}^{E_j} + \hat{\sigma}_{-}^{S} \otimes \hat{\sigma}_{+}^{E_j} \right),$$0 pJ/bit. In this design, classical and quantum channels are spatially separated across cores, while detected local-oscillator pulses provide clocking for the quantum system (Ji et al., 13 Mar 2025). This suggests that, alongside distributed quantum computing, QDC development also includes quantum-secured transport layers for conventional high-performance data-center traffic.

7. Open problems, misconceptions, and research directions

Several recurring misconceptions are addressed explicitly in the literature. One is that minimizing the number of non-local gates, or simply counting entangled links, is sufficient to predict distributed-circuit quality. Noise studies show that this is often inadequate because output fidelity depends on the detailed pattern of error propagation, the remote-gate protocol, latency, and sometimes the input state itself (Campbell et al., 2024). Another is that a single topology can be declared universally best. Benchmarking instead shows strong dependence on workload structure, BSM provisioning model, optical-switch loss, and memory coherence (Pouryousef et al., 4 Jan 2026).

The most persistent open hardware problem is quantum transduction. Efficient, low-noise conversion between incompatible physical platforms remains unresolved, and conversion errors directly affect entangled-resource fidelity and thus the viability of heterogeneous QDCs (Cacciapuoti et al., 3 Jun 2025). Closely related problems include entanglement routing, synchronization, classical-control overhead, and the integration of compilers with network resource managers. The same papers that advocate orchestrator-centric or modular architectures also note that no practical, scalable protocols yet exist for efficient routing and synchronization of entanglement at increasing scale (Cacciapuoti et al., 3 Jun 2025).

On the systems side, memory management, BSM provisioning, and queue discipline remain central. Analytical and simulation studies show that short coherence times can invalidate aggressive lookahead, while ebit generation, service rates, and dephasing set practical bounds on throughput and fidelity (Pouryousef et al., 28 Apr 2025, Xin et al., 11 Sep 2025). A plausible implication is that QDC research is converging toward full hardware-software co-design: topology, switch and memory architecture, transduction physics, compilation, scheduling, and error mitigation must be optimized jointly rather than sequentially.