Quantum Circuit Compression

• Quantum circuit compression is a set of algorithms and techniques that reduce circuit depth, gate count, and resource footprint while maintaining fidelity.
• It employs methods like classical memory reduction, physical gate minimization, algebraic rewrites, variational optimization, and qudit encoding to enhance efficiency.
• These techniques enable scalable simulation and execution on NISQ devices, balancing trade-offs between resource savings and potential fidelity loss.

Quantum circuit compression refers to the set of methodologies and algorithms that reduce the depth, gate count, or classical/quantum resource footprint of quantum circuits, either for simulation or execution on quantum hardware, while preserving specified fidelity or functional constraints. These techniques are central for addressing the scalability bottlenecks of both classical simulation and physical realization of quantum algorithms, particularly on noisy intermediate-scale quantum (NISQ) devices and for resource-intensive tasks such as Hamiltonian simulation, quantum state preparation, and variational quantum algorithms.

1. Compression Paradigms and Definitions

Quantum circuit compression can be partitioned into distinct classes, each addressing a specific resource bottleneck or application context:

• Classical Memory Compression: Techniques to reduce the RAM/storage requirement when simulating quantum amplitude vectors, crucial for classical emulation of large circuits that induce $2^n$-size memory footprints (Wu et al., 2018).
• Physical Gate Compression: Optimization of quantum gate sequences to minimize two-qubit gates (CNOTs) or circuit depth, facilitating more efficient execution on hardware and improved noise resilience (Guo et al., 13 Jan 2025, Rakyta et al., 2022).
• Algebraic and Structural Compression: Exploitation of algebraic symmetries or integrability (e.g., Yang–Baxter equation, Lie algebraic structure) to exactly or approximately compress multi-step quantum evolutions into fixed-depth or reduced-depth blocks (Gulania et al., 2022, Kökcü et al., 2021, Gulania et al., 2021, Kökcü et al., 2023).
• Variational and Autoencoding Compression: Variational/learning-based approaches for finding low-dimensional, information-preserving representations of quantum gates, channels, or subcircuits (Wu et al., 2023).
• Qudit-based Compression: Mapping $k$ logical qubits onto higher-dimensional qudits to reduce the count of nonlocal entangling operations (Lysaght et al., 6 Nov 2024, Gao et al., 2022).
• Topological and Intermediate-Language Compression: Methods leveraging graphical calculi (e.g., ZX-calculus) or graph-theoretic representations to compress fault-tolerant topological (e.g., braiding-based) circuits (Hanks et al., 2019), or to optimize classical-to-control translation layers (Moflic et al., 28 Jul 2025).

2. Algebraic and Algorithmic Techniques

Several algorithmic strategies and algebraic structures underpin circuit compression protocols:

a. Amplitude-Aware Lossy Compression

For classical simulation, amplitude-aware lossy compression (AALC) reduces the memory needed by blockwise quantizing and losslessly encoding the quantum state amplitudes to a target error bound $\delta$, maintaining global fidelity via stridewise renormalization and adaptively choosing $\delta_k$ per simulation stride. The typical memory reduction may be $16\times$ for QFT circuits with fidelity $F = 99.95\%$, and up to $445,144\times$ for Grover circuits, at the expense of significant runtime overhead (up to $32\times$) (Wu et al., 2018).

b. Lie-Algebraic and Yang–Baxter Compression

For 1D free-fermion or integrable spin-chain Hamiltonians, the utilization of fusion, commutation, and turnover identities (Yang–Baxter equation and Lie algebraic properties) enables the merging of arbitrarily many Trotter layers into fixed-depth or $O(n)$-depth “square” circuits. In the Heisenberg or XY models, reflection symmetry induced by YBE allows Trotter circuits of depth $O(N)$ to be reduced to depth $n$ (number of qubits) (Gulania et al., 2022, Gulania et al., 2021). For free-fermion circuits, block-diagonalization and Givens factorization achieve linear-depth compression, and are extendable to controlled evolutions and inclusion of particle-creation/annihilation (Camps et al., 2021, Kökcü et al., 2021, Kökcü et al., 2023).

c. Adaptive and Variational Circuit Compression

Adaptive circuit compression approaches such as SQUANDER represent the circuit as a continuous-parameterized ansatz (parametric two-qubit gates) and iteratively prune unnecessary gates by local optimization. This allows dramatic CNOT-count reduction (e.g., from $66$ to $8$ for 4-qubit adders), albeit at significant classical optimization cost (Rakyta et al., 2022).

Variational Quantum Compilation (VQC), central in recent 2D dynamic simulation protocols, constructs a hardware-efficient ansatz and optimizes it to approximate the Trotterized time-evolution operator, using cost functions such as the global Hilbert–Schmidt fidelity or local Heisenberg-evolved Pauli observables. Pauli propagation methods with careful truncation enable efficient evaluation/gradient computation for systems up to $30\times30$ qubits, yielding up to $10^4$-fold error reduction over standard Trotterization at fixed depth (D'Anna et al., 2 Jul 2025).

Matrix Product Operator (MPO) based approaches variationally optimize circuits layer by layer to best match a high-fidelity target unitary in MPO representation, enabling dramatic depth reduction and adaptability to quasi-1D/2D hardware topologies (Gibbs et al., 24 Sep 2024).

Autoencoding approaches (Quantum Circuit AutoEncoder, QCAE) leverage trainable encoding/decoding unitaries to compress quantum circuits/channels down to a bottleneck (latent) space, with provable recovery fidelity bounds tied to the Choi rank of the channel (Wu et al., 2023).

3. Qudit Encodings and Structural Gate Reductions

Encoding qubit registers into qudits (dimension $d=2^k$) enables further gate-count reductions by translating formerly inter-qubit gates within the same group into local qudit operations. In the “qubit logic on qudits” (QLOQ) framework, any $n$-qubit multi-controlled operation can be decomposed with exponentially fewer two-level (CNOT) gates when split among high-dimensional qudits. For general $n$-qubit unitaries, QLOQ versions of the Quantum Shannon Decomposition (QSD) can implement the operation with strictly fewer physical CNOTs than the theoretical lower-bound in the pure-qubit setting once $n>3$ (Lysaght et al., 6 Nov 2024). Experimental demonstrations in photonic and ion-trap architectures reinforce these gate-count and performance advantages (Gao et al., 2022).

4. Compression in the Context of Quantum Simulation

Quantum circuit compression is vital for real-time Hamiltonian simulation, both in classical emulation and on NISQ hardware:

• Constant/Linear-Depth Simulation: Algebraic compression allows simulation times $T$ to be increased without corresponding circuit depth growth, providing “fast-forwarding” for integrable or free-fermion systems. For example, $N$ Trotter steps can be folded into $O(n)$ or $O(n^2)$-depth circuits, independent of $T$, as shown for the Heisenberg and TFIM models (Gulania et al., 2022, Gulania et al., 2021, Camps et al., 2021).
• Variational Hamiltonian Compilation: For non-integrable or higher-dimensional models, variational circuit ansätze (layered Pauli or SU(4) gates) optimized via global or local cost functions compress the simulation time step at fixed hardware depth, extending accessible timescales and system sizes (Guo et al., 13 Jan 2025, Gibbs et al., 24 Sep 2024, D'Anna et al., 2 Jul 2025).

Benchmark results demonstrate that for circuits with slow entanglement accumulation (e.g., quantum Fourier transform, time-evolution by local Hamiltonians), near-optimal compression rates ($\gamma \sim 7$–$12$) can be achieved, extending the regime of practical hardware execution (Guo et al., 13 Jan 2025, Gibbs et al., 24 Sep 2024).

5. Implementation Architectures, Practical Trade-offs, and Limitations

Efficient implementation of circuit compression relies on both algorithmic and hardware-aware pipelines:

• Classical Simulation Pipelines: High-efficiency amplitude-aware compression strategies (e.g., blockwise quantization with error-adaptive encoding) are integrated in classical simulators to extend feasible simulation sizes (Wu et al., 2018).
• Quantum Execution Pipelines: Compression methods (e.g., cache- and graph-based compressors) can reduce classical-to-control latencies in quantum operating systems by exploiting Clifford substructure, local graph encodings, and token stream representations, lowering JIT-compilation times by over five orders of magnitude for utility-scale circuits (Moflic et al., 28 Jul 2025).
• Fault-Tolerant/Surface-Code Circuits: ZX-calculus–aided rewrite passes compact braided or lattice-surgery topological circuits, leading to up to $77\%$ reduction in 3D code volume, critical for limiting physical qubit/time requirements in large-scale error correction (Hanks et al., 2019).

Trade-offs and Caveats

• Fidelity/Accuracy vs. Compression: Aggressive compression can cause global fidelity collapse, especially in lossy or variational approaches beyond optimal parameter thresholds. Circuit-specific structure (amplitude regularity, entanglement growth) strongly influences achievable compression rates (Wu et al., 2018, Guo et al., 13 Jan 2025).
• Resource Reallocation: Compression can shift cost from one resource to another (e.g., runtime overhead for memory reduction in classical simulation, increased local-gate complexity for reduced non-local gates in qudit encoding).
• Scope of Applicability: Fast-forwarding and exact algebraic compression are limited to circuits generated by low-dimensional Lie algebras (free-fermionic/integrable) and generally fail in circuits generating exponential operator rank or generic entanglement (No-Fast-Forwarding theorem) (Kökcü et al., 2021).
• Hardware Constraints: Physical realization of QLOQ or qudit-based schemes depends on platform coherence and native gate availability; practical limitations on qudit dimension, level accessibility, and crosstalk must be considered (Lysaght et al., 6 Nov 2024, Gao et al., 2022).

6. Theoretical Limits, Optimality, and Open Directions

Theoretical results set sharp limits on achievable compression. For example, in compressing $N$ copies of shallow-circuit $n$-qubit states, the optimal memory requirement is $O(n \log N)$ (achievable via explicit hybrid quantum-classical protocols), matching the Holevo bound for the constrained state family (Yang, 17 Apr 2024). For quantum channels, circuit autoencoder recovery fidelity is upper-bounded by the sum of the $d^2$ largest Choi eigenvalues, requiring bottleneck dimension $d \gtrsim \sqrt{\mathrm{rank}(J^\mathcal{E})}$ to avoid significant information loss (Wu et al., 2023).

The gap between lower and upper bounds in CNOT cost for arbitrary $n$-qubit unitaries collapses in QLOQ encodings, which outperform the best possible raw-qubit circuits for $n>3$ (Lysaght et al., 6 Nov 2024).

Open directions include hybridization of algebraic and variational schemes for non-integrable models, extending compression to more general non-Markovian channels, optimizing over hardware-native gate sets, and the automation and integration of intermediate-language (e.g., ZX-calculus) compression for end-to-end quantum compilation (Hanks et al., 2019).

7. Impact and Outlook

Quantum circuit compression fundamentally enables both classical simulation of larger circuits and practical execution of nontrivial algorithms on limited/noisy hardware. By trading among memory, gate count, depth, and classical compile time, it extends the frontiers of both near-term and future large-scale quantum computation. Its continued development is interlinked with progress in circuit synthesis theory, classical optimization, quantum control, and hardware-specific architecture engineering. The field remains highly active, with regular breakthroughs in both theory and system-level implementation (Guo et al., 13 Jan 2025, Gibbs et al., 24 Sep 2024, D'Anna et al., 2 Jul 2025, Gulania et al., 2022, Lysaght et al., 6 Nov 2024).