Compressed Quantum Circuits

• Compressed quantum circuits are a design paradigm that reduces qubit count, circuit width, and gate depth while preserving simulation fidelity for complex quantum evolutions.
• They utilize methods such as logarithmic reduction in matchgate circuits, algebraic fusion, and tensor-network techniques, achieving exponential resource savings in some cases.
• Advanced strategies including variational compilation, ZX-calculus optimizations, and quantum autoencoders further enhance fault tolerance and applicability on both NISQ and fault-tolerant platforms.

A compressed quantum circuit is a quantum computational paradigm, technique, or circuit design principle that achieves a target quantum operation using substantially fewer quantum resources—such as qubits, two-qubit gates, or circuit depth—than required by direct, uncompressed implementations. “Compression” in this setting spans a spectrum: from exponential reductions in circuit width for certain model classes, to fixed-depth or resource-efficient decomposition strategies for general unitaries, to explicit mapping of logical qubits onto higher-dimensional systems (qudits) for native hardware efficiency. Multiple families of compression approaches target different quantum tasks: quantum simulation, state evolution, variational algorithms, state encoding, and error-corrected logical computation. Below, key methodologies and theoretical constructs are delineated, with mathematical underpinnings and application scenarios drawn from the literature.

1. Logarithmic Qubit Compression for Matchgate Circuits and Free-Fermion Models

One of the inception points for quantum circuit compression was the observation that any matchgate circuit—circuits generated by quadratic fermionic Hamiltonians acting on a linear chain—can be simulated (exactly and efficiently) on a universal quantum computer with only $m = \log_2 n$ or %%%%1%%%% qubits, where $n$ is the original number of qubits (Kraus, 2011, Boyajian et al., 2013). The canonical example is the 1D Ising model:

$$H(J) = \sum_{i=1}^{n} Z_i + J \sum_{i=1}^{n-1} X_i X_{i+1}$$

with ground state and adiabatic evolution accessible via Trotterized circuits comprised of matchgates. The core compression proceeds as follows:

• Original $n$-qubit evolution $U(J)$ is mapped to an orthogonal transformation $R(J)$ in Majorana operator space ($SO(2n,\mathbb{R})$).
• Measurement of observables (e.g., magnetization $M(J)$) reduces to expectation values involving $R(J)$ and a fixed initial state, which can be encoded on $m$-qubit or, after appropriate symmetry reductions, $\hat{m} = \log_2 n$-qubit circuits.
• The compressed quantum circuit simulates the full quantum phase transition and dynamical observables of the original system by performing the evolution $W(J)$ and a Pauli-$Y$ measurement on the final (compressed) qubit:

$$M(J) = -\frac{2}{n}\operatorname{Tr}\left[ W(J)\rho_{\text{in}}^{(\hat{m})} W(J)^\dagger(1\otimes Y_{\hat{m}}) \right]$$

This exponential reduction in resource requirements generalizes to the XY model (Boyajian et al., 2013) and permits not only compressed adiabatic simulation, but also compressed protocols for quantum quenches and finite-time dynamics, directly mapping observables such as domain wall densities and local excitations into scalable, logarithmic-width quantum circuits.

2. Algebraic and Tensor-Network-Based Circuit Compression for Quantum Simulation

Beyond free-fermion (matchgate) models, substantial circuit compression is achievable for a broader class of Hamiltonian evolutions—especially in one-dimensional systems and certain integrable models. Two key algebraic methodologies are prominent.

2.1 Algebraic Circuit Compression

For Hamiltonians whose exponential propagators decompose into mutually commuting or su(2)-algebraic "blocks," one can algebraically manipulate Trotter-product circuits comprising $N$ sequential layers (each corresponding to a time step of size $\Delta t$) into a fixed-depth circuit (independent of $N$) (Kökcü et al., 2021, Camps et al., 2021). This approach exploits three algebraic identities:

• Fusion rule: $B_i(\alpha) B_i(\beta) = B_i(\alpha+\beta)$ for blocks acting on the same site(s).
• Commutation: Blocks on disjoint sets commute.
• Turnover rule: For overlapping blocks, $$B_i(\alpha) B_{i+1}(\beta) B_i(\gamma) = B_{i+1}(a) B_i(b) B_{i+1}(c)$$ with explicit parameter mappings.

This technique is particularly effective for spin chains mapped to free-fermionic models after a Jordan–Wigner transformation. The compressed circuit depth becomes independent of time evolution length and scales linearly with system size (Camps et al., 2021), produces shallow circuits with nearest-neighbor connectivity, and is suitable for NISQ hardware.

2.2 Tensor-Network and Counterdiabatic Compression

Parametric circuit compression strategies leveraging tensor networks have been advanced for adiabatic and real-time quantum evolution. Here:

• Time-evolution operators are represented via matrix product operators (MPOs) or matrix product states (MPS) (Keever et al., 2023, Gibbs et al., 24 Sep 2024).
• The MPO representation is variationally compressed, and subsequently "compiled" into a shallower parameterized quantum circuit with minimized distance (in Hilbert–Schmidt norm or similar cost functions) to the target propagator.
• Environment tensor contraction, SVD-based local gate optimization, and bond-dimension truncation are utilized to maintain fidelity while enabling scaling to deep circuits and 2D geometries.
• Counterdiabatic driving terms can be incorporated efficiently by embedding optimized adiabatic gauge potentials (AGPs) into the fixed-depth circuit (Keever et al., 2023).

Empirically, these approaches produce compressed circuits which for a fixed depth achieve error reductions by up to $10^4$ compared to standard Trotter circuits and enable simulations of 2D Ising models on quantum hardware with realistic connectivity (Gibbs et al., 24 Sep 2024).

3. Variational Quantum Compilation and Adaptive Compression Architectures

Variational compilation techniques aim to compress quantum circuits by optimizing parameterized gate sequences (ansätze) to approximate target evolutions with fewer layers and gates.

• Pauli Propagation Compression: For 2D lattice quantum dynamics (D'Anna et al., 2 Jul 2025), variational ansätze $V(\theta)$ with brickwork or Trotter-mimetic structures, but reduced layer counts, are optimized to minimize a cost function of the form

$$C_{\mathrm{HST}}(\theta) = 1 - \frac{1}{4^n}\big|\mathrm{Tr}(U^\dagger V(\theta))\big|^2$$

or an efficiently computable local proxy based on Pauli transfer matrices and product state averaging.

• Compression is enabled by the efficient propagation of a small set of Pauli strings under Clifford and non-Clifford gates, with truncation to avoid path proliferation (e.g., by weight or numerical coefficient).
• Experimental results show that such variationally compressed circuits, when benchmarked on Quantinuum’s H1 processor, maintain high fidelity over long simulation times at fixed resources compared to deep Trotter circuits.
• Adaptive Layering for Variational Simulation: The AVQDS(T) method (Zhang et al., 13 Aug 2024) applies adaptive variational quantum simulation in which circuit layers are added only when necessary (as determined by the McLachlan distance), further compressing circuit depth and reducing two-qubit gate count via the TETRIS strategy—parallel addition of disjoint, resource-efficient unitaries per layer.

4. Resource/Cost Compression: Data and State-Vector Approaches

Compression applies not just at the gate level, but also in classical simulations of quantum circuits.

• Lossy/Hybrid Compression in State-Vector Simulation: Hybrid schemes combining blockwise lossless (Zstd) and error-bounded lossy compression are used to simulate full quantum circuits whose (uncompressed) state-vectors would otherwise be intractably large (Wu et al., 2019). Adaptive error bounds and bit-plane truncation are employed to fit simulations into available memory, enabling, for instance, 61-qubit Grover search to be simulated in 768 TB (instead of 32 EB).
• Precision-Limited Quantization: Scalar and vector quantization limit memory per amplitude at runtime and via codebook-based “vector quantization” (Huffman et al., 20 Jan 2024). For example, with 7 significand bits, QFT circuits achieve $>0.99$ fidelity; with 15 bits/amplitude and $10^4$ circuit depth, fidelity $>0.9$ is preserved for a 6-qubit QFT.

This class of compression is crucial for benchmarking algorithms and verifying quantum supremacy experiments on classical supercomputers.

5. Compression for Fault-Tolerant and Logical Circuits

Circuit compression methods are vital in reducing the overhead of topologically encoded, braiding-based, or logical circuits.

• ZX-Calculus Aided Compression: Translation of 3D topological quantum circuits (defect-based, braided circuits) into ZX-calculus diagrams allows systematic application of rewrite rules, yielding substantial reductions in logical circuit “volume” (typically 50–77%) before mapping back to 3D layouts (Hanks et al., 2019).
• Qudit-Based Logical Grouping (QLOQ): By aggregating logical qubits into single physical qudits, entangling gates between logical qubits mapped onto a single qudit become local, dramatically reducing the need for costly inter-qudit entangling gates (Lysaght et al., 6 Nov 2024). QLOQ-based circuits have demonstrated exponentially reduced resource requirements for both variational eigensolvers (VQE) and unitary decomposition (e.g., Quantum Shannon Decomposition), in some cases even surpassing known qubit-only CNOT cost lower bounds.

6. Quantum Autoencoders and Classical-Aided Compression

Quantum autoencoders compress quantum states or processes by learning parameterized unitaries that map high-dimensional inputs to low-dimensional latent spaces with ancillary “trash” qubits disentangled (reset to $|0\rangle$) (Anand et al., 2022, Wu et al., 2023). Extensions include:

• Quantum circuit autoencoders that compress the process channel of a quantum circuit, with theoretical bounds on perfect lossless compression and achievable fidelity in noisy settings.
• Hybrid evolutionary-classical optimization to design autoencoder circuits over classically simulatable gate sets (e.g., X, CX, CCX), enabling efficient design and verification with classical resources while optimally compressing ensembles of quantum states (Anand et al., 2022).

7. Hardware-Efficient and Application-Specific Compression

Multiple papers underscore the hardware-aware adaptation of circuit compression:

• Brickwall Variational Ansätze: Shallow brickwork layouts minimize both circuit depth and the number of error-prone two-qubit gates under linear or planar hardware constraints (Dinca et al., 29 Sep 2025).
• Image and Boolean Function Compression: For quantum image representation, algebraic transformations (e.g., ESOP-to-PPRM) minimize gate count in NEQR circuits, achieving up to $99\%$ compression ratios without additional ancillae, across both exponential and linear runtime regimes (Iranmanesh et al., 22 Sep 2024).

8. Performance, Scaling, and Implications

Approach	Compression Target	Resource Scaling/Benchmark
Matchgate compression	Circuit width	$O(n) \to O(\log n)$ qubits, same circuit depth
Algebraic block/fusion	Circuit depth	Fixed depth w.r.t. sim. time, linear in spin number
Tensor network methods	Circuit depth, hardware	Depth $\sim \frac{1}{6}$ of original, error $10^4$ lower
QLOQ/qudit mapping	Gate count/entanglement	Exponential reduction over qubit-only decompositions
ZX-Calculus optimization	Fault-tolerant “volume”	Compression up to $\sim77\%$

Compressed quantum circuits are essential for enabling classically intractable simulations on quantum hardware with limited qubits and coherence, enhancing noise resilience by shortening circuit depth, and providing fault-tolerant, resource-efficient logical operations. They form the basis for advanced quantum simulation, compressed variational algorithms, hardware-aware compilation, and scalable error-corrected computation in NISQ and post-NISQ architectures.

• (Kraus, 2011) Compressed quantum simulation of the Ising model
• (Boyajian et al., 2013) Compressed Simulation of evolutions of the XY-model
• (Wu et al., 2019) Full-State Quantum Circuit Simulation by Using Data Compression
• (Hanks et al., 2019) Effective Compression of Quantum Braided Circuits Aided by ZX-Calculus
• (Kökcü et al., 2021) Algebraic Compression of Quantum Circuits for Hamiltonian Evolution
• (Camps et al., 2021) An Algebraic Quantum Circuit Compression Algorithm for Hamiltonian Simulation
• (Gulania et al., 2021) Quantum time dynamics of 1D-Heisenberg models employing the Yang-Baxter equation for circuit compression
• (Anand et al., 2022) Quantum compression with classically simulatable circuits
• (Wu et al., 2023) Quantum Circuit AutoEncoder
• (Keever et al., 2023) Towards adiabatic quantum computing using compressed quantum circuits
• (Huffman et al., 20 Jan 2024) Lossy Compression for Schrödinger-style Quantum Simulations
• (Zhang et al., 13 Aug 2024) Adaptive variational quantum dynamics simulations with compressed circuits and fewer measurements
• (Iranmanesh et al., 22 Sep 2024) Gate Optimization of NEQR Quantum Circuits via PPRM Transformation
• (Gibbs et al., 24 Sep 2024) Deep Circuit Compression for Quantum Dynamics via Tensor Networks
• (Lysaght et al., 6 Nov 2024) Quantum circuit compression using qubit logic on qudits
• (D'Anna et al., 2 Jul 2025) Circuit compression for 2D quantum dynamics
• (Dinca et al., 29 Sep 2025) Quantum process tomography of a compressed time evolution circuit on superconducting quantum processors