Q-Sched: Distributed Quantum Scheduling

• Q-Sched is a scheduling framework for distributed quantum computing that partitions quantum circuits across QPUs and maps nonlocal entangling gates to timed network operations.
• The method employs formal RCPSP formulations and greedy heuristics to schedule network activities, ensuring resource constraints on communication and memory qubits are met.
• While effective for small-scale star network models, Q-Sched highlights future directions including scaling to larger circuits, error correction integration, and adaptive scheduling under uncertainty.

Searching arXiv for the cited papers to ground the article in current research. Q-Sched most naturally denotes a scheduling methodology for distributed quantum computing in which a partitioned quantum circuit is mapped onto a short-range quantum network and the resulting network operations are scheduled to minimize makespan. In the explicit prototype developed in "Network Operations Scheduling for Distributed Quantum Computing" (Chandra et al., 17 Nov 2025), the term refers to a pipeline that partitions a circuit across quantum processing units (QPUs), identifies the nonlocal entangling gates induced by that partition, maps each such gate to a sequence of network operations, and then schedules those operations either through a Resource-Constrained Project Scheduling Problem (RCPSP) formulation or through a greedy heuristic (Chandra et al., 17 Nov 2025).

1. Definition and conceptual scope

In this usage, Q-Sched is a coordination layer for distributed quantum computing (DQC). Its purpose is not to synthesize the quantum algorithm itself, nor to choose an interconnect topology, but to determine when the network-side operations required by nonlocal entangling gates should occur so that the total network execution time is as small as possible (Chandra et al., 17 Nov 2025).

The underlying problem appears after a compiled circuit has been partitioned across multiple QPUs. Gates acting within a partition remain local. Two-qubit entangling gates whose operands fall on different partitions become nonlocal and must be implemented through network-assisted entanglement generation. Q-Sched therefore addresses a hybrid resource-allocation problem: it must honor circuit-derived precedence constraints while respecting finite communication and memory qubit budgets at the QPUs and at the central switch (Chandra et al., 17 Nov 2025).

The paper’s formulation is explicitly offline and deterministic. It assumes fixed operation durations, deterministic entanglement generation, and noiseless execution, and evaluates schedules solely through the makespan

$C_{\max}=\max_j(S_j+d_j),$

where $S_j$ and $d_j$ are the start time and duration of activity $j$ (Chandra et al., 17 Nov 2025).

2. Distributed architecture and operation model

The concrete architecture is a star, or hub-and-spoke, quantum network. A central quantum switch serves as the hub, and multiple QPUs act as spokes. Each QPU contains communication qubits, used for entanglement generation with the switch, and memory qubits, used to store entanglement and run the computational circuit. The switch contains only communication qubits, which support link-level entanglement and swapping (Chandra et al., 17 Nov 2025).

Two specific instances are studied. In the first, the network has 2 QPUs plus a switch; each QPU has 2 communication qubits and 2 memory qubits, and the switch has 2 communication qubits. In the second, the network has 4 QPUs plus a switch; each QPU has 4 communication qubits and 4 memory qubits, and the switch has 4 communication qubits. These capacities are used directly in the scheduling formulation (Chandra et al., 17 Nov 2025).

A nonlocal two-qubit gate between QPU $i$ and QPU $j$ is implemented through teleportation-based techniques, abstracted as a fixed sequence of network operations that first create an end-to-end Bell pair between the two QPUs. For each required Bell pair, the scheduled sequence is

$$\text{LLE}_{i\text{s}},\ \text{LLE}_{j\text{s}} \;\rightarrow\; \text{Swap}_{ij} \;\rightarrow\; \text{Move}_{ij}.$$

Here, $\text{LLE}$ denotes Link-Level Entanglement generation between a QPU and the switch, $\text{Swap}_{ij}$ denotes entanglement swapping at the switch, and $\text{Move}_{ij}$ denotes transfer of the resulting entanglement into QPU memory qubits (Chandra et al., 17 Nov 2025).

All three operations have fixed duration 2 discrete time steps. The LLE operations use one communication qubit at a QPU and one at the switch; the swap uses communication qubits at the switch; and the move operation uses one memory qubit at each endpoint QPU. Classical communication and the actual teleported gate are not explicitly scheduled (Chandra et al., 17 Nov 2025).

Circuit partitioning precedes scheduling. The circuit is represented as a graph in which qubits are nodes, an edge joins two qubits if there is at least one two-qubit entangling gate between them, and the edge weight equals the number of such gates. Partitioning seeks to minimize the edge cut while balancing partition sizes. This is an NP-hard graph partitioning problem, solved approximately with METIS, whose cited complexity is

$S_j$0

with $S_j$1 qubits, $S_j$2 interaction edges, and $S_j$3 partitions (Chandra et al., 17 Nov 2025).

3. Formal scheduling formulation

Once the partition is fixed, each nonlocal gate is converted into a small activity chain. The paper models the full set of chains as a directed acyclic graph (DAG) whose nodes are network operations and whose edges encode precedence. For each nonlocal gate between QPU $S_j$4 and QPU $S_j$5, the chain contains two LLE operations, one swap, and one move. The local precedence constraints are:

• $S_j$6 starts only after both LLE operations finish.
• $S_j$7 starts only after $S_j$8 finishes.

There is also an inter-chain precedence layer: move operations are ordered so that entangled-pair availability follows the ordering of nonlocal gates in the original circuit schedule (Chandra et al., 17 Nov 2025).

This DAG is mapped to the Resource-Constrained Project Scheduling Problem. In RCPSP, each activity $S_j$9 has start time $d_j$0, duration $d_j$1, and resource requirements $d_j$2 for each resource type $d_j$3. Each resource type $d_j$4 has capacity $d_j$5. The optimization objective is

$d_j$6

subject to resource and precedence constraints: $d_j$7

$d_j$8

Here $d_j$9 is the set of activities active at time $j$0 (Chandra et al., 17 Nov 2025).

The resource types correspond to communication-qubit slots and memory-qubit slots on each QPU, plus communication-qubit slots at the switch. No resource can be used by more than one activity at the same time. In the 2-QPU case, 4 nonlocal gates induce 16 activities. In the 4-QPU case, 12 nonlocal gates induce 48 activities. In both cases every activity has duration $j$1 time steps (Chandra et al., 17 Nov 2025).

The model assumes deterministic and noiseless operations. There is no probabilistic repetition of entanglement generation, no decoherence, and no fidelity metric; the optimization target is time alone (Chandra et al., 17 Nov 2025).

4. Algorithms and end-to-end workflow

The RCPSP-based solver is implemented with PuLP, a Python linear/mixed-integer programming modeler, and solved as a MIP/ILP. The paper emphasizes that RCPSP is NP-hard, although the small instances considered are tractable (Chandra et al., 17 Nov 2025).

Alongside RCPSP, the paper defines a greedy time-marching scheduler. Its inputs are the activity count $j$2, a time horizon $j$3, activity durations $j$4, precedence constraints, resource capacities $j$5, and resource requirements $j$6. It initializes all activities as unscheduled, tracks per-time resource availability, and then iterates through time. At each step it identifies activities whose predecessors are completed, computes each ready activity’s earliest feasible start time from precedence constraints, checks resource availability over that interval, and schedules the activity immediately if feasible. The method is a basic list scheduler with earliest-start priority, no explicit critical-path metric, and no backtracking (Chandra et al., 17 Nov 2025).

The two approaches differ chiefly in horizon awareness. RCPSP optimizes globally across the full activity DAG and resource horizon, whereas the greedy heuristic commits locally as soon as an activity becomes feasible. The paper characterizes the greedy approach as near-optimal in many practical cases, with much lower computational overhead than solving an ILP, but without formal approximation guarantees (Chandra et al., 17 Nov 2025).

The overall workflow is a pipeline from circuit to network schedule. First, a compiled circuit is represented as a DAG and illustrated as a Gantt chart. Second, METIS partitions qubits across $j$7 QPUs so as to minimize cross-partition entangling gates while balancing qubit loads. Third, every entangling gate is checked against the partition: intra-partition gates remain local, while cross-partition gates become nonlocal gate requirements. Fourth, each nonlocal requirement is mapped to an LLE–Swap–Move sequence and inserted into the activity DAG with both local and global precedence constraints. Fifth, the full activity set is scheduled either by RCPSP/MIP or by the greedy heuristic, and the resulting makespan is measured (Chandra et al., 17 Nov 2025).

Approach	Mechanism	Reported role
RCPSP	Global MIP/ILP scheduling with resource and precedence constraints	Optimal for the small instances studied
Greedy heuristic	Earliest-start list scheduling with resource checks	Fast approximate scheduling

5. Case studies and observed behavior

The illustrative application is the 4-qubit Quantum Fourier Transform. The circuit includes Hadamard gates on each qubit, controlled-phase gates with angles $j$8, $j$9, and $i$0, and optional SWAPs to reverse qubit order. It is represented as a circuit diagram, a gate DAG, and a Gantt chart (Chandra et al., 17 Nov 2025).

In the 2-QPU scenario, METIS returns the bi-partition $i$1 on QPU 1 and $i$2 on QPU 2 for the 4-qubit QFT. Under this partition, there are 4 nonlocal gates, so the network scheduler must place 16 network operations. In the 4-QPU scenario, the paper considers a partition in which all entangling gates are nonlocal, yielding 12 nonlocal gates and therefore 48 network operations (Chandra et al., 17 Nov 2025).

The reported outcomes differ across resource regimes. In the 2-QPU case, RCPSP and greedy schedules differ visibly: RCPSP yields a shorter makespan and better resource utilization, while the greedy schedule produces idle periods that a global optimizer avoids. In the 4-QPU case, the two methods achieve the same makespan, even though their schedule shapes differ (Chandra et al., 17 Nov 2025).

The interpretation given in the paper is resource-driven. In the 2-QPU network, the switch and the QPUs each have only 2 communication qubits, and each QPU has only 2 memory qubits. Under these tight capacities, local early decisions can create later bottlenecks, especially at the switch. In the 4-QPU network, the system has more communication and memory qubits, and the network is less tightly constrained; under those conditions, a start-as-soon-as-possible heuristic already achieves the same makespan as the global optimizer (Chandra et al., 17 Nov 2025).

A broader design implication is that partition quality in DQC cannot be assessed solely by counting the number of nonlocal gates. The paper explicitly argues that the depth of nonlocal-gate layers also matters, because it directly affects scheduling difficulty and hence makespan under constrained communication and memory resources (Chandra et al., 17 Nov 2025).

6. Position in the literature and broader uses of the term

Within distributed quantum computing, the main contribution is the explicit integration of circuit partitioning, identification of nonlocal entangling requirements, mapping to concrete network operation sequences, and formal RCPSP-based scheduling. The paper positions this against prior work that emphasizes partitioning and teleportation protocols but not detailed network operation scheduling under explicit resource constraints (Chandra et al., 17 Nov 2025).

The same or closely related label has also been used descriptively in several neighboring literatures. "QAware: A Cross-Layer Approach to MPTCP Scheduling" formulates a queue-aware multipath scheduler using local NIC queue occupancy and RTT (Shreedhar et al., 2018). "Bandwidth-Constrained Sensor Scheduling: A Trade-off between Fairness and Efficiency" introduces a $i$3-fairness framework in which a scalar parameter $i$4 interpolates between efficiency and fairness objectives (Zhong et al., 19 Sep 2025). "Quantum circuit scheduler for QPUs usage optimization" uses combined circuits to multiplex multiple users’ workloads onto a single cloud QPU (Romero-Alvarez et al., 2024). "SDC-based Resource Constrained Scheduling for Quantum Control Architectures" develops an SDC-based scheduler for shared quantum-control instruments (Nane, 2022). "Q-Sched: Pushing the Boundaries of Few-Step Diffusion Models with Quantization-Aware Scheduling" uses scheduler-level preconditioning to compensate for quantized diffusion backbones (Frumkin et al., 1 Sep 2025).

This suggests that Q-Sched is not yet a standardized formal term. A plausible interpretation is that it functions as a family resemblance label for schedulers in which a distinguished quantity—queue state, $i$5-fairness, quantum-network resources, or quantization-aware trajectory control—acts as the primary organizing variable.

7. Limitations and future directions

The explicit DQC prototype is deliberately narrow. Its demonstrations use only a 4-qubit QFT and only small star networks with 2 or 4 QPUs. The scheduling itself is fully offline and deterministic. Only star topologies are modeled; there are no multi-hop or mesh routes, and all inter-QPU entanglement passes through the switch. Entanglement generation is deterministic rather than probabilistic, decoherence is omitted, fidelity is not modeled, and there are no fault-tolerance, error-correction, authentication, or eavesdropping mechanisms in the formulation (Chandra et al., 17 Nov 2025).

The paper identifies several extensions. One is benchmarking on larger, real circuits, including standard sets such as revkit benchmarks. Another is co-optimization of circuit compilation and network scheduling, with particular attention to minimizing makespan and nonlocal-gate depth rather than merely minimizing nonlocal-gate count. Additional directions include richer network models, security-aware scheduling, incorporation of error-correction overheads, and online or adaptive scheduling under uncertainty, including probabilistic LLE generation, fluctuating link qualities, and trade-offs between latency and entanglement fidelity (Chandra et al., 17 Nov 2025).

In that sense, Q-Sched presently denotes less a finished software stack than a scheduling pattern for DQC: represent the distributed circuit as resource-constrained network activities, preserve circuit-imposed ordering, and choose a schedule that uses scarce communication and memory qubits as efficiently as possible. The 2025 formulation makes this pattern explicit and provides a concrete baseline—RCPSP against greedy list scheduling—from which more realistic quantum-network schedulers can be developed (Chandra et al., 17 Nov 2025).