Monolithic Photolithography Process

• Monolithic photolithography is a single-step patterning process that defines device architectures across multiple domains with high precision.
• It employs advanced techniques like fs-laser ablation and chemo-mechanical polishing to ensure superior registration and uniform throughput.
• This approach facilitates the integration of photonics, nanoelectronics, and microfluidic systems while reducing alignment errors.

Monolithic photolithography processes refer to workflows in which the entire device structure—often spanning multiple functional materials or domains—is defined in a single, uninterrupted lithographic exposure or mask-writing operation, followed by one or a small number of subsequent pattern-transfer and finishing steps. These processes are characterized by the absence of fine-feature multi-level alignments, iterative layer build-up, or wafer-to-wafer assembly after the lithographic mask definition stage. Their main advantages include superior registration, process simplicity, scale, and the potential for high yield and throughput. Monolithic photolithography has enabled advanced integration in planar and nonplanar photonics, nanoelectronics, soft-matter and bio-device fabrication, and 3D nanostructuring.

1. General Principles of Monolithic Photolithography

Monolithic photolithography subsumes workflows that address the entire pattern definition—often across all active/passive regions, interfaces, or multiple topological domains—within a single lithographic exposure (or equivalent direct-write step) before pattern transfer. These processes may use conventional photoresist and mask aligners, direct-write laser ablation, or composite three-dimensional (3D) projections.

Key signatures include:

• Single-step pattern definition enables all device regions (active, passive, coupling, boundary) to be aligned in the original design coordinate space, minimizing overlay error (Zhou et al., 2022, Grishina et al., 2015).
• Maskless direct-write strategies such as femtosecond (fs) laser ablation of hard mask films permit arbitrary designs over large areas with sub-micrometer precision and "infinite" field-of-view (Chen et al., 2023).
• Integrated transfers of the lithographic pattern to functional layers (including dielectrics, semiconductors, or metals) using chemo-mechanical polishing (CMP), dry etching, or soft-lithography mold replication (Chen et al., 2023, Gao et al., 2023, Herling et al., 2013).

Monolithic workflows contrast with classical photolithography in which multiple litho–etch–align sequences are required to realize multi-material or multi-domain architectures.

2. Exemplary Platforms and Process Architectures

Various monolithic photolithography processes have been realized across different materials and device categories. Three prominent modalities are:

• PLACE (Photolithography-Assisted Chemo-Mechanical Etching): A process for lithium niobate (TFLN) (Chen et al., 2023, Gao et al., 2023, Li et al., 2023), and recently for tantalum pentoxide (Zheng et al., 22 Jan 2026), involving maskless fs-laser patterning of a Cr hard mask, followed by chemo-mechanical (slurry) polishing for ridge or ring formation. No photoresist or development is involved, and wafer-scale, maskless patterning of arbitrary building blocks (e.g. waveguides, microresonators, electrodes) is achieved.
• Single-mask tiling for active/passive integration: In "Monolithically integrated active passive waveguide array fabricated on thin film lithium niobate using a single continuous photolithography process," both passive and rare-earth-doped active LN regions are tiled and bonded, then patterned without discontinuity using fs-laser Cr ablation across the passive/active interface (Zhou et al., 2022).
• 3D Monolithic Masking: In the “single-step etch mask for 3D monolithic nanostructures” method, 3D structure is achieved by simultaneous projection of patterns onto inclined wafer faces, followed by etching along nonplanar axes (Grishina et al., 2015). The sub-3 nm mutual alignment eliminates the need for manual overlay.
• Contact photolithography and soft-lithography: For polymer, soft-matter, or microfluidic systems, a single lithography mask (resist or soft-litho mold) defines all the relevant fluidic channels and functional zones, as in the solid-wall electrode microfluidics (Herling et al., 2013).

3. Detailed PLACE Monolithic Workflow

PLACE exemplifies advanced monolithic lithographic integration on photonic platforms:

1. Substrate and Hard-Mask Preparation: Commercial thin-film-on-insulator substrates (e.g., 600–700 nm TFLN on SiO₂/LN) are coated with Cr (200–600 nm) by sputtering or evaporation (Chen et al., 2023, Li et al., 2023).
2. Fs-Laser Direct Writing: A high-repetition-rate fs-laser (λ≈1 μm, τ≲300 fs, f≫100 kHz) with a high-speed polygon scanner ablates Cr in arbitrary patterns over areas up to 200 mm × 200 mm. Effective resolution: 200–800 nm (determined by optical focus, pulse energy, scan overlap) (Chen et al., 2023). No resist is used.
3. CMP Pattern Transfer: The patterned Cr mask acts as a robust hard mask for chemo-mechanical polishing (colloidal silica, pH≈10, 50 nm particles, pad speed 100–200 rpm, downforce 1–5 psi). Exposed material is removed down to BOX; masked regions form waveguide ridges, rings, or other photonic elements (Chen et al., 2023, Gao et al., 2023).
4. Mask Removal and Finishing: Cr is stripped using wet ceric ammonium nitrate; an optional secondary CMP polishes top/sidewalls to <0.5 nm RMS roughness (Chen et al., 2023, Li et al., 2023). Optional annealing (450°C, 2 h) recovers lattice order and lowers optical loss (Li et al., 2023).
5. Single-pass Electrode/SSC Integration: Electrodes and spot-size converters are patterned monolithically via sequential fs-laser ablation and chemical etching, with direct spatial registration to the photonic features (Gao et al., 2023).

Step	Technique	Typical Values / Features
Cr mask definition	Fs-laser ablation	δ = 200–800 nm, "infinite FOV"
Pattern transfer	CMP	Etch depth: 210–700 nm, <0.5 nm RMS rough.
Mask removal	Ceric NH₄NO₃/HCl	~5 min wet etch
Sidewall smoothing	2nd CMP / anneal	α < 1 dB/m, Q_int > 10⁷ (TFLN)

PLACE delivers 200 nm resolution at 4.8 cm²/h throughput and uniformity within σ≈10 nm over full 4″ wafers (Chen et al., 2023).

4. Single-step, Multimaterial, and 3D Approaches

Monolithic photolithographic integration extends to:

• Active-passive domains: Passive and active TFLN tiles bonded at the microfabrication step, with a single continuous fs-laser Cr ablation serving both sides. <22 nm interface gap, α_interface = 0.26 dB, <± 20 nm critical-dimension (CD) uniformity over 10 mm (Zhou et al., 2022).
• Multiple domains or complex geometry: In 3D mask formation, a single projection writes two (or more) perfectly aligned patterns onto inclined faces. Subsequent anisotropic etching yields true 3D crystal lattices (e.g. cubic, tetragonal, hexagonal, monoclinic Bravais) in bulk silicon, with SEM-verified ∆x < 3 nm out-of-plane alignment (Grishina et al., 2015).
• Polymer and PDMS-based devices: Single photolithography steps simultaneously define all channel and electrode geometries for microfluidics. Self-aligned solid-wall electrodes (InBiSn) are formed by molten alloy filling/solidification, pinning to pillar arrays specified in the mask, obviating any post-fabrication alignment (Herling et al., 2013).
• Monolithic patterning of perovskite/semiconductor materials: Dual-resist, solvent-protected lithography enables direct RIE patterning of perovskite films with ~1 µm minimum critical dimension, >95% yield, LER <20 nm RMS (Fabrizi et al., 2024, Cegielski et al., 2019).

5. Performance Metrics and Critical Parameters

Monolithic photolithography enables high uniformity, registration, yield, and scaling:

• Litho resolution: 200–800 nm (fs-laser PLACE) (Chen et al., 2023, Gao et al., 2023, Zheng et al., 22 Jan 2026); down to 1 µm for contact aligners (Fabrizi et al., 2024); <3 nm pattern overlay error for 3D projections (Grishina et al., 2015).
• Feature uniformity: <5–10 nm σ_CD across full 4″ wafers; <±20 nm over multi-domain interfaces (Chen et al., 2023, Zhou et al., 2022).
• Sidewall roughness: RMS <0.5 nm by CMP and/or high-T annealing; essential for Q >10⁷ in photonic circuits (Li et al., 2023, Zheng et al., 22 Jan 2026).
• Device yield: >95% for waveguides, resonators, and solid-wall electrode microfluidics (Chen et al., 2023, Herling et al., 2013).
• Insertion loss: Typical fiber-to-fiber loss for TFLN isolators is 2.6 dB, consisting primarily of spot-size converter loss (1.25 dB/facet) and <0.1 dB/cm propagation loss (Gao et al., 2023).
• Interface loss: Passive/active TFLN: α_interface = 0.26 dB/crossing (Zhou et al., 2022).

6. Comparative Evaluation and Process Advantages

Monolithic photolithography processes outperform conventional workflows in several respects:

• No multi-step mask alignment or repeated registration steps. All patterning is effectively "once and done," minimizing overlay error and feature drift (Zhou et al., 2022, Chen et al., 2023, Grishina et al., 2015).
• Higher throughput and uniformity at moderate resolution. PLACE achieves >4.8 cm²/h at 200 nm; EBL achieves ≤50 nm but <0.1 cm²/h; contact lithography achieves ~1–2 µm (Chen et al., 2023).
• Arbitrary, maskless design complexity and scalability. PLACE fs-laser systems provide "infinite field of view," supporting entire wafer patterning in a single write without physical masks (Chen et al., 2023).
• Composite and 3D topologies. Monolithic mask projection enables nanostructured 3D crystals with true sub-5 nm overlay, unachievable by step-and-repeat or stacking (Grishina et al., 2015).
• Interface and domain continuity. Passive/active photonic channels are patterned across material boundaries simultaneously, minimizing loss and propagation mismatch (Zhou et al., 2022).
• Material and process compatibility. Adaptable to multiple substrates (LiNbO₃, Ta₂O₅, Si, perovskites, PDMS), can be designed for BEOL compatibility, low-temperature operation or high-temperature resilience per device requirements (Gao et al., 2023, Fabrizi et al., 2024, Herling et al., 2013).

7. Limitations, Challenges, and Outlook

While monolithic photolithography offers significant advances, limitations include:

• Aspect ratio and feature thickness: Defined by mask film thickness (e.g. 200 nm Cr for fs-laser PLACE) and polishing selectivity (Chen et al., 2023). Tall or vertical sidewalls require tightly controlled process parameters.
• 3D scalability: For 3D monolithic masks, crystal depth and field-of-view are limited by DRIE etch depth and exposure field (Grishina et al., 2015).
• Materials limitations: PLACE requires a substrate amenable to chemo-mechanical polishing; not suitable for all semiconductor stacks (Chen et al., 2023, Zheng et al., 22 Jan 2026).
• Resolution trade-offs: Raster scanning and overlap can increase throughput at the expense of line-edge roughness (e.g. 0.3 dB/cm excess loss), but hardware improvements may restore sub-0.1 dB/cm (Chen et al., 2023).
• Extensibility: Some processes lack detailed disclosure of resist chemistries, bake/etch parameters, or full compatibility data for emerging materials (Zhou et al., 2022, Fabrizi et al., 2024).

A plausible implication is continued adaptation of monolithic photolithography for new applications, including large-scale photonic integration, 3D nanofabrication, and stretchable device arrays, provided the workflow is carefully matched to material, resolution, and device function constraints.

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References:

(Chen et al., 2023, Gao et al., 2023, Li et al., 2023, Zhou et al., 2022, Zheng et al., 22 Jan 2026, Grishina et al., 2015, Herling et al., 2013, Fabrizi et al., 2024, Cegielski et al., 2019)