Photolithography Assisted Chemo-Mechanical Etching

• PLACE is a hybrid process that merges photolithography and chemo-mechanical etching to define high-resolution photonic structures on lithium niobate platforms.
• It leverages femtosecond-laser patterning and chemo-mechanical polishing to achieve sub-nanometer surface roughness and minimal propagation loss.
• The technique enables wafer-scale integration of waveguides, resonators, and EO modulators with enhanced performance, supporting advanced photonic applications.

Photolithography Assisted Chemo-Mechanical Etching (PLACE) is a hybrid fabrication method for integrated photonic devices, wherein photolithographic pattern definition is paired with high-fidelity chemo-mechanical material removal. This process has become central to the realization of ultra-low loss, high-index-contrast waveguides, microresonators, amplifiers, and other complex functional structures, particularly on lithium niobate on insulator (LNOI) and thin-film lithium niobate (TFLN) substrates. By leveraging femtosecond-laser patterning and chemo-mechanical polishing, PLACE overcomes the intrinsic limitations of conventional dry etching, most notably those associated with sidewall roughness, propagation loss, and process throughput.

1. Methodology and Workflow

The PLACE workflow commences with the deposition of a metal mask—typically chromium (Cr) at thicknesses between 200 nm and 600 nm—onto a crystalline lithium niobate film (commonly 300–700 nm thick) bonded to a silicon dioxide buffer on silicon substrate (Zhang et al., 2020). Femtosecond laser micromachining is employed for rapid, high-resolution mask ablation. This mask defines the geometry of the waveguide, resonator, or photonic circuit element (widths as narrow as ~466 nm and patterns extending over wafer scales) (Chen et al., 2023, Li et al., 2023).

Subsequent chemo-mechanical polishing (CMP) removes exposed lithium niobate regions. CMP operates by combining selective chemical erosion and abrasive mechanical action, yielding vertical sidewalls and sub-nanometer roughness (e.g., AFM measurements of 0.27 nm on ridge waveguides (Zhao et al., 21 Apr 2025)). The Cr mask is then removed by wet etching, and additional CMP may be performed to further smooth surfaces. For most applications, a protective and index-matching cladding such as SiO₂ (1–4 μm thick) is deposited by PECVD or ICPCVD. Tantalum pentoxide (Ta₂O₅) cladding is used in double-clad amplifiers to modify guided mode structure and gain characteristics (Liang et al., 2021).

High-throughput, wafer-scale manufacturing is achieved by synchronizing femtosecond-laser direct writing with polygon scanners and precision motion stages, enabling fabrication rates of 4.8 cm²/h at 200 nm resolution, which is field-of-view limited only by stage travel (Chen et al., 2023).

2. Material Systems and Device Structures

PLACE is primarily applied to LNOI and TFLN platforms due to their high electro-optic and nonlinear coefficients, broad optical transparency (400–5000 nm), and compatibility with hybrid integration schemes (Li et al., 2023, Liang et al., 2022). Key materials include:

• Active photonic layer: Lithium niobate, typically Z-cut, with thickness 300–700 nm. Erbium (Er³⁺) doping is introduced for waveguide amplifiers and microlasers (Zhou et al., 2021, Yin et al., 2021).
• Hard mask: Chromium (Cr), magnetron sputtered to ~400 nm thickness.
• Cladding: Silicon dioxide (SiO₂), deposited for mode confinement and protection; Tantalum pentoxide (Ta₂O₅) in high-gain amplifiers.
• Electrode metals: Au/Ti stacks for EO modulators and isolators (Gao et al., 2023).

Device structures fabricated by PLACE include single-mode waveguides (top widths ~466 nm, bottom widths ~625 nm), microring resonators (radii ~200 μm, gaps down to 3.8 μm), multi-mode interference couplers, arrayed waveguide gratings (AWG), and periodically poled ridge waveguides for efficient nonlinear frequency conversion (Wang et al., 2023, Zhao et al., 21 Apr 2025).

3. Process Physics and Performance Metrics

The chemo-mechanical etching step is governed by material removal rate $R \propto f(C, P, t)$, balancing chemical etchant concentration $C$, mechanical pressure $P$, and etching time $t$ (Zhou et al., 2021). CMP generates nearly vertical sidewalls and minimizes Rayleigh scattering, directly improving optical quality factors ($Q > 10^8$ for silica disks (Honari et al., 2021), $Q_\text{intrinsic} = 4.04 \times 10^7$ for TFLN microrings (Li et al., 2023)).

Propagation loss is a critical figure of merit, quantified as:

$$\alpha = \frac{10}{L} \log_{10} \frac{P_\text{in}}{P_\text{out}} \quad [\text{dB/cm}]$$

with $L$ as waveguide length and $P_\text{in}/P_\text{out}$ as measured input/output powers (Zhang et al., 2020). For resonators, propagation loss relates to $Q$ and group index $n$:

$\alpha = \frac{2\pi n}{Q \lambda}$

(Zhou et al., 2021, Liang et al., 2021).

In periodically poled structures, PLACE supports uniform etching across domains, eliminating polarization-dependent etch rate variation that plagues dry/ion etching (Zhao et al., 21 Apr 2025). Resulting structures exhibit propagation loss as low as 0.106 dB/cm, with second-harmonic generation (SHG) normalized efficiency $\eta_{SHG}$ up to 1742 %/(W·cm²).

4. Functional Integration and Circuit Complexity

PLACE enables monolithic integration of diverse photonic components—waveguides, amplifiers, lasers, EO modulators, isolators, and nonlinear elements—on a single TFLN chip. This integration is achieved by combining precise photolithographic definition (sub-micron resolution) with low-loss waveguide formation, ensuring modal overlaps and coupling gaps can be controlled to sub-micron precision (Li et al., 2023, Liang et al., 2022).

Waveguide tapers, fabricated by mask removal prior to CMP, facilitate fiber-to-chip coupling efficiency increases from 1% to 15% as taper length increases from 10 μm to 110 μm (Zhang et al., 2020). Arrayed waveguide gratings benefit from PLACE sidewall smoothness, reducing insertion loss from 25 dB (RIE) to 3.32 dB and achieving crosstalk levels $<-15$ dB (Wang et al., 2023).

Dual-arm EO phase modulators exploit complete utilization of the microwave field to halve $V_\pi$ (to ≈3 V for 1 cm length) and generate 29 sideband signals at 2 W input, ideal for optical frequency comb generation (Gao et al., 13 Jun 2024). EO isolators achieve 39.5 dB isolation with fiber-to-fiber insertion loss of 2.6 dB (Gao et al., 2023).

5. Experimental Results and Validation

Extensive experimental characterization demonstrates the reliability and reproducibility of PLACE:

• Waveguides: Measured propagation loss of 0.130 ± 0.008 dB/cm; SEM confirms vertical sidewalls, low roughness (Zhang et al., 2020).
• Resonators: Intrinsic $Q$ factors exceeding $10^7$ and ultra-low loaded loss ($<1$ dB/m post-annealing) (Li et al., 2023).
• Amplifiers: Er-doped TFLN devices show internal net gain of 18 dB for 3.6 cm length, differential gain of 5 dB/cm; Ta₂O₅ cladding further boosts gain above 20 dB for 10 cm devices (Liang et al., 2021).
• Modulators: EO bandwidth $>$50 GHz, voltage-length product $V_\pi L = 2.16$ V·cm, insertion loss ~2.6 dB (Wu et al., 2022).
• Nonlinear devices: PPLN ridge waveguides fabricated by PLACE yield normalized SHG efficiency of 1742 %/(W·cm²), with surface roughness 0.27 nm (Zhao et al., 21 Apr 2025).

6. Comparative Advantages and Limitations

PLACE exhibits clear advantages over electron beam lithography (EBL) and conventional dry/reactive ion etching (RIE):

Method	Sidewall roughness	Propagation loss	Scalability
PLACE	Sub-nanometer	0.106–0.13 dB/cm	Wafer-scale; rapid
EBL/RIE	≳1 nm	0.25–1 dB/cm	Slow, field-limited
FIB Milling	~5 nm	≳2 dB/cm	Sample-based

PLACE supports large writing fields due to stage-travel-limited laser direct writing, rapid mask definition (~3 min per modulator), and compatibility with wafer-scale manufacturing (Chen et al., 2023, Wu et al., 2022). Furthermore, CMP-based etching is domain-insensitive in periodically poled LN, enabling uniform ridge definition for nonlinear applications (Zhao et al., 21 Apr 2025).

Limitations include control of aspect ratios in Cr/LNOI, challenge of further reducing coupling gaps (impacts bus-microring integration), and the need for high-temperature annealing to remediate lattice damage post ion-slicing (Li et al., 2023).

7. Applications and Research Directions

PLACE-fabricated devices are exploited in photonic integrated circuits for telecommunications (DWDM filters, EO modulators, AWGs), quantum photonics, nonlinear optical conversion, sensing, microwave photonic processing, and on-chip laser systems. Continuous improvements are sought in:

• Reducing propagation loss (targeting <0.01 dB/cm for resonators and waveguides).
• Enhancing integration density and functional complexity by leveraging large-field, high-speed patterning (Chen et al., 2023).
• Optimizing active doping profiles (e.g., Er³⁺) and cladding architectures to maximize amplification and reduce modal quenching (Liang et al., 2021).
• Developing multi-channel interference cavities and EO tunable lasers with sub-10-pm wavelength control for hybrid integration (Zhou et al., 18 Jun 2024).
• Expanding capabilities for frequency comb generation and highly efficient second-harmonic generation (Gao et al., 13 Jun 2024, Zhao et al., 21 Apr 2025).

This comprehensive review reflects the state of the art as established by PLACE technique implementations and characterizations in recent thin-film lithium niobate integrated photonics research.