Emulator Superiority in High-Fidelity Simulation

• Emulator superiority is defined as the phenomenon where emulators achieve higher fidelity than low-fidelity solvers by benchmarking against high-fidelity references.
• Key mechanisms include implicit regularization, spectral filtering, and architectural strategies that preserve essential control logic while bypassing computational bottlenecks.
• Empirical studies across PDEs, LLM serving, hardware verification, and quantum simulations demonstrate significant speedups and enhanced accuracy relative to conventional approaches.

Searching arXiv for recent and relevant papers on emulator superiority and related emulation domains. Emulator superiority denotes the condition in which an emulator is not merely a faster surrogate for a simulator or lower-fidelity computational process, but is demonstrably superior according to an external reference criterion. In the most explicit formalization, a neural emulator for time-dependent partial differential equations exhibits superiority when its autoregressive rollout is closer to a higher-fidelity reference solver than the low-fidelity solver on which it was trained, quantified by a superiority ratio $\xi^{[t]}<1$ (Koehler et al., 27 Oct 2025). More broadly, the term is also used for settings in which emulators surpass conventional simulation, lower-fidelity numerical solvers, or native high-precision implementations in speed, scalability, or end-to-end fidelity, as in system-on-chip verification (Cong et al., 2016), LLM serving (Da et al., 1 May 2026), hybrid-memory studies (Akram et al., 2018), quantum computation (Robertson et al., 2024, Häner et al., 2016), and precision-emulated matrix multiplication (Lu et al., 24 Jun 2026). Across these literatures, emulator superiority is not a single algorithmic trick but a recurring methodological pattern: preservation of critical system dynamics together with abstraction or replacement of the dominant bottleneck.

1. Conceptual definition and formal criterion

In the PDE literature, emulator superiority is defined against a high-fidelity reference solver rather than against the training target alone. For a time-dependent PDE

$\partial_t u = \mathcal{L}(u),$

a low-fidelity numerical solver at grid size $h$ induces a discrete evolution

$$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$

and a neural emulator $f_\theta$ is trained by one-step mean-squared error to mimic $\mathcal{P}_h$: $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$ The conventional assumption is that such an emulator cannot exceed the fidelity of its training solver when judged against a better reference. "Neural Emulator Superiority: When Machine Learning for PDEs Surpasses its Training Data" formalizes the contrary possibility through the superiority ratio

$\xi^{[t]} = \frac{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(f_\theta^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(\mathcal{P}_h^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }\,,$

where $\tilde{\mathcal{P}}_h$ is a higher-fidelity reference solver and $\tilde\zeta$ is a test metric such as nRMSE. If $\partial_t u = \mathcal{L}(u),$0, the emulator is more accurate than the solver from which it learned (Koehler et al., 27 Oct 2025).

That definition is unusually strict because superiority is measured relative to an external target rather than the training labels. This suggests a useful general distinction between ordinary emulation, which replaces an expensive process with a faster approximation, and superiority in the stronger sense, where the emulator improves on the source system under a more authoritative evaluation protocol. Other fields use the expression more broadly, but the same structure recurs: an emulator replaces a costly or limited subsystem while preserving enough of the original pipeline that the resulting system outperforms prevailing baselines in the metric that matters most for the application (Da et al., 1 May 2026, Cong et al., 2016).

2. Theoretical mechanisms underlying superiority

The PDE analysis in (Koehler et al., 27 Oct 2025) gives the clearest theoretical account of why superiority can arise. Closed-form proofs are provided for state-space superiority, $\partial_t u = \mathcal{L}(u),$1, for three linear PDEs under periodic boundary conditions: advection, diffusion, and Poisson. The derivation assumes Fourier diagonalization of circulant solvers, single-mode training, and a linear two-parameter convolutional emulator ansatz in Fourier space. Under these assumptions, the training objective collapses to matching the low-fidelity solver on a single Fourier mode, but the learned operator generalizes differently across other modes. Superiority appears because the emulator’s spectral response can deviate from the training solver in precisely those frequency regions where the solver is most inaccurate relative to the analytic reference (Koehler et al., 27 Oct 2025).

The paper identifies several mechanisms. First, implicit regularization can act as a spectral filter: architectural bias, especially local convolution or limited spectral capacity, suppresses solver-specific numerical artifacts. Second, one-step optimization can yield better multi-step rollouts because the emulator may reduce structured error accumulation even if it does not exactly replicate the training operator. Third, superiority persists for moderate rollout horizons before eventual parity as $\partial_t u = \mathcal{L}(u),$2 (Koehler et al., 27 Oct 2025). Empirically, ablations support these mechanisms: smaller receptive fields in ConvNets and fewer active modes in FNOs often strengthen superiority because they reduce overfitting to low-fidelity artifacts.

A related, though domain-specific, principle appears in high-precision linear algebra. EmuGEMM reconstructs high-precision GEMM from low-precision INT8 Tensor Core operations using Ozaki Schemes I and II, but its superiority does not stem from learning. Instead, it results from a systems-level reformulation that eliminates redundant global-memory materialization of intermediates. By fusing the compute and reconstruction phases on-chip, EmuGEMM sustains up to 1,639 Top/s on Hopper and 3,654 Top/s on Blackwell, surpassing cuBLAS TF32 throughput by up to $\partial_t u = \mathcal{L}(u),$3 on Hopper and $\partial_t u = \mathcal{L}(u),$4 on Blackwell, at comparable accuracy (Lu et al., 24 Jun 2026). This suggests a broader interpretation of emulator superiority: an emulator can outperform the native implementation when it exposes a more favorable computational structure than the direct high-fidelity path.

In quantum emulation, the same idea appears as algorithmic shortcutting. High-level emulation of QFT, arithmetic, and phase estimation can replace long gate sequences with classical FFTs, direct permutation logic, or eigendecomposition. The resulting advantage comes not from approximate imitation of gates, but from recognizing a structured subroutine and dispatching to a faster classical analogue (Häner et al., 2016, Robertson et al., 2024). A plausible implication is that superiority often emerges when the emulator captures invariants or algebraic structure that the baseline processes only indirectly.

3. Architectural patterns that enable superior emulators

Despite wide variation in application domains, superior emulators tend to share a common architectural strategy: they preserve the expensive system’s control logic, dataflow, or semantic interface, while replacing only the dominant bottleneck.

The most explicit instance is LLM-Emu, implemented as a 2.5 K-line plugin atop vLLM 0.18.1. It preserves 100% of vLLM’s HTTP API, admission path, dynamic iteration-level scheduler, KV-cache manager (PagedAttention), chunked prefill logic, and output-processing pipeline, while replacing only the GPU forward pass with profile-sampled latency and synthetic token IDs. Each emulated step returns immediately with a Python Future that resolves after a sampled latency, so queueing, batching, and scheduler-worker overlap remain in real wall-clock time (Da et al., 1 May 2026). This design lets the emulator reproduce online serving behavior without reimplementing the serving engine.

A parallel strategy appears in SoC hardware emulation. Mentor Graphics Veloce preserves cycle-accurate execution and full RTL visibility while moving execution from software simulation to hardware emulation. In the ORPSoC workflow, C programs are compiled to memory images, the ORPSoC design is compiled and synthesized, and the emulator is loaded with bitstream, memory image, and trigger definitions; execution then proceeds until trigger-detected termination, with full-trace waveforms recorded under trigger control (Cong et al., 2016). The decisive architectural choice is that emulation does not discard signal-level observability, which distinguishes it both from slow software simulation and from FPGA prototyping with limited probes.

NUMA-based hybrid-memory emulation follows the same pattern at the OS and runtime level. A dual-socket NUMA server maps one socket’s local DRAM to emulated DRAM and the remote socket’s DRAM to emulated NVM, with mutator and VM threads pinned to the local socket. Heap regions are explicitly placed using numa_alloc_onnode() or mbind(), allowing real runtimes such as Jikes RVM to exercise alternative garbage collectors and allocation policies under emulated heterogeneous memory (Akram et al., 2018). The emulator is effective because it preserves execution of the real software stack while altering memory-placement semantics to mimic asymmetric latency.

In quantum emulation, UNIQuE is expressly not a gate-by-gate simulator. It emulates high-level quantum subroutines—integer arithmetic, QFT, and QPE—by computing the final state vector directly with optimized classical routines (Robertson et al., 2024). The older high-performance quantum emulation work similarly emphasizes access to a high-level representation so that arithmetic or QFT blocks can be recognized and replaced by classical kernels (Häner et al., 2016). In both cases, superiority is enabled by preserving algorithmic semantics while avoiding low-level gate expansion.

4. Empirical manifestations across domains

The empirical record for emulator superiority is heterogeneous because different papers measure different endpoints, but several recurring patterns are evident.

In hardware verification, ORPSoC emulation on Veloce is reported as more than ten times faster than hardware simulation overall, with the simple “SUM N” benchmark showing speedups from $\partial_t u = \mathcal{L}(u),$5 at $\partial_t u = \mathcal{L}(u),$6 to $\partial_t u = \mathcal{L}(u),$7 at $\partial_t u = \mathcal{L}(u),$8. For Linux boot, involving approximately 55 million instructions and approximately 198 million cycles, ModelSim is estimated at approximately 3 hours, while Veloce completes in 127.1 s, for an approximate speedup of $\partial_t u = \mathcal{L}(u),$9 (Cong et al., 2016). CHStone applications show speedups from approximately $h$0 for small loops to approximately $h$1 for compute-intensive kernels.

In LLM serving, superiority is expressed primarily as serving-native fidelity at far lower GPU cost than real experiments. Across six cells combining hardware, model, and workload, LLM-Emu’s steady-state metrics remain close to real GPU runs: maximum absolute error under Poisson arrivals is at most $h$2 for TPOT, $h$3 for ITL, $h$4 for E2E latency, $h$5 for output throughput, and $h$6 for TTFT. Aggregated over all six cells and five rates, TPOT and ITL stay within $h$7 absolute error, E2E within $h$8, and throughput within $h$9 (Da et al., 1 May 2026). This is superiority relative to prior simulators in preserving production scheduling and queueing behavior rather than superiority over training data.

In hybrid-memory research, NUMA-based emulation reduces run times from hours to minutes while retaining predictive accuracy for write rates. Sample results report simulation times of 8–12 h versus emulation times of 2–4 min, with speedups around $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$0 to $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$1 and write-rate errors of approximately $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$2 (Akram et al., 2018). Emulation also surfaces effects absent from the simulator, including super-linear write amplification under multiprogramming and full-system writes outside the managed heap.

In nuclear many-body applications, emulator superiority is often framed as acceleration without material loss of accuracy. For AFDMC deuteron calculations trained on only five points, the PMM emulator attains average error approximately $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$3 with speed-up factors of approximately $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$4, outperforming the reduced-basis method and Gaussian process baseline in the reported setting (Somasundaram et al., 2024). In sub-barrier fusion reactions, the eigenvector continuation emulator reduces full coupled-channels calculations from $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$5–$$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$6 per excitation function to seconds for full $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$7 scans, with reported speed-ups of $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$8, $$\mathbf{u}_h^{[t+1]} = \mathcal{P}_h(\mathbf{u}_h^{[t]}),$$9, and $f_\theta$0 for three benchmark systems and errors in penetrability below $f_\theta$1 or better (Liao et al., 10 Dec 2025).

In cosmology, Dark Emulator predicts halo-matter cross-correlation with accuracy better than $f_\theta$2 and halo auto-correlation with accuracy better than $f_\theta$3 for typical halos hosting CMASS galaxies, while producing model outputs in a few CPU seconds (Nishimichi et al., 2018). The styled neural network field-level emulator for cosmological $f_\theta$4-body simulations reports accurate statistics down to scales of $f_\theta$5, representing a considerable improvement over both COLA and a fiducial CNN without cosmology dependence; the summary states speed $f_\theta$6 faster than full $f_\theta$7-body (Jamieson et al., 2022). PROVABGS reports a neural SPS emulator with $f_\theta$8 error and approximately $f_\theta$9 speed-up, reducing per-galaxy posterior fitting from approximately 10–13 CPU hr to approximately 4–6 min (Kwon et al., 2022).

Quantum emulation exhibits perhaps the widest performance spread. UNIQuE reports observed fitting formulas showing lower exponents or lower prefactors than simulation for addition and QFT, flat cost in QPE precision $\mathcal{P}_h$0, and successful factoring of $\mathcal{P}_h$1 using Shor’s algorithm on 44 qubits in 1662.4 s (Robertson et al., 2024). The earlier high-performance quantum emulation work reports $\mathcal{P}_h$2 acceleration for reversible multiplication and $\mathcal{P}_h$3–$\mathcal{P}_h$4 speedups for QFT under weak scaling (Häner et al., 2016). At the utility scale, MPS-based quantum emulators solve 8 benchmarks up to 1,024 qubits and 12 benchmarks up to at least 100 qubits in less than 5 minutes, outperforming tensor-network, decision-diagram, and factorized-ket alternatives overall (Leonteva et al., 18 Apr 2025).

The following table summarizes representative superiority claims across domains.

Domain	Baseline exceeded	Reported result
PDE neural operators	Low-fidelity training solver	$\mathcal{P}_h$5 for suitable regimes (Koehler et al., 27 Oct 2025)
SoC verification	RTL simulation	More than ten times faster overall; Linux boot $\mathcal{P}_h$6 (Cong et al., 2016)
LLM serving	Prior simulators / costly GPU runs	TPOT and ITL within $\mathcal{P}_h$7, E2E within $\mathcal{P}_h$8, TPS within $\mathcal{P}_h$9 (Da et al., 1 May 2026)
Hybrid memory	Cycle-level simulation	Speedups around $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$0–$$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$1, write-rate error $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$2 (Akram et al., 2018)
AFDMC emulation	Full AFDMC and other surrogates	PMM error $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$3, speed-up $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$4 (Somasundaram et al., 2024)
Quantum precision emulation	Native high-precision GEMM	Up to $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$5 over cuBLAS TF32, up to $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$6 over ZGEMM (Lu et al., 24 Jun 2026)

5. Benchmarking, validation, and common misconceptions

A central issue in emulator superiority is benchmark choice. If an emulator is evaluated only against the low-fidelity source it imitates, superiority in the strong sense cannot be detected. The PDE work makes this explicit by insisting on high-fidelity or analytic references for test metrics and by distinguishing one-step imitation from rollout fidelity (Koehler et al., 27 Oct 2025). Its practical recommendation is to benchmark against higher-fidelity references and to probe both state-space and autoregressive generalization.

A related lesson appears in LLM serving. Existing simulators may operate offline or in time-warped mode, re-implement scheduling, or omit production HTTP and queueing effects. LLM-Emu argues that such omissions make errors “not directly comparable in an online serving context,” and therefore preserves the production control path while replacing only GPU forward execution (Da et al., 1 May 2026). This suggests that emulator superiority is often inseparable from evaluation realism: an emulator may look inferior in microbenchmarks yet superior in end-to-end behavior.

In active-learning work for emulator construction, superiority refers not to runtime execution alone but to the efficiency of training-point selection. The self-terminating active-learning algorithm in (Ellis et al., 2018) outperforms fixed space-filling designs when simulator smoothness varies over the domain, yielding lower RMSE and MAX with the same or fewer simulator runs. The paper reports, for example, that on a 2D “bumpy” function, Algorithm 1 reached sRMSE approximately $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$7 and sMAX approximately $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$8 using $$L(\theta) = \mathbb{E}_{\{\mathbf{u}_h^{[t]},\mathbf{u}_h^{[t+1]}\}}\bigl[\|f_\theta(\mathbf{u}_h^{[t]}) - \mathbf{u}_h^{[t+1]}\|_2^2\bigr].$$9 points, whereas MaxPro with $\xi^{[t]} = \frac{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(f_\theta^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(\mathcal{P}_h^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }\,,$0 still yielded sMAX approximately $\xi^{[t]} = \frac{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(f_\theta^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(\mathcal{P}_h^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }\,,$1 at $\xi^{[t]} = \frac{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(f_\theta^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(\mathcal{P}_h^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }\,,$2. Here the superior object is not the emulator architecture but the workflow for constructing it.

A common misconception is that emulators are necessarily less faithful because they are “approximations.” Several studies directly challenge this. In the PDE setting, the emulator can be more accurate than its training solver against a higher-fidelity reference (Koehler et al., 27 Oct 2025). In quantum emulation, high-level emulators can be exact with respect to ideal algorithm semantics while avoiding gate-level simulation overhead (Robertson et al., 2024, Häner et al., 2016). In hardware verification, emulation preserves full signal visibility while substantially accelerating runtime (Cong et al., 2016). These examples show that the approximation lies in the chosen representation, not necessarily in the metric of interest.

Another misconception is that superiority means universal dominance. The literature does not support that claim. Small SoC benchmarks show marginal speedup below $\xi^{[t]} = \frac{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(f_\theta^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }{ \mathbb{E}_{\mathbf{u}_h^{[0]}\sim\tilde{\mathcal{I}_h}} \bigl[\tilde\zeta\bigl(\mathcal{P}_h^t(\mathbf{u}_h^{[0]}),\,\tilde{\mathcal{P}_h^t(\mathbf{u}_h^{[0]})\bigr)\bigr] }\,,$3 because of fixed setup overhead (Cong et al., 2016). LLM-Emu reports that TTFT is less stable because of sensitivity to admission timing and CUDA graph warmup (Da et al., 1 May 2026). NUMA-based memory emulation does not exactly match real NVM latency, bandwidth, write energy, or endurance behavior (Akram et al., 2018). The large-scale comparison of 29 emulators concludes that no single emulator “wins” everywhere; performance depends strongly on smoothness, dimensionality, sample size, and noise regime (Rumsey et al., 9 Dec 2025). Emulator superiority is therefore regime-dependent, not absolute.

6. Limitations, trade-offs, and future directions

The main trade-off in superior emulation is selective fidelity. Preserving the “right” subsystem yields large gains, but omitted effects define the boundary of validity. LLM-Emu is single-node and leaves multi-GPU and multi-node cluster dynamics to future validation; each profile pack also costs approximately 3.5–4.5 hours of GPU time to collect approximately 276 K samples (Da et al., 1 May 2026). ORPSoC emulation requires initial compile and synthesis overhead, trigger-engine expertise, and expensive, power-hungry hardware with finite emulator capacity (Cong et al., 2016). NUMA-based NVM emulation cannot model wear-leveling or true device-level endurance, which must be handled externally (Akram et al., 2018).

In PDEs, superiority regions depend on solver fidelity, spectral error structure, emulator architecture, and rollout horizon. As solver quality improves, the room for superiority can vanish. The Burgers ablations in (Koehler et al., 27 Oct 2025) indicate that increasing the number of Picard iterations reduces baseline error and correspondingly reduces the scope for superiority. This suggests that superiority is often a differential phenomenon: it is strongest where the source process has structured, learnable defects.

Several future directions recur across the literature. One is expansion from single-device to distributed settings, as in LLM serving and cross-architectural emulation (Da et al., 1 May 2026, Parker, 6 Jan 2025). Another is systematic identification of structure that admits shortcutting, as in quantum compiler IRs and direct-translation engines (Häner et al., 2016, Parker, 6 Jan 2025). A third is uncertainty-aware or reproducible benchmarking: the large-scale surrogate comparison in (Rumsey et al., 9 Dec 2025) emphasizes unified evaluation environments and standardized metrics, while nuclear and cosmological emulators increasingly target Bayesian inference workflows (Liao et al., 10 Dec 2025, Kwon et al., 2022).

A final theme is that emulator superiority often requires a change in what is considered the authoritative baseline. For PDE learning, the relevant comparator is the higher-fidelity reference, not the low-fidelity training labels (Koehler et al., 27 Oct 2025). For online LLM serving, it is production wall-clock behavior, not isolated operator latency (Da et al., 1 May 2026). For hardware verification, it is the combined objective of speed, observability, and debuggability, not raw cycle simulation alone (Cong et al., 2016). This suggests that emulator superiority is fundamentally an evaluative concept: an emulator is superior when it improves the quantity that matters operationally, even if it departs from the immediate mechanism it was designed to replace.