Dynamic Programmable Qubit Arrays
- DPQAs are quantum architectures that allow movable qubits, reprogrammable connectivity, and dynamic control, enabling adaptable system configurations.
- They use techniques such as optical tweezer rearrangement and acousto-optic transport to modify qubit positions and interaction graphs in real time.
- Hardware-aware compilation in DPQAs exploits structured gate layers and minimal movement to optimize performance and error resilience in quantum circuits.
Dynamically Programmable Qubit Arrays (DPQAs) are quantum-processing architectures in which qubit positions, effective connectivity, and control patterns are reconfigured in space and time by external controls rather than fixed entirely by fabrication. In the broad architectural sense, the term denotes platforms where qubits can be rearranged, their connectivity graph can be reprogrammed during execution, and interactions can be selectively turned on and off; in the most concrete contemporary usage, it refers to gate-based neutral-atom processors built from spatial-light-modulator-defined tweezer arrays, acousto-optic-deflector-driven transport, and mixed global–local control (González-Cuadra et al., 2023, Balewski et al., 14 Jul 2025). The concept has become especially salient in neutral-atom computing because high qubit counts, long coherence times, and coherent atom transport allow compilation, routing, and measurement to be treated as architecture-level degrees of freedom rather than fixed background constraints.
1. Conceptual scope and emergence
DPQAs differ from fixed-programmable qubit arrays by permitting mid-circuit or run-by-run reconfiguration of the interaction graph. In the neutral-atom literature, this reconfigurability is realized by moving atoms in optical tweezers, changing which pairs fall within Rydberg-blockade range, and combining those geometry changes with globally applied pulses and selective local addressing (Balewski et al., 14 Jul 2025). More abstractly, the same idea appears in descriptions of platforms where geometry, connectivity, and even the type of information per site are programmable, as in fermionic neutral-atom processors that combine motional fermionic modes with internal-state qubits (González-Cuadra et al., 2023).
An early gate-model neutral-atom implementation already exhibited several DPQA traits: a 7×7 array of cesium atoms with spacing, deterministic loading through tweezer rearrangement, global microwave rotations, local gates from a focused 459 nm beam, and Rydberg-blockade gates, with demonstrations of GHZ states up to 6 qubits, quantum phase estimation, and QAOA (Graham et al., 2021). That system still relied on a largely static register geometry during a circuit, but it established the central DPQA principle that a regular array can realize different logical interaction graphs through programmable optical control rather than device redesign.
Software abstractions followed closely. In pulse-level neutral-atom control, a Register specifies atom positions, a Channel specifies global or local Raman or Rydberg control, and a Sequence defines the time-dependent Hamiltonian through waveforms for , , and (Silvério et al., 2021). This framing is important because DPQAs are not only devices with movable qubits; they are also systems in which layout and Hamiltonian programming are exposed to compilers and users as first-class objects.
2. Neutral-atom architectural realization
The architectural model that has become most closely associated with DPQAs is a gate-based neutral-atom processor modeled on recent Rb-based systems. Atoms are trapped at SLM-defined sites and moved by AOD-driven tweezers; moving atoms mid-circuit changes which pairs are within Rydberg-blockade range and thereby reconfigures the connectivity graph during computation (Balewski et al., 14 Jul 2025). In the single-zone compilation model used for QCrank, all qubits occupy one rectangular operation zone containing address qubits and data qubits arranged in rows. The native gate set consists of arbitrary single-qubit rotations in local and global variants, two-qubit CZ gates realized by global Rydberg pulses, explicit move operations for atom shuttling, and global destructive Z-basis measurement at circuit end.
Several hardware properties are central. Global single-qubit gates apply the same unitary to all atoms in the zone and are modeled as higher-fidelity operations than local single-qubit addressing. Global CZ pulses simultaneously entangle all address–data pairs placed within the chosen interaction pattern. Atom moves can be executed in parallel provided their trajectories do not cross. The architecture supports high qubit counts, parallel gate execution, and long coherence times, with experimental systems already at hundreds of qubits, parallel gate fidelities around , , gate times of about 0, and atom-move times of 1–2 (Balewski et al., 14 Jul 2025).
The same literature also emphasizes that real devices are zoned. Storage zones, entanglement zones, and measurement zones can be populated dynamically, and atoms can be shuttled between them with high-fidelity SLM↔AOD transfers. That zoned picture is explicit in multi-programming work, where a neutral-atom QPU is partitioned into storage, entanglement, and measurement regions and then re-partitioned logically into “virtual zone layouts” for concurrent circuits (Romão et al., 13 Jan 2026). This suggests that “dynamic programmability” in current neutral-atom systems is not limited to changing neighbors; it also includes changing which physical region implements which logical role at a given moment.
A related architectural extension replaces purely single-atom ancillae with small ensembles. In dual-type, dual-element arrays, 3 atoms store data qubits while 4 ensembles provide ancillary control and readout. Selective initialization of ensembles into collective Rydberg states, together with interspecies blockade, allows the control mask, local-gate pattern, and measurement pattern to be programmed without directly applying tightly focused control beams to each data qubit (Zhang et al., 21 Mar 2025).
3. Programming abstractions and control infrastructure
DPQAs require a control stack that can express time-dependent geometry and time-dependent fields. In neutral-atom pulse programming, the central Hamiltonian for the ground–Rydberg configuration is written as
5
with geometry stored in the register and waveforms specifying 6, 7, and 8 (Silvério et al., 2021). This is already a DPQA programming model: positions determine 9, while pulses determine 0.
At the control-hardware level, instruction-driven signal synthesis provides a different but complementary abstraction. A scalable qubit controller implemented on an Intel Stratix FPGA uses 22 parallel instruction execution cores, DDS-based signal synthesis, 2 ADC channels with a measurement unit, a 20 Gbps PCIe interface, and a 5 ns control cycle. Its ISA includes STA, STF, STP, STAP, WAIT, SYNC, and RDO, with explicit support for per-instruction conditionals based on measurement bits (Khammassi et al., 2022). Although demonstrated on spin qubits, this is directly relevant to DPQAs because it replaces precomputed waveform libraries with parameterized, instruction-level pulse synthesis and supports real-time feedback and rapid retuning.
Low-latency feedback is similarly important in superconducting dynamic-circuit systems. A BBN stack based on FPGA readout DSP, APS2 control modules, and a Trigger Distribution Module achieved a 428 ns digital loop and about 538 ns device-to-device latency, enabling conditional branching, loops, and subroutines within a fraction of superconducting coherence times (Ryan et al., 2017). In modular superconducting experiments spanning multiple QPUs, a real-time classical link enabled quantum gates on one QPU conditioned on measurements on another, and dynamic circuits plus circuit cutting were used to prepare states involving up to 142 qubits across multiple processors (Vazquez et al., 2024). These works do not define DPQAs in the neutral-atom sense, but they establish a broader systems principle: dynamic programmability depends as much on controller latency, synchronization, and conditional execution as on the qubit hardware itself.
4. Compilation and algorithm–hardware co-design
The clearest contemporary compilation case study is QCrank on a DPQA. QCrank encodes sequenced real-valued classical data into a quantum state using 1 address qubits and 2 data qubits, with capacity
3
and target state
4
where the actual circuit uses 5 rotations related to 6 through a Walsh–Hadamard transform on the address index (Balewski et al., 14 Jul 2025). Under the assumption that 7 is divisible by 8, the quoted depth is
9
with parallelism factor 0.
What makes QCrank DPQA-friendly is not low entangling count—the CZ count equals the sequence length 1—but regularity. After transpilation, the circuit becomes a sequence of global Hadamard layers, structured 2 layers, and bipartite address–data CZ layers. Compilation then exploits three principles: move only the smaller address register, use horizontal moves for cyclic permutations and vertical moves for row switching, and maximize the number of CZs performed in one global pulse (Balewski et al., 14 Jul 2025). In the representative 3 layout, address qubits are shuttled across rows of fixed data qubits, and each CZ cycle consists of a horizontal permutation, a global CZ on one row, a vertical move, and a second global CZ on another row. The compiler’s implicit cost model prioritizes CZ count, move count, and spectator exposure to global pulses.
The paper generalizes these observations beyond QCrank. Circuits with bipartite address–data structure are natural fits for DPQAs; circuits that can be rewritten as global single-qubit layers plus structured global CZ layers plus limited move layers are especially suitable; and when noise is strongly Z-biased, moving the control register rather than the data register reduces logical damage to encoded data (Balewski et al., 14 Jul 2025). This is a characteristic DPQA compilation lesson: algorithm design, routing, and noise asymmetry must be treated jointly.
At a larger system scale, MultiQ extends this co-design philosophy from one circuit to many. Each circuit is first compiled into a virtual zone layout, then bundled with others using spatial utilization
4
temporal utilization
5
and an objective
6
with placement and movement conflicts resolved by simulated annealing and graph-coloring style scheduling (Romão et al., 13 Jan 2026). In this formulation, a DPQA is a spatially and temporally partitionable substrate whose compilation target is not merely gate count but hardware occupancy.
5. Representative workloads and application domains
The DPQA concept has been developed far beyond standard qubit-circuit compilation. In fermionic quantum processing with programmable neutral-atom arrays, motional states of fermionic atoms represent native fermionic modes, while state-dependent traps and Rydberg interactions provide tunable tunneling and density–density gates. The native fermionic gate set
7
implements fermionic interactions directly, avoiding Jordan–Wigner strings and enabling constant-depth decompositions for density-dependent tunneling and pair tunneling (González-Cuadra et al., 2023). A hybrid fermion–qubit DPQA then supports quantum phase estimation and 8 lattice-gauge-theory dynamics with co-located fermionic and qubit degrees of freedom. This broadens DPQAs from “movable qubits” to “dynamically programmable fermion–qubit arrays.”
Programmable disorder is another application domain. In positionally disordered tweezer arrays with interactions
9
the collective magnetization decays approximately as
0
and the stretch exponent obeys the empirical scaling
1
where 2 is the width of the interaction distribution (Mukherjee et al., 24 Apr 2025). The paper’s “J-mapping” constructs one-dimensional arrays whose nearest-neighbor couplings reproduce a target disorder distribution, allowing a 1D DPQA to emulate glassy relaxation from higher-dimensional disordered systems. Here the programmable resource is not only connectivity but the statistics of the couplings themselves.
Fault-tolerant and measurement-based directions are explicit in dual-type, dual-element arrays. Ensemble-assisted local gates yield individually addressable single-qubit operations with fidelity 3 and multi-qubit operations with fidelity 4, while repeated ensemble-based single- and multi-qubit readout exceeds 5 within tens of microseconds (Zhang et al., 21 Mar 2025). The same work develops surface-code stabilizer measurement by moving ensembles between plaquettes in four steps, making the measurement graph itself dynamically programmable.
6. Noise, accuracy, and comparative performance
A DPQA-specific noise model must include not only gate errors but movement and spectator effects. In the QCrank study, all noise is modeled as Pauli channels in a Qiskit density-matrix simulator, with strongly Z-biased errors for moves, spectator exposure, and global CZ gates (Balewski et al., 14 Jul 2025). The operation-specific channels are summarized below.
| Operation | Channel | Parameters |
|---|---|---|
| Local single-qubit gate | Depolarizing | 6 |
| Global single-qubit gate | Depolarizing | 7 |
| Move | Pauli | 8 |
| CZ spectator | Pauli | 9 |
| Global CZ | Two-qubit Pauli | 0 for IZ, ZI, ZZ; 1 for the remaining 12 non-identity terms |
| Measurement | Pauli | 2 |
These choices reflect a central DPQA asymmetry: Z-errors on address qubits often do not distort the encoded data, while Z-errors on data qubits can flip the sign of 3 contributions and later become more damaging X-errors after final Hadamards. That asymmetry motivates moving and exposing address qubits preferentially, not data qubits (Balewski et al., 14 Jul 2025).
Performance is evaluated through RMSE between encoded and reconstructed data for QCrank instances storing 24–320 real numbers in 6–20 qubits. Ideal DPQA simulations give nearly constant RMSE 4, set by finite sampling, while noisy DPQA simulations show increasing RMSE with input size 5 but comparatively mild scaling. The paper characterizes this as “promising accuracy scaling,” and compares it with Quantinuum’s H1-1E emulator and IBM Fez experimental results. H1-1E shows similar scaling in some regimes, especially when 6, whereas IBM Fez exhibits substantially larger RMSE because sparse connectivity induces heavy SWAP overhead (Balewski et al., 14 Jul 2025). Architecturally, the comparison is sharp: DPQAs substitute physical reconfiguration for logical routing through SWAPs.
System-level utilization results reinforce the same point. MultiQ reports throughput improvements from 7 to 8 when co-executing 4 to 14 circuits on a neutral-atom QPU, with fidelity ranging from a 9 improvement for four circuits to only a 0 loss for fourteen circuits (Romão et al., 13 Jan 2026). This indicates that the dynamic and zoned nature of a DPQA is valuable not only for single-program compilation but also for multi-program scheduling and initialization amortization.
7. Extensions and open directions
The DPQA concept is already broader than neutral-atom gate arrays alone. In integrated photonics, a lattice of phase-modulated MZIs with embedded quantum emitters has been proposed as a programmable gate array in which each cell carries tunable single-qubit phases and an on/off entangling setting, allowing arbitrary circuits to be implemented without hardware modification (Bartlett et al., 2019). In waveguide QED, dynamically modulated qubit arrays use time-dependent resonance frequencies
1
to program sideband structure, parity conversion, and frequency-resolved photon correlations (Ilin et al., 2022). These are not neutral-atom DPQAs, but they show that the underlying idea—programming connectivity and interaction structure by control fields rather than by fabrication—has become platform-agnostic.
Within neutral atoms, several directions remain central. Multi-zone compilation and routing are still largely open; more detailed noise models must incorporate transport dynamics and atom loss; and automated compilers must handle move counts, spectator exposure, and zone occupancy as first-class costs (Balewski et al., 14 Jul 2025). At the controller layer, higher channel density, on-board calibration, and hierarchical timing domains are natural continuations of instruction-driven qubit control (Khammassi et al., 2022). In disorder-engineered arrays, time-dependent positional disorder and dynamic reconfiguration during evolution remain explicit future directions (Mukherjee et al., 24 Apr 2025).
A plausible synthesis is that DPQAs are best understood not as a single device type but as an architecture class defined by four coupled capabilities: reconfigurable geometry, programmable control fields, explicit movement or routing primitives, and hardware-aware compilation. Neutral-atom arrays presently provide the clearest full-stack realization of this model, because they combine high qubit counts, long coherence times, global entangling pulses, and coherent transport in a way that makes qubit movement, zone assignment, and noise bias integral parts of the computation rather than peripheral implementation details (Balewski et al., 14 Jul 2025).