Bias-field Digitized Counterdiabatic Quantum Optimizer

Updated 2 November 2025

BF-DCQO is a fully quantum, digitized optimization algorithm that combines counterdiabatic driving with iterative bias-field updates to efficiently tackle large-scale combinatorial problems like HUBO and Ising spin-glass models.
It employs a digitized protocol via Suzuki-Trotter decomposition, optimized gate sequencing, and bias feedback mechanisms to reduce circuit depth and enhance gate efficiency on diverse quantum hardware.
Experimental and simulation results demonstrate superior performance with higher approximation ratios and reduced two-qubit gate counts compared to traditional QAOA and quantum annealing approaches.

The Bias-field Digitized Counterdiabatic Quantum Optimizer (BF-DCQO) is a fully quantum, digitized optimization algorithm designed to efficiently solve large-scale combinatorial problems—most notably higher-order unconstrained binary optimization (HUBO) and dense Ising spin-glass models—on current gate-based quantum processors. It employs a combination of digitized counterdiabatic (CD) driving and iterative bias-field updates, resulting in significant scaling improvements in ground-state success probabilities and approximation ratios, compared to quantum approximate optimization algorithm (QAOA), digitized adiabatic protocols, and prior DCQO formulations. BF-DCQO markedly advances the gate-based quantum algorithm toolkit, demonstrating high fidelity and scalability on both trapped-ion and superconducting architectures (Cadavid et al., 22 May 2024, Romero et al., 5 Sep 2024, Chandarana et al., 13 May 2025, Romero et al., 9 Jun 2025).

1. Algorithmic Principles and Hamiltonian Construction

BF-DCQO addresses combinatorial optimization by encoding instances as Ising-type Hamiltonians of the form

$H_f = \sum_{i<j} J_{ij} \sigma^z_i \sigma^z_j + \sum_i h_i \sigma^z_i + \sum_{i<j<k} K_{ijk} \sigma^z_i \sigma^z_j \sigma^z_k$

supporting both pairwise and higher-order interactions without resorting to quadratization or ancillary qubits. The algorithm interpolates between a simple initial Hamiltonian and the problem Hamiltonian: $H_{\rm ad}(\lambda) = (1-\lambda(t)) H_i + \lambda(t) H_f$ where typically $H_i = -\sum_{i=1}^N \sigma^x_i$ , but is enhanced with a longitudinal bias-field $H^b_i = \langle \sigma^z_i \rangle$ that is iteratively updated from measurement feedback. The evolution is further accelerated and diabatic transitions suppressed by the addition of a (truncated) counterdiabatic term (adiabatic gauge potential), using the nested commutator expansion: $H_{\rm cd}(\lambda) = H_{\rm ad}(\lambda) + \dot{\lambda}(t)A_\lambda$ with

$A^{(1)}_\lambda = -2\alpha_1\left[\sum_{i} h_i \sigma^y_i + \sum_{i<j} J_{ij} (\sigma^y_i \sigma^z_j + \sigma^z_i \sigma^y_j)\right]$

where $\alpha_1$ is determined analytically.

2. Digitized Protocol and Circuit Implementation

Time evolution under $H_{\rm cd}(\lambda)$ is digitized via Suzuki-Trotter decomposition: $|\psi(T)\rangle = \prod_{k=1}^{n_{\rm trot}} \prod_{j=1}^{n_{\rm terms}} \exp[-i\Delta t\, \gamma_j(k\Delta t)H_j] |\psi_i\rangle$ where $H_j$ are local Pauli terms and $\gamma_j$ encapsulate time-dependent coefficients. BF-DCQO’s circuits consist of:

Initial state preparation using per-qubit $R_y(\theta_i)$ rotations, $\theta_i = \tan^{-1} \left(\frac{h^x_i}{h^b_i + \sqrt{(h^b_i)^2 + (h^x_i)^2}}\right)$ , aligning with the bias-field-updated initial Hamiltonian.
Parallel layers for commutative/non-commuting gates, optimally sequenced to minimize SWAP gates—leveraging fixed orderings across Trotter steps and exploiting symmetries when available.
Gate pruning: terms with small angles ( $\leq \theta_{\text{cutoff}}$ ) are omitted, dramatically reducing circuit depth. Circuit transpilation adapts to hardware-native gate sets (IonQ: GPi/ZZ; IBM: Rx/Rz/ECR/CZ), and is optimized for parallelism, SWAP insertion, and error-mitigation compatibility (Cadavid et al., 22 May 2024, Ji et al., 2023).

3. Bias Field Feedback and Iterative Algorithm Structure

After each quantum circuit execution, bitstring samples are measured. A Conditional Value-at-Risk (CVaR) strategy selects a fraction $\alpha$ of the lowest-energy outcomes to update the bias field: $h^b_i \leftarrow f(\langle \sigma^z_i \rangle)$ where either unsigned, signed, or rescaled bias strategies are employed. Initial states for subsequent iterations are constructed via these updated angles, recursively steering the algorithm towards low-energy or ground states. Iterative application ensures the solution distribution concentrates near optimality. In practical deployments, 5–10 bias-field iterations suffice for convergence, with each iteration requiring only shallow quantum circuits.

4. Quantitative Performance and Experimental Evaluation

Performance Metrics:

Approximation ratio: $r = E/E_0$ , where $E_0$ is the classical ground-state energy (e.g., from DMRG); directly compared across methods.
Ground-state distance: $DS = 1 - \frac{\min_k E_k}{E_0}$ .

Key results:

On 156-qubit IBM heavy-hex hardware, BF-DCQO attains $DS = 0.037$ , $AR = 0.815$ on hard HUBO instances—substantially outperforming D-Wave quantum annealing ( $DS \approx 0.5, AR \approx 0.61$ ), simulated annealing ( $DS \sim 0.1, AR \sim 0.75$ ), and QAOA (depth-3, $DS > 0.2, AR < 0.6$ ) (Romero et al., 5 Sep 2024).
In 433-qubit noiseless MPS simulations, BF-DCQO achieves $DS = 0.019$ , $AR = 0.954$ .
Significant reductions in circuit depth and two-qubit gate count relative to Qiskit/Tket, with AOQMAP-optimized circuits yielding $28.8\%$ lower CX count, $33.4\%$ lower depth on average, up to $77.2\%$ and $90.8\%$ respectively in favorable cases (Ji et al., 2023).
Without error mitigation, BF-DCQO circuits achieve up to $4.49\times$ higher approximation ratios than Qiskit/Tket-compiled circuits; with error mitigation (ZNE, DD, REM), advantages reach $84.8\%$ .
Resource requirements decrease per iteration as the system converges to nearly separable (product) ground states, in contrast to resource demands increasing with circuit depth in VQAs.
Experimental validation extends to dense, all-to-all-connected instances (up to 36–100 qubits), protein folding, MAX k-SAT, and general p-spin models, leveraging both IonQ and IBM platforms (Romero et al., 9 Jun 2025, Cadavid et al., 22 May 2024).

5. Algorithmic Codesign: Qubit Mapping, Gate Sequence, and Parameter Cooptimization

The leading implementation strategy, Algorithm-Oriented Qubit Mapping (AOQMAP), directly codesigns qubit mapping, gate sequence, and algorithm parameters:

For fully connected instances, arbitrary logical-to-physical mappings suffice; for partial/noncomplete graphs, AOQMAP employs random initial order selection to minimize SWAP count.
For commuting (e.g., $ZZ$ ) and non-commuting (e.g., $ZY$ ) gates, sequence optimization exploits commutation structure to minimize Trotter error and total gate count.
Gate-mapping strategies yield deterministic, mirror-symmetric schedules for Suzuki-Trotter steps, simultaneous gate application, and fixed mapping per iteration.
The sequence/order of mixer, CD, and problem Hamiltonian application (e.g., ZY-ZZ-X vs. ZZ-ZY-X) is empirically tested for optimal performance; symmetric layering suppresses Trotter and noise errors (Ji et al., 2023).

6. Error Mitigation, Scalability, and Hardware Adaptation

BF-DCQO-compatible circuits are amenable to noise-mitigation techniques: zero-noise extrapolation, dynamical decoupling, and readout mitigation, each exhibiting increased efficacy due to circuit compression.
Experiments demonstrate robust performance across device topologies (linear, T, H-shaped couplers) and across both superconducting and trapped-ion architectures.
On all-to-all platforms (IonQ), direct mapping of dense, higher-body terms (e.g., for protein folding, MAX 4-SAT), allows optimal solutions at larger system size than previously feasible; resource usage diminishes with convergence.
Scalability is demonstrated by consistent convergence and solution quality in ideal and noisy settings up to 433 qubits in simulation and 156 qubits on hardware, with no need for classical variational optimization (Romero et al., 5 Sep 2024, Cadavid et al., 22 May 2024, Romero et al., 9 Jun 2025).

7. Significance, Limitations, and Applicability

BF-DCQO provides a fully quantum, resource-efficient, and scalable protocol, directly applicable to a broad class of industrially relevant optimization problems (HUBO, spin-glass, MAX k-SAT, protein folding, portfolio optimization). Its main advantages derive from:

Purely quantum, non-variational iteration: circumventing barren plateaus, trainability issues, and circuit-depth limitations endemic to VQA-based QAOA and hybrid protocols.
No QUBO/quadratization overhead: direct encoding of higher-body terms without ancilla or constraint penalties.
Superior performance on challenging instances: outperforming annealing/QAOA on rough, high-connectivity, high-order landscapes.
Versatility: directly generalizable to DCQO variants with non-trivial non-commuting terms, bias fields, and arbitrary interaction structures.

Limitations include:

Performance depends on bias update strategy; in rare cases, anti-bias/alternative update rules are necessary to avoid local traps.
Approximate CD terms (truncated at first order) may yield suboptimal performance on certain rugged landscapes, although iterative bias correction generally compensates.
Experimental performance subject to current hardware noise and coherence constraints, but algorithm designed to minimize circuit depth.

Summary Table: BF-DCQO vs. Reference Methods (Romero et al., 5 Sep 2024)

Method	Qubits	Distance to Solution	Approx. Ratio	Ancilla Overhead	Notes
BF-DCQO (IBM)	156	0.037	0.815	No	Outperforms D-Wave, SA, QAOA
D-Wave Annealer	334	0.5	0.61	Yes	Needs QUBO mapping
Simulated Annealing	334	~0.1	~0.75	Yes	Large sample size, indirect mapping
Tabu Search	334	~0.15	~0.72	Yes	-
QAOA (p=3)	156	>0.2	<0.6	No	Not competitive for higher-order terms
BF-DCQO (MPS Sim)	433	0.019	0.954	No	Ground state, best scalability

BF-DCQO establishes a robust, scalable pathway to quantum advantage for dense and high-order combinatorial optimization in current NISQ hardware, surpassing conventional quantum/classical methods in practicability and performance (Cadavid et al., 22 May 2024, Romero et al., 5 Sep 2024, Ji et al., 2023, Romero et al., 9 Jun 2025).