AL-VPC: Arithmetic-Level Variable Precision Computing

• AL-VPC is a precision-management paradigm that assigns unique, localized finite-precision types to variables and operations to meet numerical accuracy requirements.
• It leverages formal models and stochastic analysis to balance propagation errors with computation performance across diverse implementations.
• Practical realizations demonstrate significant savings in memory, energy, and latency in applications such as GMRES and in-memory signal processing.

Searching arXiv for the cited AL-VPC-related papers to ground the article in current records. Arithmetic-Level Variable Precision Computing (AL-VPC) is a precision-management paradigm in which numerical precision is treated as an arithmetic-level resource rather than a single global format. In its strongest form, it assigns a finite-precision type to each variable occurrence and each arithmetic operation, or chooses a distinct computing precision for each basic arithmetic node in an expression tree, with the objective of satisfying numerical-accuracy requirements while reducing memory footprint, bandwidth usage, computation time, energy, hardware cost, or algorithmic complexity (Khalifa et al., 2022, Bao et al., 14 Aug 2025). Across the literature, AL-VPC appears in compiler-guided tuning, arbitrary-precision software, dynamic-precision arithmetic, transprecision processor design, and precision-adaptive numerical algorithms (Amodio et al., 2020).

1. Definition and conceptual scope

AL-VPC is distinguished from uniform precision and from coarser forms of mixed precision by its granularity. In POP’s constrained precision tuning, precision can vary not only from variable to variable, but also from operation to operation, and even from one occurrence of the same variable to another; the paper explicitly presents this as more powerful than classical “mixed precision” in the coarse sense (Khalifa et al., 2022). In the in-memory computing framework for MIMO signal processing, conventional variable precision computing is described as assigning precision to large “sections” or partitions, whereas AL-VPC assigns a potentially different precision to each basic arithmetic operation ${\cal R}_{nk}$, making coarse-grained VPC a special case of AL-VPC (Bao et al., 14 Aug 2025).

The same general idea also appears in forms that do not use the AL-VPC label explicitly. NOz provides arbitrary precision numbers whose precision is stored as a variable in the main unit of the package and can be changed at runtime (0707.1716). Bitslice vector arithmetic makes exponent width, significand width, and rounding mode software-configurable, supporting vectors of five, nine, eleven, or any number of bits (Xu et al., 2016). The Infinity Computer formulation represents a number as layered grossdigits and activates additional layers only when cancellation or ill-conditioning requires them (Amodio et al., 2020). This suggests that AL-VPC is best understood as an umbrella concept for computation in which precision is managed locally, adaptively, or both.

2. Formal models of precision, error, and computability

One influential formalization appears in POP. A program is modeled by labels attached to control points, with a tuning function

$T : Lab \rightarrow \mathbb{N},$

where $T(\ell)$ is the number of significant bits assigned at label $\ell$. A tuning is correct if it satisfies the semantic constraints generated from the program and the final accuracy requirement, and the set of all correct tunings is denoted by $\mathcal{T}$. The semantic system uses the unit in the first place $ufp(x)$, Parker’s bound for the number of significant bits $nsb(x)$, and

$ulp(x)=ufp(x)-nsb(x)+1,$

together with an optimized carry-bit function $\xi$ to model whether an operation needs an extra bit because operand errors overlap. POP then solves the resulting tuning problem either as an Integer Linear Problem using GLPK or through policy iteration for a finer non-linear model (Khalifa et al., 2022).

A distinct formalization appears in the in-memory AL-VPC framework, which models arithmetic propagation error stochastically. For an arithmetic operation, the relative error variance of the full-precision output depends on the operation type: for addition and subtraction it depends on operand values, whereas for multiplication, division, and square root the relative error variance is independent of operand values. Rounding is modeled by

$E=\frac{X-\mathrm{Round}(X)}{X},$

with a variance expression for $T : Lab \rightarrow \mathbb{N},$0 that depends on the rounding envelope $T : Lab \rightarrow \mathbb{N},$1, the random variable $T : Lab \rightarrow \mathbb{N},$2, and the pre-rounding variance $T : Lab \rightarrow \mathbb{N},$3. On top of these propagation equations, the framework defines a multi-objective optimization problem over per-node precisions $T : Lab \rightarrow \mathbb{N},$4, balancing final error statistics against arithmetic complexity (Bao et al., 14 Aug 2025).

A third formal perspective is provided by VPC, “Verification of Program Computation,” which treats arithmetic validity as a machine-aware computability condition. Programs are typed sequential lists, and arithmetic over the machine integer set

$T : Lab \rightarrow \mathbb{N},$5

is not assumed to be closed under addition or multiplication. An arithmetic program is computable only if it executes without type violation or execution error. In this setting, representability constraints are part of the semantics of arithmetic itself, not merely an implementation detail (Pantelis, 2014).

3. Software realizations

NOz is a software realization of variable precision in which an arbitrary-precision real number is stored as sign $T : Lab \rightarrow \mathbb{N},$6, mantissa $T : Lab \rightarrow \mathbb{N},$7, and exponent $T : Lab \rightarrow \mathbb{N},$8. The sign is Boolean, the exponent is integer, and the mantissa is a dynamic array of natural numbers storing digits from least significant to most significant. Precision is not fixed per number; instead, a precision variable is stored in the main unit of the package and passed as a parameter to arbitrary-precision functions so that all operands in an operation use the same precision. The package supports addition, subtraction, multiplication, division, comparisons, and factorial, and the paper demonstrates a 100-digit approximation of $T : Lab \rightarrow \mathbb{N},$9 computed from a Taylor series (0707.1716).

Bitslice vector arithmetic implements custom-precision floating point entirely in software by storing arrays in bitslice format and using bitwise instructions to realize arithmetic circuits. A floating-point vector is decomposed into bitplanes, and each machine word stores one bit position across many vector elements. The implementation provides addition/subtraction, multiplication, and division, with rounding toward zero and round to nearest, tie to even. Because the total format width $T(\ell)$0 is a software choice rather than a hardware constant, the method supports custom formats such as FP8, FP16, FP32, and arbitrary intermediate bitwidths (Xu et al., 2016).

The Infinity Computer proposes a dynamic precision floating-point arithmetic in which

$T(\ell)$1

so that $T(\ell)$2, $T(\ell)$3, and higher sections represent progressively finer accuracy levels. Precision is increased only when needed, for example when cancellation causes an error monitor to stagnate. In the nonlinear example $T(\ell)$4, the dynamic scheme begins in low precision and raises precision only as the root-finding process becomes sensitive, which the paper reports as about $T(\ell)$5 times slower than pure single precision but about $T(\ell)$6 times faster than always using quintuple precision (Amodio et al., 2020).

4. Architectural realizations

In processor architecture, a direct AL-VPC realization is a modified RI5CY RISC-V core that extends the original FPU rather than replacing it. A posit input decoder is attached to the FPU input and a posit output encoder to the FPU output, performing posit-to-floating-point before computation and floating-point-to-posit after computation, while IEEE-754 operations run natively when the codecs are bypassed. The design adds a custom posit control and status register, pcsr, with fields pfmt, pprec, and pes, enabling runtime selection of operand/result format, precision, and exponent size. Supported posit precisions are 8-bit and 16-bit, and the system adds custom conversion instructions such as fcvt.p8.s, fcvt.p16.s, fcvt.s.p8, and fcvt.p16.p8, with dynamic or static es selection (Li et al., 25 May 2025).

A different hardware-oriented substrate appears in the in-memory AL-VPC framework. There, precision variability is enabled by extended block floating point (eBFP), in which a number is divided into $T(\ell)$7-bit blocks, the exponent marks the position of the first significant block, and the first $T(\ell)$8 blocks are stored. Precision is adjusted by changing $T(\ell)$9 while keeping exponent width fixed. Arithmetic operations are represented as nodes in an expression tree, and the framework proposes both offline VPC, which computes all optimal precisions before execution by backward propagation, and online VPC, which computes precisions during execution by forward propagation using actual operands (Bao et al., 14 Aug 2025).

These architectural examples show two distinct design strategies. One reuses an existing arithmetic datapath and adds lightweight boundary logic; the other assumes a storage/computation substrate explicitly designed to expose arithmetic-granularity precision control. A plausible implication is that AL-VPC is not tied to a single numerical format: it can be realized with IEEE-754/posit coexistence, with eBFP, or with custom software representations.

5. Algorithmic use in numerical methods

At the algorithmic level, AL-VPC often appears as a precision schedule coupled to convergence or conditioning. Brent’s classic multiple-precision analysis begins from the statement that the usual assumption of constant-time arithmetic is invalid if the precision required increases as the computation proceeds. The paper analyzes addition, multiplication, division, reciprocal, square root, and elementary functions in terms of single-precision operation counts, and formalizes the common AL-VPC strategy of starting coarse and increasing precision geometrically; for reciprocal iteration, $\ell$0, so successive stages can use approximately doubling precisions. One of the central results is the linear equivalence

$\ell$1

showing that division, reciprocal, multiplication, square root, and squaring belong to the same complexity class in the multiple-precision model (Brent, 2010).

GMRES provides an operation-level example. The precision of Arnoldi inner products $\ell$2, the normalization scalar $\ell$3, and inexact matrix-vector products $\ell$4 is reduced as the iterations proceed, with tolerances inversely proportional to the residual norm. The analysis explicitly accounts for loss of orthogonality and proves that, if the tolerances are chosen properly, the computed basis is exactly orthonormal in a nearby weighted inner product with bounded condition number, so convergence rate and final attainable residual are preserved up to the target accuracy (Gratton et al., 2019).

Variable precision also appears in conic optimization. For second-order conic feasibility, a short-step primal-dual interior-point method performs finite-precision arithmetic with a machine precision

$\ell$5

chosen as a function of the current barrier parameter and problem size. The method gives bounds on both the number of arithmetic operations and the finest precision required, while preserving centrality and enabling correct primal or dual termination tests under finite precision (Cucker et al., 2011).

The matrix multiplication paper represents a more controversial edge case. It assumes that addition, multiplication, modulo, and floor on variable-precision numbers all cost $\ell$6, and under that model claims an $\ell$7 recursive algorithm using $\ell$8, $\ell$9, floor, and modulo to replace eight block multiplications by four recursive multiplications. The MATLAB/VPA emulator is reported to use $\mathcal{T}$0 variable precision arithmetic operations and $\mathcal{T}$1 digits. The paper itself states that the asymptotic advantage is conditional on the unit-cost variable-precision arithmetic model (Paszyński, 2024).

6. Empirical evidence, tradeoffs, and caveats

The empirical record is heterogeneous but consistently framed as a precision–cost tradeoff. On six FPBench programs—Accelerometer, Odometry, Pendulum, PID controller, Runge–Kutta, and Trapezoidal rule—POP reports maximal precisions often close to the requested accuracy. For the accelerometer benchmark with a 12-bit requirement, $\mathcal{T}$2, with 3 variables in FP16 and 15 in FP32. When minimizing operator precision, the total number of bits used by arithmetic operations is reduced by around $\mathcal{T}$3 for small accuracy requirements such as 8 or 16 bits, and still by around $\mathcal{T}$4 when the required accuracy is large and close to double precision. Table 2 further shows that uniform precision per variable, imposed to avoid repeated conversions, still yields about $\mathcal{T}$5 savings at 8-bit accuracy in mixed precision and $\mathcal{T}$6 in uniform precision for some programs (Khalifa et al., 2022).

For codec-based RISC-V support, the modified FPU reports a baseline of $\mathcal{T}$7 ns and $\mathcal{T}$8, $\mathcal{T}$9 at $ufp(x)$0 ns and $ufp(x)$1, and $ufp(x)$2 at $ufp(x)$3 ns and $ufp(x)$4. The paper states that basic posit support increases timing by $ufp(x)$5 and area by $ufp(x)$6, while full features increase latency by $ufp(x)$7 and area by $ufp(x)$8; with one more pipeline stage, the design keeps the same frequency as baseline with $ufp(x)$9 area overhead. At the core level, the increase is only $nsb(x)$0 LUT and $nsb(x)$1 FF, with no operating-frequency impact. Compared to PERCIVAL, the implementation reports $nsb(x)$2 LUT reduction and $nsb(x)$3 FF reduction, and on GEMM kernels reaches $nsb(x)$4 MFLOPS for $nsb(x)$5, up to $nsb(x)$6 faster than the compared prior work; under the same scratchpad size, FP32 supports up to a $nsb(x)$7 GEMM while 8-bit posit enables a $nsb(x)$8 GEMM (Li et al., 25 May 2025).

The in-memory ZF precoding case study reports a Pareto boundary between performance and complexity. Relative to fixed-length computing, the paper reports up to $nsb(x)$9 sum-rate enhancement or equivalently up to $ulp(x)=ufp(x)-nsb(x)+1,$0 complexity reduction, with online VPC outperforming offline VPC. At an average precision of 9 bits, online VPC gives nearly $ulp(x)=ufp(x)-nsb(x)+1,$1 sum-rate improvement over fixed-length, while offline VPC gives about $ulp(x)=ufp(x)-nsb(x)+1,$2; online VPC uses about $ulp(x)=ufp(x)-nsb(x)+1,$3 fewer bits than fixed-length, and offline VPC gives about $ulp(x)=ufp(x)-nsb(x)+1,$4 bit reduction in the low-precision regime. In one example containing 20,168 basic arithmetic operations, most assigned precisions fall in the 11–14 bit range, with multiplications typically lower precision and additions higher precision (Bao et al., 14 Aug 2025).

Several caveats recur across the literature. POP stresses that unconstrained arithmetic-level tuning can introduce too many type conversions, and those casts can erase the gains from lower precision (Khalifa et al., 2022). The matrix multiplication result is explicitly conditional on constant-time variable-precision arithmetic rather than a realistic machine-time model (Paszyński, 2024). NOz notes the standard tradeoff that as precision increases, speed decreases, and recommends arbitrary precision only when really necessary (0707.1716). The in-memory framework acknowledges assumptions of small relative error variances, idealized rounding statistics, and incomplete treatment of hardware-specific nonidealities (Bao et al., 14 Aug 2025). More generally, high-precision advocacy in scientific computing argues that precision should be monitored rather than assumed, for example by inserting rounding operations at critical points and comparing multiple runs, especially for chaotic or nonlinear systems (Morrison, 2013).

Taken together, these works present AL-VPC as a family of methods for making precision an explicit optimization variable at the arithmetic layer. The shared thesis is not that lower precision is universally preferable, but that precision should be allocated where numerical sensitivity, representability, convergence, and hardware cost make it necessary.