A Framework of Arithmetic-Level Variable Precision Computing for In-Memory Architecture: Case Study in MIMO Signal Processing (2508.21079v1)

Abstract: Computational complexity poses a significant challenge in wireless communication. Most existing attempts aim to reduce it through algorithm-specific approaches. However, the precision of computing, which directly relates to both computing performance and computational complexity, is a dimension that is fundamental but rarely explored in the literature. With the emerging architecture of in-memory computing, variable precision computing (VPC) is enabled, allowing each arithmetic operation to be processed with a distinct and specifically optimized computing precision. In this paper, we establish a unified framework of arithmetic-level variable precision computing (AL-VPC), which aims to determine the optimized computing precision for each arithmetic operation. We first develop an arithmetic propagation error model exploiting stochastic analysis, and then formulate a mathematical optimization problem to strike balance between computing performance and computational complexity. Two algorithms, namely, offline VPC and online VPC, are proposed to solve the problem considering various practical concerns. Particularly, in a case study on zero-forcing (ZF) precoding, we reveal the Pareto boundary between computing performance and complexity, which exhibits up to a 60% sum-rate enhancement or equivalently up to a 30% complexity reduction compared to the traditional fixed-length methods.