Improvement of performance of Grover's algorithm on three generations of Heron family IBM QPUs without and with topological dynamical decoupling

Abstract: We investigate the performance of Grover's algorithm on three different generations of IBM Heron QPUs. On Heron family of IBM QPUs the success probabilities for three, four and five qubits without dynamical decoupling is better than results reported for previous generations of QPUs. The success probability as function of number of iterations of Grover operator is considered. A study of the improvement of results of Grover's algorithm for five qubit case with the help of topological dynamical decoupling is considered. For a six qubit case on Heron r3 QPU a clear result for finding the sought-after bitstring is reported for theoretically suboptimal number of iterations of Grover operator with the help of dynamical decoupling.

• The paper demonstrates that applying topological dynamical decoupling significantly improves Grover's algorithm success probabilities on IBM Heron QPUs across various qubit registers.
• Using IBM Qiskit with advanced scheduling techniques, the study reports up to 14% performance enhancement on Pittsburgh (Heron r3) over free evolution cases.
• Findings indicate that the optimal number of Grover iterations is hardware-dependent, stressing the need to tailor algorithm parameters to qubit coherence and error statistics.

Performance Enhancement of Grover's Algorithm on IBM Heron QPUs Using Topological Dynamical Decoupling

Overview

This paper systematically investigates the implementation and optimization of Grover's algorithm across three generations of the Heron family of IBM superconducting quantum processing units (QPUs): Torino (Heron r1), Marrakesh (Heron r2), and Pittsburgh (Heron r3). The study analyzes Grover's algorithm for problem sizes ranging from three to six qubits, focusing on success probabilities as a function of Grover operator iterations, with and without dynamical decoupling (DD). The authors compare the impact of classical DD sequences (CPMG, XY4) against the recently proposed topological dynamical decoupling (Tn) sequences, assessing their efficacy in error mitigation and quantum coherence preservation.

Experimental Approach

The experiments leverage IBM Qiskit for circuit construction and transpilation, employing advanced optimization and consistent hardware calibration practices. Grover's operator is implemented using decomposed multi-control Z gates, mapped onto native 1Q and 2Q gates via the Qiskit transpiler. DD sequences are inserted using ALAP scheduling and PassManager, targeting idle periods and adapting pulse timing to circuit topology and duration constraints.

Qu-bit sets are carefully selected based on monitored T1, T2, readout, and gate error statistics, ensuring experiments are executed during periods of optimal hardware calibration. Each run utilizes 10,000 shots, enhancing statistical confidence and enabling robust binomial confidence interval analysis of measured success probabilities.

Key Findings

Hardware Evolution and Native Grover Performance

Success probabilities for three, four, and five-qubit registers on the Heron QPU family without any form of error correction or mitigation markedly exceed those reported for previous IBM QPU generations, including error-corrected implementations. For five qubits, Pittsburgh (Heron r3) delivers success probabilities (∼0.35) surpassing previous dynamically decoupled results, attributed to improved qubit coherence and reduced gate errors.

Iteration Scaling and Suboptimal Performance Peaks

Empirical results reveal that the optimal iteration count of the Grover operator for maximal success probability often deviates from theoretical predictions, with peaks occurring at lower iterations due to decoherence and cumulative gate errors. This effect is QPU-dependent, reflecting hardware-specific gate fidelity and coherence time improvements in newer architectures.

Comparison of Dynamical Decoupling Sequences

Dynamical decoupling sequences generally enhance performance, with XY4 consistently outperforming CPMG across QPU generations. Topological sequences (Tn), particularly T2 and T4, deliver comparable or superior enhancements, with oscillatory dependence on pulse count and non-trivial interplay between the number of inserted sequences and pulse distribution. On Pittsburgh (Heron r3), T2 DD improves success probability by ~14% over the free case, achieving up to 0.4 for five qubits.

Six-Qubit Grover Search Feasibility

The study extends Grover's algorithm to a six-qubit register, achieving success probabilities above the random guess threshold ($\frac{1}{64}$) for suboptimal Grover iterations on Pittsburgh (Heron r3) when enhanced with either T4 or XY4 DD. Circuit analysis of individual bitstring probabilities confirms the correct target state is retrieved with significantly higher probability than other candidates when DD sequences are applied, demonstrating practical feasibility for larger problem sizes using state-of-the-art hardware and advanced error mitigation.

Practical and Theoretical Implications

• Hardware Scaling: The results highlight quantum hardware advancements as a driving factor for practical Grover algorithm deployment at larger register sizes, with substantial performance enhancements on the latest Heron QPU generation.
• DD Sequence Selection: The comparable efficacy of topological DD sequences to XY4 (and superior to CPMG) suggests broad applicability and motivation for further exploration, especially given their robustness to detuning and pulse area variations.
• Algorithmic Optimization: The observed shift of optimal iteration counts underlines the necessity of tailoring quantum algorithms to real hardware error rates, rather than strict theoretical prescriptions, for maximizing success probabilities.
• Quantum Application Stretch: The study demonstrates the possibility of successfully executing Grover's search for six qubits, previously limited by hardware, through the confluence of improved QPU properties and advanced DD techniques. This opens new avenues for scalable quantum search applications and benchmarks for future QPU generations.

Outlook and Future Directions

Given the trends of hardware improvement and efficacy of DD strategies, future research should explore:

• Extension to even larger qubit registers as hardware and DD techniques mature.
• Automated DD sequence optimization and pulse scheduling to maximize error mitigation for a given circuit and hardware profile.
• Detailed quantitative modeling of DD impact, integrating qubit load and pulse distribution dynamics.
• Application to other quantum search and optimization algorithms, evaluating DD-enhanced performance scaling.

Conclusion

This work evidences the amplification of Grover's algorithm performance with modern IBM Heron QPUs, especially when coupled with topological dynamical decoupling sequences. Substantial improvements are found both in raw success probabilities and in the ability to push algorithmic boundaries (up to six qubits), indicating that advances in hardware and error mitigation can together enable practical and larger-scale quantum search solutions. The comparative analysis of DD sequences motivates continued innovation in error suppression strategies, with topological approaches offering promising avenues for integration and optimization across future quantum applications.