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Skipped Adjacency Pulse Width Modulation: Zero Voltage Switching over Full Duty Cycle Range for Hybrid Flying Capacitor Multi-Level Converters without Dynamic Level Changing (2411.06589v2)

Published 10 Nov 2024 in eess.SY and cs.SY

Abstract: This paper proposes a method to achieve zero voltage switching (ZVS) across the full duty cycle range in hybrid flying capacitor multilevel (FCML) converters, eliminating the need for dynamic level changing and active re-balancing. Utilizing skipped adjacency pulse width modulation (SAPWM), this approach avoids the nearest pole voltage level, thereby increasing volt-seconds within specific duty cycle range. The method uses a modified PWM scheme, which preserves effective pole voltage by changing duty reference and employing digital logic processing. Simulation results verify the proposed method achieving full-range ZVS. This SAPWM technique is compatible with hybrid FCML converters with various levels, offering enhanced efficiency and reduced switching losses.

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