Optimal detuning ramp for smooth trapped-ion “smooth gates”

Determine an optimal time-dependent detuning profile δ(t) for the smooth gate—an adiabatic trapped-ion two-qubit geometric phase gate implemented by holding the gate Rabi frequency Ωg constant while ramping the gate detuning—such that the average entanglement-generation rate (proportional to Ωg²/δ) is maximized and/or the total gate time is minimized, subject to the adiabaticity condition \.dot{β}(t)/δ(t) ≪ 1 and smooth boundary conditions, thereby maintaining adiabatic elimination of spin–motion entanglement.

Background

The paper introduces the “smooth gate,” a detuning-ramped, adiabatic geometric phase gate designed to achieve adiabatic elimination of spin–motion entanglement (AESE) while keeping the gate Rabi frequency Ωg constant. This aims to retain a high entanglement-generation rate while suppressing temperature-sensitive errors.

In outlining how to choose ramp functions, the authors specify an adiabaticity condition and objectives (minimize average 1/δ(t), minimize ramp times) and propose a particular family of detuning ramps δ(t) = (b + c g[t])^{-1/j}. They report that j = 3 and tc = 0 often give a good trade-off but state that this choice was heuristic and that finding a truly optimal δ(t) remains open.

Identifying an optimal δ(t) would formalize the trade-offs between gate speed and adiabaticity-driven error suppression, potentially improving robustness and performance across a range of motional noise conditions and temperatures.