Ascertain VE30 real-world performance and efficiency versus theoretical peaks

Determine the extent to which the NEC TSUBASA Aurora VE30 vector engine’s realized performance and power efficiency on practical workloads match its theoretical peak values, given that the VE30 microarchitecture is proprietary and no open literature benchmarking is currently available.

Background

The paper surveys prior scalable vector processors and highlights NEC’s TSUBASA Aurora VE30 as a prominent non–RISC-V design explicitly targeting extremely long vectors. A single VE30 core features 32 lanes with multiple execution pipelines connected to a multi-ported vector register file, indicating high theoretical performance.

However, the authors note that the VE30’s microarchitecture is proprietary and that effective performance and power efficiency have not been openly benchmarked. This lack of public data leaves uncertainty regarding how closely the VE30 achieves its theoretical peaks in real workloads, motivating the need for transparent, empirical evaluation.