Transposable SRAM (T-SRAM)

• Transposable SRAM is a specialized static memory featuring additional transposable circuitry that supports both conventional and rapid crossbar-type data operations.
• Its architecture, including a 5T Transpose Network as demonstrated in GEM3D-CIM, enables simultaneous non-disturbing read and write operations for efficient matrix transposition.
• T-SRAM is pivotal for compute-in-memory systems and AI hardware, facilitating in-situ element-wise arithmetic and accelerated online learning in innovative neural networks.

Transposable SRAM (T-SRAM) refers to a family of static random-access memory macro-cells and arrays that integrate specialized circuit mechanisms for efficient transposable access, enabling both conventional row-wise operations and rapid column-wise or crossbar-type data movement. This capability is pivotal for compute-in-memory (CIM) systems requiring in-situ matrix transposition, element-wise parallel arithmetic, and accelerated learning in AI hardware. T-SRAM architectures appear in leading-edge 3D CIM configurations such as GEM3D-CIM for general matrix operations (Chakraborty et al., 15 Apr 2026) and in multiport SRAM arrays for spiking neural network accelerators with online learning (Huijbregts et al., 2024).

1. Cell Architecture and Transposability

In T-SRAM, the core modification over standard 6T SRAM cells is the introduction of additional transposable network circuitry. Two major approaches have been proposed:

• 5T Transpose Network (GEM3D-CIM): Each 6T storage cell is augmented with a 5T network, enabling simultaneous non-disturbing read from one cell and write into another