Random Trigonometric Phase (RTP) Method
- The paper introduces a hardware-oriented framework for phase randomisation that replaces on-chip trigonometric and PRNG operations with LUT-based phase synthesis.
- It achieves subframe decorrelation and edge artifact suppression with NMSE under 5% compared to true PRNG methods, balancing error and memory footprint.
- The method guarantees deterministic, low-latency operation on FPGAs and DSPs by leveraging precomputed LUTs, simplifying design complexity.
The Random Trigonometric Phase (RTP) method is a hardware-oriented algorithmic framework for efficient phase randomisation in real-time computer-generated holography. RTP replaces conventional on-chip trigonometric and pseudo-random number generation with lookup-table-based phase synthesis, drastically reducing compute and logic requirements on embedded platforms such as FPGAs and DSPs. The method achieves subframe decorrelation and edge artifact suppression required in holographic projection with a negligible increase in error—typically under 5% normalized mean-squared error (NMSE) compared to “true” PRNG and trigonometric methods—while consuming substantially less hardware resources and guaranteeing deterministic, low-latency operation (Christopher et al., 2020).
1. Mathematical Foundations and RTP Formulation
In standard software implementations, the random phase at each hologram pixel is generated using a uniform random number :
In the RTP method, this process is replaced by reading from finite-size LUTs. Each pixel (flattened index) is assigned a deterministic or pseudo-random index , cycling through a table of length :
In hardware, this is implemented as:
with the table precomputed using trigonometric functions.
2. Lookup Table Structure and Quantization
The RTP approach employs equal-length LUTs (indexed by 0) for cosine and sine components with 1 entries:
- 2
- 3
4 is the fixed-point output width, typically 12–16 bits, determined by phase-accuracy budgets. Quantization of the trigonometric outputs imposes a truncation error 5 that satisfies 6. At runtime, a simple incrementing address generator produces the sequence 7 for pixel-indexing and subframe continuity. Access to the LUT is implemented with single dual-port BRAM operations, fetching both real and imaginary parts in a single cycle if necessary.
3. Pseudo-Random Sequence Engineering
Instead of hardware PRNGs (e.g., LFSRs, Mersenne-Twister), the RTP method precomputes the pixel-phase access pattern in software. Two practical sequencing strategies are:
- Random permutation of the LUT indices 8.
- Simple stride: 9 for 0 coprime to 1, typically with 2 and 3 prime, so every table entry is cycled fully before repetition.
Choosing 4 as a prime ensures that for two-dimensional image grids, cyclically repeating the sequence does not introduce periodic artifacts, and spatial or temporal phase collisions are avoided until the full table is traversed. The period of the random-phase pattern is exactly 5, and for 6 (number of subframes), subframe-to-subframe decorrelation approximates the behavior of a true PRNG.
4. Error Metrics, Simulation, and Experimental Results
The RTP method is benchmarked in (Christopher et al., 2020) using simulated reconstructions of six 7 images, phase-randomised by One-Step Phase-Retrieval across 24 subframes. 8 is swept across prime values up to 9, evaluating NMSE relative to an ideal full-random, function-true implementation. Results demonstrate:
- For 0 (e.g., 24), error is severe due to repeated phase patterns.
- At 1, NMSE drops sharply by two orders of magnitude.
- For 2, NMSE stabilizes with small oscillations and rare spikes, the latter occurring if 3 divides the image width or height.
- At 4, NMSE remains 5 above the infinite-LUT (true PRNG) baseline.
- Experimental tests with a binary-phase ferroelectric SLM (102461024), 60Hz, 24 subframes, show RTP-LUT(10007) is visually indistinguishable from full-PRNG output, with measured RMS differences also 7.
The hardware quantization error is strictly bounded:
8
5. Hardware Implications and Design Trade-offs
RTP eliminates the need for on-chip PRNG and trigonometric function core logic (e.g., CORDICs or Taylor series implementations), substituting it with the BRAM required for the LUTs. Key hardware trade-offs are:
- Memory footprint: A single 9-word LUT of 2016 bits/word fits in 1320 kB BRAM; 2 raises this to 3520 kB, pushing NMSE even lower. For 4k5k projector applications, 6 achieves 75% error with 81MB on-chip RAM use.
- Throughput: Every pixel phase is fetched with a single-cycle BRAM access, guaranteeing deterministic, low-latency operation. There is no overhead for PRNG or trigonometric computation.
- Flexibility: Both 9 and the sequence seed are hardwired at compile-time; runtime sequence changes are not possible without additional LUTs or memory overhead for interleaved tables.
- Eliminating multi-GFLOP computation for real-time phase randomisation simplifies the FPGA bitfile and reduces power and development complexity.
RTP, therefore, provides a tunable compromise: 0 can be adjusted to fit error tolerance and available memory constraints.
6. Applications and Broader Context
RTP is particularly effective in real-time holographic projection systems utilizing Gerchberg–Saxton and One-Step Phase-Retrieval algorithms. By cycling a carefully chosen LUT, the method ensures:
- Spatial independence between neighboring pixels.
- Statistical independence across subframes, suppressing ghosting and edge artifacts inherent in non-randomized phase patterns.
- Near-ideal photorealism and reconstruction accuracy, as measured by image NMSE and qualitative visual assessment.
Its deployment is most significant for resource-constrained hardware, including FPGAs and embedded DSPs, where strict power, memory, and latency requirements prevail. A plausible implication is that similar LUT-based deterministic randomisation approaches may be transferable to other computational imaging domains where stochastic evaluation of trigonometric functions is a bottleneck (Christopher et al., 2020).