1-DTA: One-Clock Deterministic Timed Automata

• 1-DTA is a computational model extending finite automata with a single clock to enforce quantitative timing constraints in real-time systems.
• The Myhill–Nerode framework and region abstraction allow the construction of minimal canonical models and ensure decidability for key verification problems.
• 1-DTA supports efficient active learning, model checking, and controller synthesis, making it pivotal in the analysis and design of timed systems.

A one-clock deterministic timed automaton (1-DTA) is a computational model that extends classical finite automata by equipping them with a single real-valued clock, enabling the recognition of timed languages that involve quantitative temporal constraints. 1-DTAs serve as a pivotal class of timed automata, lying precisely at the interface between the rich expressiveness of time and the tractability of algorithmic analysis. They admit decidability for several fundamental problems and possess a robust theoretical characterization in terms of language theory and learning.

1. Formal Definition and Semantics

A 1-DTA is a tuple

$A = (\Sigma, Q, q_0, F, c, \Delta)$

where:

• $\Sigma$ is a finite input alphabet,
• $Q$ is a finite set of locations (states),
• $q_0 \in Q$ is the initial location,
• $F \subseteq Q$ is the set of final (accepting) locations,
• $c$ is the single real-valued clock,
• $$\Delta \subseteq Q \times \Sigma \times \Phi_c \times \{0,1\} \times Q$$ is a finite set of transitions.

The set $\Phi_c$ of clock constraints is built as Boolean combinations of atomic guards $c < m$, $c \le m$, $c = m$, $c > m$, $c \ge m$ for $m \in \mathbb{N}$. A transition $(q, \sigma, \phi, r, q')$ can be taken from state $q$ on input symbol $\sigma$ if the current clock value satisfies the guard $\phi$. The reset bit $r \in \{0,1\}$ indicates whether the clock is reset to $0$ ($r=1$) or left unchanged ($r=0$).

A configuration is a pair $(q,\nu)$ where $\nu$ is the current valuation of the clock. Timed words are sequences $$((\sigma_1, t_1), (\sigma_2, t_2), ..., (\sigma_n, t_n))$$, where $t_1 \leq t_2 \leq ... \leq t_n$.

A run of the automaton over a timed word is a sequence

$$(q_0, 0) \xrightarrow{(\sigma_1, t_1)} (q_1, \nu_1) \xrightarrow{(\sigma_2, t_2)} \cdots \xrightarrow{(\sigma_n, t_n)} (q_n, \nu_n)$$

such that for each $i$ the transition from $(q_{i-1}, \nu_{i-1})$ to $(q_i, \nu_i)$ on $(\sigma_i, t_i)$ is enabled by some $(q_{i-1}, \sigma_i, \phi_i, r_i, q_i) \in \Delta$ with $\nu_{i-1}$ advanced by $t_i$ to satisfy $\phi_i$, and if $r_i=1$, $\nu_i=0$; otherwise $\nu_i = \nu_{i-1} + t_i$.

Determinism requires that for every location $q$ and input symbol $\sigma$, the guards of all transitions $(q,\sigma,\phi_i,*,*)$ are pairwise disjoint subsets of $\mathbb{R}_{\ge 0}$. Thus, at most one transition is enabled from any configuration for each input and valuation (An et al., 2019, Clemente et al., 2021, Doveri et al., 21 Jan 2026).

2. Myhill–Nerode-Style Language Theory

A central theoretical advance in the study of 1-DTAs is the Myhill–Nerode theorem for timed languages. For a language $L \subseteq (\mathbb{R}_{\geq 0} \times \Sigma)^*$, the key insight is that finite-index equivalence relations analogous to those for DFAs can be constructed using "half-integral" timed words and a syntactic reset function $R^L$.

Given a language $L$, the syntactic congruence $\approx^L$ is defined over half-integral timed words so that $u \approx^L v$ iff $R^L(u) = R^L(v)$ and $u^{-1}L = v^{-1}L$. The Myhill–Nerode theorem for 1-DTA states:

• $L$ is recognized by some 1-DTA iff $\approx^L$ has finite index.
• The canonical minimal 1-DTA for $L$ has state space corresponding to equivalence classes of $\approx^L$ and minimal clock constant.

This characterization enables the construction of minimal and canonical 1-DTAs, supports rigorous language theory, and underlies active learning approaches (Doveri et al., 21 Jan 2026).

3. Determinisation, Decidability, and Complexity

Given a one-clock nondeterministic timed automaton (1-NTA) without $\epsilon$-transitions, it is decidable whether the recognized language is also recognized by a 1-DTA with a fixed number of clocks and bounded constants. The determinisation procedure for 1-DTAs relies on orbit-finite constructions and region abstraction, which partition the clock's value space into finitely many equivalence classes (regions) according to the integral constants appearing in guards.

Key results include:

• The k-DTA membership problem (fixed $k$) is PSPACE-complete.
• Any relaxation—two or more clocks, $\epsilon$-transitions, or unbounded clocks—leads to undecidability of determinisability (Clemente et al., 2021, Clemente et al., 2020).

For integer-reset timed automata (IRTA), every language recognized by an IRTA can be determinized into a one-clock deterministic IRTA, with a worst-case doubly-exponential blowup in size; this is tight (Manasa et al., 2010).

4. Closure, Expressiveness, and Limitations

The class of 1-DTA is closed under union, intersection, and, for certain subclasses (notably integer-reset), under complementation. Equivalence, inclusion, and emptiness are decidable.

Expressiveness of 1-DTA is strictly below that of general (possibly non-deterministic or multi-clock) timed automata. There exist timed languages recognized by nondeterministic one-clock timed automata that cannot be recognized by any deterministic one-clock timed automaton—typically, these require arbitrarily many "resets" or must remember unboundedly many time instants, which is impossible for any fixed set of clock variables (Clemente et al., 2021, Clemente et al., 2020, Manasa et al., 2010).

1-DTAs with parametric clock constraints (where guards are of the form $x = p$ for a parameter $p$) are strictly more expressive and dangerously cross into undecidability for many verification problems, such as MTL-model checking (Quaas, 2014).

5. Equivalence, Checking, and Learning Algorithms

1-DTA equivalence can be decided efficiently by reduction to region abstractions or direct untimed finite-state machine (FSM) equivalence:

• Every deterministic one-clock timed automaton admits a finite untimed FSM abstraction via region or "t-abstraction." Bisimulation between the timed and untimed models is used to show behavioral equivalence (Bresolin et al., 2014, Bresolin et al., 2021).
• The FSM abstraction preserves the acceptance of all timed words up to equivalence of region sequences, and deciding 1-DTA equivalence reduces to FSM equivalence.

Active learning of 1-DTAs is feasible using $L^*$-style observation tables extended for time and reset behavior:

• When resets are observable (the "smart teacher" model), learning is polynomial in the size of the automaton and maximal clock constant.
• Without reset information, the learning problem becomes exponential owing to the need to guess reset choices at every table expansion (An et al., 2019, Doveri et al., 21 Jan 2026, Xu et al., 2022).

The Myhill–Nerode theory directly enables construction of a canonical 1-DTA through active learning over half-integral representations (Doveri et al., 21 Jan 2026).

6. Applications, Model Checking, and Synthesis

1-DTAs are central to specification, verification, and synthesis for real-time systems due to their algorithmic tractability:

• Model checking of one-clock deterministic timed automata against continuous-time Markov chains (CTMCs) reduces to solving standard transient equations for CTMCs, as the region structure is simple enough to permit an explicit, finite-state reduction (Chen et al., 2011).
• Synthesis procedures for model-based testing, controller synthesis, and supervisory control often assume deterministic timed automaton specifications; the decidability and constructibility for 1-DTA make them suitable for practical deployment (Clemente et al., 2021, Manasa et al., 2010).

7. Limitations, Decidability Boundaries, and Future Research

The key boundaries for decidable analysis and learning in the timed automata landscape are enforced by the strict restriction to one clock, the exclusion of silent ($\epsilon$) transitions, and bounded clock constants. Introducing additional clocks, $\epsilon$-transitions, unbounded parameters, or certain forms of parametric equality into the model invariably leads to the undecidability of determinisation, emptiness, or model checking problems (Clemente et al., 2021, Clemente et al., 2020, Quaas, 2014).

Ongoing research explores more expressive sub-classes (e.g., L/U-automata), connections to register automata and the synthesis of canonical minimal models, as well as efficient, practical learning algorithms based on the theoretical results outlined above. The Myhill–Nerode approach and active learning methods are particularly central in recent advances (Doveri et al., 21 Jan 2026, An et al., 2019, Xu et al., 2022).